1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Primary interface to machine description for the UltraSPARC. Primarily just
11 // initializes machine-dependent parameters in class TargetMachine, and creates
12 // machine-dependent subclasses for classes such as TargetInstrInfo.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/Function.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Assembly/PrintModulePass.h"
19 #include "llvm/CodeGen/InstrSelection.h"
20 #include "llvm/CodeGen/InstrScheduling.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineFunctionInfo.h"
23 #include "llvm/CodeGen/MachineCodeForInstruction.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Target/TargetMachineImpls.h"
26 #include "llvm/Transforms/Scalar.h"
27 #include "MappingInfo.h"
28 #include "SparcInternals.h"
29 #include "SparcTargetMachine.h"
30 #include "Support/CommandLine.h"
34 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
35 // Build the MachineInstruction Description Array...
36 const TargetInstrDescriptor llvm::SparcMachineInstrDesc[] = {
37 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
38 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
39 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
40 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
41 ImplicitRegUseList, ImplicitRegUseList },
42 #include "SparcInstr.def"
45 //---------------------------------------------------------------------------
46 // Command line options to control choice of code generation passes.
47 //---------------------------------------------------------------------------
50 cl::opt<bool> DisableSched("disable-sched",
51 cl::desc("Disable local scheduling pass"));
53 cl::opt<bool> DisablePeephole("disable-peephole",
54 cl::desc("Disable peephole optimization pass"));
56 cl::opt<bool> EmitMappingInfo("enable-maps",
57 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
59 cl::opt<bool> DisableStrip("disable-strip",
60 cl::desc("Do not strip the LLVM bytecode in executable"));
62 cl::opt<bool> DumpInput("dump-input",
63 cl::desc("Print bytecode before code generation"),
67 //===---------------------------------------------------------------------===//
68 // Code generation/destruction passes
69 //===---------------------------------------------------------------------===//
72 class ConstructMachineFunction : public FunctionPass {
73 TargetMachine &Target;
75 ConstructMachineFunction(TargetMachine &T) : Target(T) {}
77 const char *getPassName() const {
78 return "ConstructMachineFunction";
81 bool runOnFunction(Function &F) {
82 MachineFunction::construct(&F, Target).getInfo()->CalculateArgSize();
87 struct DestroyMachineFunction : public FunctionPass {
88 const char *getPassName() const { return "FreeMachineFunction"; }
90 static void freeMachineCode(Instruction &I) {
91 MachineCodeForInstruction::destroy(&I);
94 bool runOnFunction(Function &F) {
95 for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
96 for (BasicBlock::iterator I = FI->begin(), E = FI->end(); I != E; ++I)
97 MachineCodeForInstruction::get(I).dropAllReferences();
99 for (Function::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI)
100 for_each(FI->begin(), FI->end(), freeMachineCode);
102 MachineFunction::destruct(&F);
107 FunctionPass *createMachineCodeConstructionPass(TargetMachine &Target) {
108 return new ConstructMachineFunction(Target);
112 FunctionPass *llvm::createSparcMachineCodeDestructionPass() {
113 return new DestroyMachineFunction();
117 SparcTargetMachine::SparcTargetMachine()
118 : TargetMachine("UltraSparc-Native", false),
126 // addPassesToEmitAssembly - This method controls the entire code generation
127 // process for the ultra sparc.
130 SparcTargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
132 // The following 3 passes used to be inserted specially by llc.
133 // Replace malloc and free instructions with library calls.
134 PM.add(createLowerAllocationsPass());
136 // Strip all of the symbols from the bytecode so that it will be smaller...
138 PM.add(createSymbolStrippingPass());
140 // FIXME: implement the switch instruction in the instruction selector.
141 PM.add(createLowerSwitchPass());
143 // FIXME: implement the invoke/unwind instructions!
144 PM.add(createLowerInvokePass());
146 // decompose multi-dimensional array references into single-dim refs
147 PM.add(createDecomposeMultiDimRefsPass());
149 // Construct and initialize the MachineFunction object for this fn.
150 PM.add(createMachineCodeConstructionPass(*this));
152 //Insert empty stackslots in the stack frame of each function
153 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
154 PM.add(createStackSlotsPass(*this));
156 // Specialize LLVM code for this target machine
157 PM.add(createPreSelectionPass(*this));
158 // Run basic dataflow optimizations on LLVM code
159 PM.add(createReassociatePass());
160 PM.add(createLICMPass());
161 PM.add(createGCSEPass());
163 // If LLVM dumping after transformations is requested, add it to the pipeline
165 PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
168 PM.add(createInstructionSelectionPass(*this));
171 PM.add(createInstructionSchedulingWithSSAPass(*this));
173 PM.add(getRegisterAllocator(*this));
175 PM.add(createPrologEpilogInsertionPass());
177 if (!DisablePeephole)
178 PM.add(createPeepholeOptsPass(*this));
181 PM.add(getMappingInfoAsmPrinterPass(Out));
183 // Output assembly language to the .s file. Assembly emission is split into
184 // two parts: Function output and Global value output. This is because
185 // function output is pipelined with all of the rest of code generation stuff,
186 // allowing machine code representations for functions to be free'd after the
187 // function has been emitted.
189 PM.add(createAsmPrinterPass(Out, *this));
190 PM.add(createSparcMachineCodeDestructionPass()); // Free stuff no longer needed
192 // Emit bytecode to the assembly file into its special section next
194 PM.add(createBytecodeAsmPrinterPass(Out));
199 // addPassesToJITCompile - This method controls the JIT method of code
200 // generation for the UltraSparc.
202 void SparcJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
203 const TargetData &TD = TM.getTargetData();
205 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
206 TD.getPointerAlignment(), TD.getDoubleAlignment()));
208 // Replace malloc and free instructions with library calls.
209 // Do this after tracing until lli implements these lib calls.
210 // For now, it will emulate malloc and free internally.
211 PM.add(createLowerAllocationsPass());
213 // FIXME: implement the switch instruction in the instruction selector.
214 PM.add(createLowerSwitchPass());
216 // FIXME: implement the invoke/unwind instructions!
217 PM.add(createLowerInvokePass());
219 // decompose multi-dimensional array references into single-dim refs
220 PM.add(createDecomposeMultiDimRefsPass());
222 // Construct and initialize the MachineFunction object for this fn.
223 PM.add(createMachineCodeConstructionPass(TM));
225 // Specialize LLVM code for this target machine and then
226 // run basic dataflow optimizations on LLVM code.
227 PM.add(createPreSelectionPass(TM));
228 // Run basic dataflow optimizations on LLVM code
229 PM.add(createReassociatePass());
231 // FIXME: these passes crash the FunctionPassManager when being added...
232 //PM.add(createLICMPass());
233 //PM.add(createGCSEPass());
235 PM.add(createInstructionSelectionPass(TM));
237 PM.add(getRegisterAllocator(TM));
238 PM.add(createPrologEpilogInsertionPass());
240 if (!DisablePeephole)
241 PM.add(createPeepholeOptsPass(TM));
244 //----------------------------------------------------------------------------
245 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
246 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
247 //----------------------------------------------------------------------------
249 TargetMachine *llvm::allocateSparcTargetMachine(const Module &M) {
250 return new SparcTargetMachine();