1 //===-- Sparc.cpp - General implementation file for the Sparc Target ------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Primary interface to machine description for the UltraSPARC. Primarily just
11 // initializes machine-dependent parameters in class TargetMachine, and creates
12 // machine-dependent subclasses for classes such as TargetInstrInfo.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/Function.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/Assembly/PrintModulePass.h"
19 #include "llvm/CodeGen/InstrSelection.h"
20 #include "llvm/CodeGen/InstrScheduling.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineFunctionInfo.h"
23 #include "llvm/CodeGen/MachineCodeForInstruction.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Target/TargetMachineImpls.h"
26 #include "llvm/Transforms/Scalar.h"
27 #include "MappingInfo.h"
28 #include "SparcInternals.h"
29 #include "SparcTargetMachine.h"
30 #include "Support/CommandLine.h"
36 static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */
37 // Build the MachineInstruction Description Array...
38 const TargetInstrDescriptor SparcMachineInstrDesc[] = {
39 #define I(ENUM, OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
40 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS) \
41 { OPCODESTRING, NUMOPERANDS, RESULTPOS, MAXIMM, IMMSE, \
42 NUMDELAYSLOTS, LATENCY, SCHEDCLASS, INSTFLAGS, 0, \
43 ImplicitRegUseList, ImplicitRegUseList },
44 #include "SparcInstr.def"
47 //---------------------------------------------------------------------------
48 // Command line options to control choice of code generation passes.
49 //---------------------------------------------------------------------------
52 cl::opt<bool> DisableSched("disable-sched",
53 cl::desc("Disable local scheduling pass"));
55 cl::opt<bool> DisablePeephole("disable-peephole",
56 cl::desc("Disable peephole optimization pass"));
58 cl::opt<bool> EmitMappingInfo("enable-maps",
59 cl::desc("Emit LLVM-to-MachineCode mapping info to assembly"));
61 cl::opt<bool> DisableStrip("disable-strip",
62 cl::desc("Do not strip the LLVM bytecode in executable"));
64 cl::opt<bool> DumpInput("dump-input",
65 cl::desc("Print bytecode before code generation"),
69 } // End llvm namespace
71 SparcTargetMachine::SparcTargetMachine()
72 : TargetMachine("UltraSparc-Native", false),
80 // addPassesToEmitAssembly - This method controls the entire code generation
81 // process for the ultra sparc.
84 SparcTargetMachine::addPassesToEmitAssembly(PassManager &PM, std::ostream &Out)
86 // The following 3 passes used to be inserted specially by llc.
87 // Replace malloc and free instructions with library calls.
88 PM.add(createLowerAllocationsPass());
90 // Strip all of the symbols from the bytecode so that it will be smaller...
92 PM.add(createSymbolStrippingPass());
94 // FIXME: implement the switch instruction in the instruction selector.
95 PM.add(createLowerSwitchPass());
97 // FIXME: implement the invoke/unwind instructions!
98 PM.add(createLowerInvokePass());
100 // decompose multi-dimensional array references into single-dim refs
101 PM.add(createDecomposeMultiDimRefsPass());
103 // Construct and initialize the MachineFunction object for this fn.
104 PM.add(createMachineCodeConstructionPass(*this));
106 //Insert empty stackslots in the stack frame of each function
107 //so %fp+offset-8 and %fp+offset-16 are empty slots now!
108 PM.add(createStackSlotsPass(*this));
110 // Specialize LLVM code for this target machine
111 PM.add(createPreSelectionPass(*this));
112 // Run basic dataflow optimizations on LLVM code
113 PM.add(createReassociatePass());
114 PM.add(createLICMPass());
115 PM.add(createGCSEPass());
117 // If LLVM dumping after transformations is requested, add it to the pipeline
119 PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
122 PM.add(createInstructionSelectionPass(*this));
125 PM.add(createInstructionSchedulingWithSSAPass(*this));
127 PM.add(getRegisterAllocator(*this));
129 PM.add(createPrologEpilogInsertionPass());
131 if (!DisablePeephole)
132 PM.add(createPeepholeOptsPass(*this));
135 PM.add(getMappingInfoAsmPrinterPass(Out));
137 // Output assembly language to the .s file. Assembly emission is split into
138 // two parts: Function output and Global value output. This is because
139 // function output is pipelined with all of the rest of code generation stuff,
140 // allowing machine code representations for functions to be free'd after the
141 // function has been emitted.
143 PM.add(createAsmPrinterPass(Out, *this));
144 PM.add(createMachineCodeDestructionPass()); // Free stuff no longer needed
146 // Emit bytecode to the assembly file into its special section next
148 PM.add(createBytecodeAsmPrinterPass(Out));
153 // addPassesToJITCompile - This method controls the JIT method of code
154 // generation for the UltraSparc.
156 void SparcJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
157 const TargetData &TD = TM.getTargetData();
159 PM.add(new TargetData("lli", TD.isLittleEndian(), TD.getPointerSize(),
160 TD.getPointerAlignment(), TD.getDoubleAlignment()));
162 // Replace malloc and free instructions with library calls.
163 // Do this after tracing until lli implements these lib calls.
164 // For now, it will emulate malloc and free internally.
165 PM.add(createLowerAllocationsPass());
167 // FIXME: implement the switch instruction in the instruction selector.
168 PM.add(createLowerSwitchPass());
170 // FIXME: implement the invoke/unwind instructions!
171 PM.add(createLowerInvokePass());
173 // decompose multi-dimensional array references into single-dim refs
174 PM.add(createDecomposeMultiDimRefsPass());
176 // Construct and initialize the MachineFunction object for this fn.
177 PM.add(createMachineCodeConstructionPass(TM));
179 // Specialize LLVM code for this target machine and then
180 // run basic dataflow optimizations on LLVM code.
181 PM.add(createPreSelectionPass(TM));
182 // Run basic dataflow optimizations on LLVM code
183 PM.add(createReassociatePass());
185 // FIXME: these passes crash the FunctionPassManager when being added...
186 //PM.add(createLICMPass());
187 //PM.add(createGCSEPass());
189 PM.add(createInstructionSelectionPass(TM));
191 PM.add(getRegisterAllocator(TM));
192 PM.add(createPrologEpilogInsertionPass());
194 if (!DisablePeephole)
195 PM.add(createPeepholeOptsPass(TM));
198 //----------------------------------------------------------------------------
199 // allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine
200 // that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
201 //----------------------------------------------------------------------------
203 TargetMachine *llvm::allocateSparcTargetMachine(const Module &M) {
204 return new SparcTargetMachine();