1 //===-- InstrSelectionSupport.cpp -----------------------------------------===//
3 // Target-independent instruction selection code. See SparcInstrSelection.cpp
6 //===----------------------------------------------------------------------===//
8 #include "llvm/CodeGen/InstrSelectionSupport.h"
9 #include "llvm/CodeGen/InstrSelection.h"
10 #include "llvm/CodeGen/MachineInstr.h"
11 #include "llvm/CodeGen/MachineInstrAnnot.h"
12 #include "llvm/CodeGen/MachineCodeForInstruction.h"
13 #include "llvm/CodeGen/MachineFunction.h"
14 #include "llvm/CodeGen/InstrForest.h"
15 #include "llvm/Target/TargetMachine.h"
16 #include "llvm/Target/MachineRegInfo.h"
17 #include "llvm/Target/MachineInstrInfo.h"
18 #include "llvm/Constants.h"
19 #include "llvm/Function.h"
20 #include "llvm/Type.h"
21 #include "llvm/iMemory.h"
24 //*************************** Local Functions ******************************/
27 // Generate code to load the constant into a TmpInstruction (virtual reg) and
28 // returns the virtual register.
30 static TmpInstruction*
31 InsertCodeToLoadConstant(Function *F,
34 vector<MachineInstr*>& loadConstVec,
35 TargetMachine& target)
37 // Create a tmp virtual register to hold the constant.
38 TmpInstruction* tmpReg = new TmpInstruction(opValue);
39 MachineCodeForInstruction &mcfi = MachineCodeForInstruction::get(vmInstr);
42 target.getInstrInfo().CreateCodeToLoadConst(target, F, opValue, tmpReg,
45 // Record the mapping from the tmp VM instruction to machine instruction.
46 // Do this for all machine instructions that were not mapped to any
47 // other temp values created by
48 // tmpReg->addMachineInstruction(loadConstVec.back());
54 //---------------------------------------------------------------------------
55 // Function GetConstantValueAsUnsignedInt
56 // Function GetConstantValueAsSignedInt
58 // Convenience functions to get the value of an integral constant, for an
59 // appropriate integer or non-integer type that can be held in a signed
60 // or unsigned integer respectively. The type of the argument must be
62 // Signed or unsigned integer
66 // isValidConstant is set to true if a valid constant was found.
67 //---------------------------------------------------------------------------
70 GetConstantValueAsUnsignedInt(const Value *V,
71 bool &isValidConstant)
73 isValidConstant = true;
76 if (const ConstantBool *CB = dyn_cast<ConstantBool>(V))
77 return (int64_t)CB->getValue();
78 else if (const ConstantSInt *CS = dyn_cast<ConstantSInt>(V))
79 return (uint64_t)CS->getValue();
80 else if (const ConstantUInt *CU = dyn_cast<ConstantUInt>(V))
81 return CU->getValue();
83 isValidConstant = false;
88 GetConstantValueAsSignedInt(const Value *V,
89 bool &isValidConstant)
91 uint64_t C = GetConstantValueAsUnsignedInt(V, isValidConstant);
92 if (isValidConstant) {
93 if (V->getType()->isSigned() || C < INT64_MAX) // safe to cast to signed
96 isValidConstant = false;
102 //---------------------------------------------------------------------------
103 // Function: FoldGetElemChain
106 // Fold a chain of GetElementPtr instructions containing only
107 // constant offsets into an equivalent (Pointer, IndexVector) pair.
108 // Returns the pointer Value, and stores the resulting IndexVector
109 // in argument chainIdxVec. This is a helper function for
110 // FoldConstantIndices that does the actual folding.
111 //---------------------------------------------------------------------------
114 // Check for a constant 0.
118 return (idx == ConstantSInt::getNullValue(idx->getType()));
122 FoldGetElemChain(InstrTreeNode* ptrNode, vector<Value*>& chainIdxVec,
123 bool lastInstHasLeadingNonZero)
125 InstructionNode* gepNode = dyn_cast<InstructionNode>(ptrNode);
126 GetElementPtrInst* gepInst =
127 dyn_cast_or_null<GetElementPtrInst>(gepNode ? gepNode->getInstruction() :0);
129 // ptr value is not computed in this tree or ptr value does not come from GEP
134 // Return NULL if we don't fold any instructions in.
135 Value* ptrVal = NULL;
137 // Now chase the chain of getElementInstr instructions, if any.
138 // Check for any non-constant indices and stop there.
139 // Also, stop if the first index of child is a non-zero array index
140 // and the last index of the current node is a non-array index:
141 // in that case, a non-array declared type is being accessed as an array
142 // which is not type-safe, but could be legal.
144 InstructionNode* ptrChild = gepNode;
145 while (ptrChild && (ptrChild->getOpLabel() == Instruction::GetElementPtr ||
146 ptrChild->getOpLabel() == GetElemPtrIdx))
148 // Child is a GetElemPtr instruction
149 gepInst = cast<GetElementPtrInst>(ptrChild->getValue());
150 User::op_iterator OI, firstIdx = gepInst->idx_begin();
151 User::op_iterator lastIdx = gepInst->idx_end();
152 bool allConstantOffsets = true;
154 // The first index of every GEP must be an array index.
155 assert((*firstIdx)->getType() == Type::LongTy &&
156 "INTERNAL ERROR: Structure index for a pointer type!");
158 // If the last instruction had a leading non-zero index, check if the
159 // current one references a sequential (i.e., indexable) type.
160 // If not, the code is not type-safe and we would create an illegal GEP
161 // by folding them, so don't fold any more instructions.
163 if (lastInstHasLeadingNonZero)
164 if (! isa<SequentialType>(gepInst->getType()->getElementType()))
165 break; // cannot fold in any preceding getElementPtr instrs.
167 // Check that all offsets are constant for this instruction
168 for (OI = firstIdx; allConstantOffsets && OI != lastIdx; ++OI)
169 allConstantOffsets = isa<ConstantInt>(*OI);
171 if (allConstantOffsets)
172 { // Get pointer value out of ptrChild.
173 ptrVal = gepInst->getPointerOperand();
175 // Remember if it has leading zero index: it will be discarded later.
176 lastInstHasLeadingNonZero = ! IsZero(*firstIdx);
178 // Insert its index vector at the start, skipping any leading [0]
179 chainIdxVec.insert(chainIdxVec.begin(),
180 firstIdx + !lastInstHasLeadingNonZero, lastIdx);
182 // Mark the folded node so no code is generated for it.
183 ((InstructionNode*) ptrChild)->markFoldedIntoParent();
185 // Get the previous GEP instruction and continue trying to fold
186 ptrChild = dyn_cast<InstructionNode>(ptrChild->leftChild());
188 else // cannot fold this getElementPtr instr. or any preceding ones
192 // If the first getElementPtr instruction had a leading [0], add it back.
193 // Note that this instruction is the *last* one successfully folded above.
194 if (ptrVal && ! lastInstHasLeadingNonZero)
195 chainIdxVec.insert(chainIdxVec.begin(), ConstantSInt::get(Type::LongTy,0));
201 //---------------------------------------------------------------------------
202 // Function: GetGEPInstArgs
205 // Helper function for GetMemInstArgs that handles the final getElementPtr
206 // instruction used by (or same as) the memory operation.
207 // Extracts the indices of the current instruction and tries to fold in
208 // preceding ones if all indices of the current one are constant.
209 //---------------------------------------------------------------------------
212 GetGEPInstArgs(InstructionNode* gepNode,
213 vector<Value*>& idxVec,
214 bool& allConstantIndices)
216 allConstantIndices = true;
217 GetElementPtrInst* gepI = cast<GetElementPtrInst>(gepNode->getInstruction());
219 // Default pointer is the one from the current instruction.
220 Value* ptrVal = gepI->getPointerOperand();
221 InstrTreeNode* ptrChild = gepNode->leftChild();
223 // Extract the index vector of the GEP instructin.
224 // If all indices are constant and first index is zero, try to fold
225 // in preceding GEPs with all constant indices.
226 for (User::op_iterator OI=gepI->idx_begin(), OE=gepI->idx_end();
227 allConstantIndices && OI != OE; ++OI)
228 if (! isa<Constant>(*OI))
229 allConstantIndices = false; // note: this also terminates loop!
231 // If we have only constant indices, fold chains of constant indices
232 // in this and any preceding GetElemPtr instructions.
233 bool foldedGEPs = false;
234 bool leadingNonZeroIdx = gepI && ! IsZero(*gepI->idx_begin());
235 if (allConstantIndices)
236 if (Value* newPtr = FoldGetElemChain(ptrChild, idxVec, leadingNonZeroIdx))
242 // Append the index vector of the current instruction.
243 // Skip the leading [0] index if preceding GEPs were folded into this.
244 idxVec.insert(idxVec.end(),
245 gepI->idx_begin() + (foldedGEPs && !leadingNonZeroIdx),
251 //---------------------------------------------------------------------------
252 // Function: GetMemInstArgs
255 // Get the pointer value and the index vector for a memory operation
256 // (GetElementPtr, Load, or Store). If all indices of the given memory
257 // operation are constant, fold in constant indices in a chain of
258 // preceding GetElementPtr instructions (if any), and return the
259 // pointer value of the first instruction in the chain.
260 // All folded instructions are marked so no code is generated for them.
263 // Returns the pointer Value to use.
264 // Returns the resulting IndexVector in idxVec.
265 // Returns true/false in allConstantIndices if all indices are/aren't const.
266 //---------------------------------------------------------------------------
269 GetMemInstArgs(InstructionNode* memInstrNode,
270 vector<Value*>& idxVec,
271 bool& allConstantIndices)
273 allConstantIndices = false;
274 Instruction* memInst = memInstrNode->getInstruction();
275 assert(idxVec.size() == 0 && "Need empty vector to return indices");
277 // If there is a GetElemPtr instruction to fold in to this instr,
278 // it must be in the left child for Load and GetElemPtr, and in the
279 // right child for Store instructions.
280 InstrTreeNode* ptrChild = (memInst->getOpcode() == Instruction::Store
281 ? memInstrNode->rightChild()
282 : memInstrNode->leftChild());
284 // Default pointer is the one from the current instruction.
285 Value* ptrVal = ptrChild->getValue();
287 // Find the "last" GetElemPtr instruction: this one or the immediate child.
288 // There will be none if this is a load or a store from a scalar pointer.
289 InstructionNode* gepNode = NULL;
290 if (isa<GetElementPtrInst>(memInst))
291 gepNode = memInstrNode;
292 else if (isa<InstructionNode>(ptrChild) && isa<GetElementPtrInst>(ptrVal))
293 { // Child of load/store is a GEP and memInst is its only use.
294 // Use its indices and mark it as folded.
295 gepNode = cast<InstructionNode>(ptrChild);
296 gepNode->markFoldedIntoParent();
299 // If there are no indices, return the current pointer.
300 // Else extract the pointer from the GEP and fold the indices.
301 return (gepNode)? GetGEPInstArgs(gepNode, idxVec, allConstantIndices)
306 //------------------------------------------------------------------------
307 // Function Set2OperandsFromInstr
308 // Function Set3OperandsFromInstr
310 // For the common case of 2- and 3-operand arithmetic/logical instructions,
311 // set the m/c instr. operands directly from the VM instruction's operands.
312 // Check whether the first or second operand is 0 and can use a dedicated "0"
314 // Check whether the second operand should use an immediate field or register.
315 // (First and third operands are never immediates for such instructions.)
318 // canDiscardResult: Specifies that the result operand can be discarded
319 // by using the dedicated "0"
321 // op1position, op2position and resultPosition: Specify in which position
322 // in the machine instruction the 3 operands (arg1, arg2
323 // and result) should go.
325 //------------------------------------------------------------------------
328 Set2OperandsFromInstr(MachineInstr* minstr,
329 InstructionNode* vmInstrNode,
330 const TargetMachine& target,
331 bool canDiscardResult,
335 Set3OperandsFromInstr(minstr, vmInstrNode, target,
336 canDiscardResult, op1Position,
337 /*op2Position*/ -1, resultPosition);
342 Set3OperandsFromInstr(MachineInstr* minstr,
343 InstructionNode* vmInstrNode,
344 const TargetMachine& target,
345 bool canDiscardResult,
350 assert(op1Position >= 0);
351 assert(resultPosition >= 0);
354 minstr->SetMachineOperandVal(op1Position, MachineOperand::MO_VirtualRegister,
355 vmInstrNode->leftChild()->getValue());
357 // operand 2 (if any)
358 if (op2Position >= 0)
359 minstr->SetMachineOperandVal(op2Position, MachineOperand::MO_VirtualRegister,
360 vmInstrNode->rightChild()->getValue());
362 // result operand: if it can be discarded, use a dead register if one exists
363 if (canDiscardResult && target.getRegInfo().getZeroRegNum() >= 0)
364 minstr->SetMachineOperandReg(resultPosition,
365 target.getRegInfo().getZeroRegNum());
367 minstr->SetMachineOperandVal(resultPosition,
368 MachineOperand::MO_VirtualRegister, vmInstrNode->getValue());
372 MachineOperand::MachineOperandType
373 ChooseRegOrImmed(int64_t intValue,
375 MachineOpCode opCode,
376 const TargetMachine& target,
378 unsigned int& getMachineRegNum,
379 int64_t& getImmedValue)
381 MachineOperand::MachineOperandType opType=MachineOperand::MO_VirtualRegister;
382 getMachineRegNum = 0;
386 target.getInstrInfo().constantFitsInImmedField(opCode, intValue))
388 opType = isSigned? MachineOperand::MO_SignExtendedImmed
389 : MachineOperand::MO_UnextendedImmed;
390 getImmedValue = intValue;
392 else if (intValue == 0 && target.getRegInfo().getZeroRegNum() >= 0)
394 opType = MachineOperand::MO_MachineRegister;
395 getMachineRegNum = target.getRegInfo().getZeroRegNum();
402 MachineOperand::MachineOperandType
403 ChooseRegOrImmed(Value* val,
404 MachineOpCode opCode,
405 const TargetMachine& target,
407 unsigned int& getMachineRegNum,
408 int64_t& getImmedValue)
410 getMachineRegNum = 0;
413 // To use reg or immed, constant needs to be integer, bool, or a NULL pointer
414 Constant *CPV = dyn_cast<Constant>(val);
416 (! CPV->getType()->isIntegral() &&
417 ! (isa<PointerType>(CPV->getType()) && CPV->isNullValue())))
418 return MachineOperand::MO_VirtualRegister;
420 // Now get the constant value and check if it fits in the IMMED field.
421 // Take advantage of the fact that the max unsigned value will rarely
422 // fit into any IMMED field and ignore that case (i.e., cast smaller
423 // unsigned constants to signed).
426 if (isa<PointerType>(CPV->getType()))
427 intValue = 0; // We checked above that it is NULL
428 else if (ConstantBool* CB = dyn_cast<ConstantBool>(CPV))
429 intValue = (int64_t) CB->getValue();
430 else if (CPV->getType()->isSigned())
431 intValue = cast<ConstantSInt>(CPV)->getValue();
433 { // get the int value and sign-extend if original was less than 64 bits
434 intValue = (int64_t) cast<ConstantUInt>(CPV)->getValue();
435 switch(CPV->getType()->getPrimitiveID())
437 case Type::UByteTyID: intValue = (int64_t) (int8_t) intValue; break;
438 case Type::UShortTyID: intValue = (int64_t) (short) intValue; break;
439 case Type::UIntTyID: intValue = (int64_t) (int) intValue; break;
444 return ChooseRegOrImmed(intValue, CPV->getType()->isSigned(),
445 opCode, target, canUseImmed,
446 getMachineRegNum, getImmedValue);
450 //---------------------------------------------------------------------------
451 // Function: FixConstantOperandsForInstr
454 // Special handling for constant operands of a machine instruction
455 // -- if the constant is 0, use the hardwired 0 register, if any;
456 // -- if the constant fits in the IMMEDIATE field, use that field;
457 // -- else create instructions to put the constant into a register, either
458 // directly or by loading explicitly from the constant pool.
460 // In the first 2 cases, the operand of `minstr' is modified in place.
461 // Returns a vector of machine instructions generated for operands that
462 // fall under case 3; these must be inserted before `minstr'.
463 //---------------------------------------------------------------------------
465 vector<MachineInstr*>
466 FixConstantOperandsForInstr(Instruction* vmInstr,
467 MachineInstr* minstr,
468 TargetMachine& target)
470 vector<MachineInstr*> loadConstVec;
472 MachineOpCode opCode = minstr->getOpCode();
473 const MachineInstrInfo& instrInfo = target.getInstrInfo();
474 const MachineInstrDescriptor& instrDesc = instrInfo.getDescriptor(opCode);
475 int immedPos = instrInfo.getImmedConstantPos(opCode);
477 Function *F = vmInstr->getParent()->getParent();
479 for (unsigned op=0; op < minstr->getNumOperands(); op++)
481 const MachineOperand& mop = minstr->getOperand(op);
483 // Skip the result position, preallocated machine registers, or operands
484 // that cannot be constants (CC regs or PC-relative displacements)
485 if (instrDesc.resultPos == (int) op ||
486 mop.getType() == MachineOperand::MO_MachineRegister ||
487 mop.getType() == MachineOperand::MO_CCRegister ||
488 mop.getType() == MachineOperand::MO_PCRelativeDisp)
491 bool constantThatMustBeLoaded = false;
492 unsigned int machineRegNum = 0;
493 int64_t immedValue = 0;
494 Value* opValue = NULL;
495 MachineOperand::MachineOperandType opType =
496 MachineOperand::MO_VirtualRegister;
498 // Operand may be a virtual register or a compile-time constant
499 if (mop.getType() == MachineOperand::MO_VirtualRegister)
501 assert(mop.getVRegValue() != NULL);
502 opValue = mop.getVRegValue();
503 if (Constant *opConst = dyn_cast<Constant>(opValue))
505 opType = ChooseRegOrImmed(opConst, opCode, target,
506 (immedPos == (int)op), machineRegNum, immedValue);
507 if (opType == MachineOperand::MO_VirtualRegister)
508 constantThatMustBeLoaded = true;
513 assert(mop.getType() == MachineOperand::MO_SignExtendedImmed ||
514 mop.getType() == MachineOperand::MO_UnextendedImmed);
516 bool isSigned = (mop.getType() ==
517 MachineOperand::MO_SignExtendedImmed);
519 // Bit-selection flags indicate an instruction that is extracting
520 // bits from its operand so ignore this even if it is a big constant.
521 if (mop.opHiBits32() || mop.opLoBits32() ||
522 mop.opHiBits64() || mop.opLoBits64())
525 opType = ChooseRegOrImmed(mop.getImmedValue(), isSigned,
526 opCode, target, (immedPos == (int)op),
527 machineRegNum, immedValue);
529 if (opType == mop.getType())
530 continue; // no change: this is the most common case
532 if (opType == MachineOperand::MO_VirtualRegister)
534 constantThatMustBeLoaded = true;
536 ? (Value*)ConstantSInt::get(Type::LongTy, immedValue)
537 : (Value*)ConstantUInt::get(Type::ULongTy,(uint64_t)immedValue);
541 if (opType == MachineOperand::MO_MachineRegister)
542 minstr->SetMachineOperandReg(op, machineRegNum);
543 else if (opType == MachineOperand::MO_SignExtendedImmed ||
544 opType == MachineOperand::MO_UnextendedImmed)
545 minstr->SetMachineOperandConst(op, opType, immedValue);
546 else if (constantThatMustBeLoaded ||
547 (opValue && isa<GlobalValue>(opValue)))
548 { // opValue is a constant that must be explicitly loaded into a reg
550 TmpInstruction* tmpReg = InsertCodeToLoadConstant(F, opValue, vmInstr,
551 loadConstVec, target);
552 minstr->SetMachineOperandVal(op, MachineOperand::MO_VirtualRegister,
557 // Also, check for implicit operands used by the machine instruction
558 // (no need to check those defined since they cannot be constants).
560 // -- arguments to a Call
561 // -- return value of a Return
562 // Any such operand that is a constant value needs to be fixed also.
563 // The current instructions with implicit refs (viz., Call and Return)
564 // have no immediate fields, so the constant always needs to be loaded
567 bool isCall = instrInfo.isCall(opCode);
568 unsigned lastCallArgNum = 0; // unused if not a call
569 CallArgsDescriptor* argDesc = NULL; // unused if not a call
571 argDesc = CallArgsDescriptor::get(minstr);
573 for (unsigned i=0, N=minstr->getNumImplicitRefs(); i < N; ++i)
574 if (isa<Constant>(minstr->getImplicitRef(i)) ||
575 isa<GlobalValue>(minstr->getImplicitRef(i)))
577 Value* oldVal = minstr->getImplicitRef(i);
578 TmpInstruction* tmpReg =
579 InsertCodeToLoadConstant(F, oldVal, vmInstr, loadConstVec, target);
580 minstr->setImplicitRef(i, tmpReg);
583 { // find and replace the argument in the CallArgsDescriptor
584 unsigned i=lastCallArgNum;
585 while (argDesc->getArgInfo(i).getArgVal() != oldVal)
587 assert(i < argDesc->getNumArgs() &&
588 "Constant operands to a call *must* be in the arg list");
590 argDesc->getArgInfo(i).replaceArgVal(tmpReg);