2 //***************************************************************************
7 // Machine-independent driver file for instruction selection.
8 // This file constructs a forest of BURG instruction trees and then
9 // uses the BURG-generated tree grammar (BURM) to find the optimal
10 // instruction sequences for a given machine.
13 // 7/02/01 - Vikram Adve - Created
14 //**************************************************************************/
17 #include "llvm/CodeGen/InstrSelection.h"
18 #include "llvm/CodeGen/InstrSelectionSupport.h"
19 #include "llvm/CodeGen/MachineInstr.h"
20 #include "llvm/Instruction.h"
21 #include "llvm/BasicBlock.h"
22 #include "llvm/Method.h"
23 #include "llvm/iPHINode.h"
24 #include "llvm/Target/MachineRegInfo.h"
25 #include "Support/CommandLine.h"
29 //******************** Internal Data Declarations ************************/
31 // Use a static vector to avoid allocating a new one per VM instruction
32 static MachineInstr* minstrVec[MAX_INSTR_PER_VMINSTR];
35 enum SelectDebugLevel_t {
37 Select_PrintMachineCode,
38 Select_DebugInstTrees,
39 Select_DebugBurgTrees,
42 // Enable Debug Options to be specified on the command line
43 cl::Enum<enum SelectDebugLevel_t> SelectDebugLevel("dselect", cl::NoFlags,
44 "enable instruction selection debugging information",
45 clEnumValN(Select_NoDebugInfo, "n", "disable debug output"),
46 clEnumValN(Select_PrintMachineCode, "y", "print generated machine code"),
47 clEnumValN(Select_DebugInstTrees, "i", "print debugging info for instruction selection "),
48 clEnumValN(Select_DebugBurgTrees, "b", "print burg trees"), 0);
51 //******************** Forward Function Declarations ***********************/
54 static bool SelectInstructionsForTree (InstrTreeNode* treeRoot,
56 TargetMachine &target);
58 static void PostprocessMachineCodeForTree(InstructionNode* instrNode,
61 TargetMachine &target);
63 static void InsertCode4AllPhisInMeth(Method *method, TargetMachine &target);
67 //******************* Externally Visible Functions *************************/
70 //---------------------------------------------------------------------------
71 // Entry point for instruction selection using BURG.
72 // Returns true if instruction selection failed, false otherwise.
73 //---------------------------------------------------------------------------
76 SelectInstructionsForMethod(Method* method, TargetMachine &target)
81 // Build the instruction trees to be given as inputs to BURG.
83 InstrForest instrForest(method);
85 if (SelectDebugLevel >= Select_DebugInstTrees)
87 cerr << "\n\n*** Instruction trees for method "
88 << (method->hasName()? method->getName() : "")
94 // Invoke BURG instruction selection for each tree
96 const std::hash_set<InstructionNode*> &treeRoots = instrForest.getRootSet();
97 for (std::hash_set<InstructionNode*>::const_iterator
98 treeRootIter = treeRoots.begin(); treeRootIter != treeRoots.end();
101 InstrTreeNode* basicNode = *treeRootIter;
103 // Invoke BURM to label each tree node with a state
104 burm_label(basicNode);
106 if (SelectDebugLevel >= Select_DebugBurgTrees)
108 printcover(basicNode, 1, 0);
109 cerr << "\nCover cost == " << treecost(basicNode, 1, 0) << "\n\n";
110 printMatches(basicNode);
113 // Then recursively walk the tree to select instructions
114 if (SelectInstructionsForTree(basicNode, /*goalnt*/1, target))
122 // Record instructions in the vector for each basic block
124 for (Method::iterator BI = method->begin(); BI != method->end(); ++BI)
126 MachineCodeForBasicBlock& bbMvec = (*BI)->getMachineInstrVec();
127 for (BasicBlock::iterator II = (*BI)->begin(); II != (*BI)->end(); ++II)
129 MachineCodeForVMInstr& mvec = (*II)->getMachineInstrVec();
130 for (unsigned i=0; i < mvec.size(); i++)
131 bbMvec.push_back(mvec[i]);
135 // Insert phi elimination code -- added by Ruchira
136 InsertCode4AllPhisInMeth(method, target);
139 if (SelectDebugLevel >= Select_PrintMachineCode)
141 cerr << "\n*** Machine instructions after INSTRUCTION SELECTION\n";
142 MachineCodeForMethod::get(method).dump();
149 //*********************** Private Functions *****************************/
152 //-------------------------------------------------------------------------
153 // Thid method inserts a copy instruction to a predecessor BB as a result
154 // of phi elimination.
155 //-------------------------------------------------------------------------
157 void InsertPhiElimInst(BasicBlock *BB, MachineInstr *CpMI) {
159 TerminatorInst *TermInst = BB->getTerminator();
160 MachineCodeForVMInstr &MC4Term = TermInst->getMachineInstrVec();
161 MachineInstr *FirstMIOfTerm = *( MC4Term.begin() );
163 assert( FirstMIOfTerm && "No Machine Instrs for terminator" );
165 // get an iterator to machine instructions in the BB
166 MachineCodeForBasicBlock& bbMvec = BB->getMachineInstrVec();
167 MachineCodeForBasicBlock::iterator MCIt = bbMvec.begin();
169 // find the position of first machine instruction generated by the
170 // terminator of this BB
171 for( ; (MCIt != bbMvec.end()) && (*MCIt != FirstMIOfTerm) ; ++MCIt ) ;
173 assert( MCIt != bbMvec.end() && "Start inst of terminator not found");
175 // insert the copy instruction just before the first machine instruction
176 // generated for the terminator
177 bbMvec.insert( MCIt , CpMI );
179 //cerr << "\nPhiElimination copy inst: " << *CopyInstVec[0];
184 //-------------------------------------------------------------------------
185 // This method inserts phi elimination code for all BBs in a method
186 //-------------------------------------------------------------------------
187 void InsertCode4AllPhisInMeth(Method *method, TargetMachine &target) {
190 // for all basic blocks in method
192 for (Method::iterator BI = method->begin(); BI != method->end(); ++BI) {
194 BasicBlock *BB = *BI;
195 const BasicBlock::InstListType &InstList = BB->getInstList();
196 BasicBlock::InstListType::const_iterator IIt = InstList.begin();
198 // for all instructions in the basic block
200 for( ; IIt != InstList.end(); ++IIt ) {
202 if( (*IIt)->getOpcode() == Instruction::PHINode ) {
204 PHINode *PN = (PHINode *) (*IIt);
206 // for each incoming value of the phi, insert phi elimination
208 for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) {
210 // insert the copy instruction to the predecessor BB
212 std::vector<MachineInstr*> CopyInstVec;
215 target.getRegInfo().cpValue2Value(PN->getIncomingValue(i), PN);
217 InsertPhiElimInst( PN->getIncomingBlock(i), CpMI);
220 else break; // since PHI nodes can only be at the top
222 } // for each Phi Instr in BB
224 } // for all BBs in method
230 //-------------------------------------------------------------------------
231 // This method inserts phi elimination code for all BBs in a method
232 //-------------------------------------------------------------------------
233 void InsertCode4AllPhisInMeth(Method *method, TargetMachine &target) {
236 // for all basic blocks in method
238 for (Method::iterator BI = method->begin(); BI != method->end(); ++BI) {
240 BasicBlock *BB = *BI;
241 const BasicBlock::InstListType &InstList = BB->getInstList();
242 BasicBlock::InstListType::const_iterator IIt = InstList.begin();
244 // for all instructions in the basic block
246 for( ; IIt != InstList.end(); ++IIt ) {
248 if( (*IIt)->getOpcode() == Instruction::PHINode ) {
250 PHINode *PN = (PHINode *) (*IIt);
252 Value *PhiCpRes = new Value(PN->getType(), PN->getValueType(),"PhiCp:");
254 // for each incoming value of the phi, insert phi elimination
256 for (unsigned i = 0; i < PN->getNumIncomingValues(); ++i) {
258 // insert the copy instruction to the predecessor BB
260 target.getRegInfo().cpValue2Value(PN->getIncomingValue(i),
263 InsertPhiElimInst(PN->getIncomingBlock(i), CpMI);
267 MachineInstr *CpMI2 =
268 target.getRegInfo().cpValue2Value(PhiCpRes, PN);
270 // get an iterator to machine instructions in the BB
271 MachineCodeForBasicBlock& bbMvec = BB->getMachineInstrVec();
273 bbMvec.insert( bbMvec.begin(), CpMI2);
275 else break; // since PHI nodes can only be at the top
277 } // for each Phi Instr in BB
279 } // for all BBs in method
291 //---------------------------------------------------------------------------
292 // Function AppendMachineCodeForVMInstr
294 // Append machine instr sequence to the machine code vec for a VM instr
295 //---------------------------------------------------------------------------
298 AppendMachineCodeForVMInstr(MachineInstr** minstrVec,
300 Instruction* vmInstr)
304 MachineCodeForVMInstr& mvec = vmInstr->getMachineInstrVec();
305 mvec.insert(mvec.end(), minstrVec, minstrVec+N);
310 //---------------------------------------------------------------------------
311 // Function PostprocessMachineCodeForTree
313 // Apply any final cleanups to machine code for the root of a subtree
314 // after selection for all its children has been completed.
315 //---------------------------------------------------------------------------
318 PostprocessMachineCodeForTree(InstructionNode* instrNode,
321 TargetMachine &target)
323 // Fix up any constant operands in the machine instructions to either
324 // use an immediate field or to load the constant into a register
325 // Walk backwards and use direct indexes to allow insertion before current
327 Instruction* vmInstr = instrNode->getInstruction();
328 MachineCodeForVMInstr& mvec = vmInstr->getMachineInstrVec();
329 for (int i = (int) mvec.size()-1; i >= 0; i--)
331 std::vector<MachineInstr*> loadConstVec =
332 FixConstantOperandsForInstr(vmInstr, mvec[i], target);
334 if (loadConstVec.size() > 0)
335 mvec.insert(mvec.begin()+i, loadConstVec.begin(), loadConstVec.end());
339 //---------------------------------------------------------------------------
340 // Function SelectInstructionsForTree
342 // Recursively walk the tree to select instructions.
343 // Do this top-down so that child instructions can exploit decisions
344 // made at the child instructions.
346 // E.g., if br(setle(reg,const)) decides the constant is 0 and uses
347 // a branch-on-integer-register instruction, then the setle node
348 // can use that information to avoid generating the SUBcc instruction.
350 // Note that this cannot be done bottom-up because setle must do this
351 // only if it is a child of the branch (otherwise, the result of setle
352 // may be used by multiple instructions).
353 //---------------------------------------------------------------------------
356 SelectInstructionsForTree(InstrTreeNode* treeRoot, int goalnt,
357 TargetMachine &target)
359 // Get the rule that matches this node.
361 int ruleForNode = burm_rule(treeRoot->state, goalnt);
363 if (ruleForNode == 0)
365 cerr << "Could not match instruction tree for instr selection\n";
370 // Get this rule's non-terminals and the corresponding child nodes (if any)
372 short *nts = burm_nts[ruleForNode];
374 // First, select instructions for the current node and rule.
375 // (If this is a list node, not an instruction, then skip this step).
376 // This function is specific to the target architecture.
378 if (treeRoot->opLabel != VRegListOp)
380 InstructionNode* instrNode = (InstructionNode*)treeRoot;
381 assert(instrNode->getNodeType() == InstrTreeNode::NTInstructionNode);
383 unsigned N = GetInstructionsByRule(instrNode, ruleForNode, nts, target,
387 assert(N <= MAX_INSTR_PER_VMINSTR);
388 AppendMachineCodeForVMInstr(minstrVec,N,instrNode->getInstruction());
392 // Then, recursively compile the child nodes, if any.
395 { // i.e., there is at least one kid
396 InstrTreeNode* kids[2];
397 int currentRule = ruleForNode;
398 burm_kids(treeRoot, currentRule, kids);
400 // First skip over any chain rules so that we don't visit
401 // the current node again.
403 while (ThisIsAChainRule(currentRule))
405 currentRule = burm_rule(treeRoot->state, nts[0]);
406 nts = burm_nts[currentRule];
407 burm_kids(treeRoot, currentRule, kids);
410 // Now we have the first non-chain rule so we have found
411 // the actual child nodes. Recursively compile them.
413 for (int i = 0; nts[i]; i++)
416 InstrTreeNode::InstrTreeNodeType nodeType = kids[i]->getNodeType();
417 if (nodeType == InstrTreeNode::NTVRegListNode ||
418 nodeType == InstrTreeNode::NTInstructionNode)
420 if (SelectInstructionsForTree(kids[i], nts[i], target))
421 return true; // failure
426 // Finally, do any postprocessing on this node after its children
427 // have been translated
429 if (treeRoot->opLabel != VRegListOp)
431 InstructionNode* instrNode = (InstructionNode*)treeRoot;
432 PostprocessMachineCodeForTree(instrNode, ruleForNode, nts, target);
435 return false; // success