lib/Target/Sparc/SparcRegisterInfo.h

   1 //===- SparcRegisterInfo.h - Sparc Register Information Impl ----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file was developed by the LLVM research group and is distributed under
   6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the Sparc implementation of the MRegisterInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef SPARCREGISTERINFO_H
  15 #define SPARCREGISTERINFO_H
  16
  17 #include "llvm/Target/MRegisterInfo.h"
  18 #include "SparcGenRegisterInfo.h.inc"
  19
  20 namespace llvm {
  21
  22 class SparcSubtarget;
  23 class TargetInstrInfo;
  24 class Type;
  25
  26 struct SparcRegisterInfo : public SparcGenRegisterInfo {
  27   SparcSubtarget &Subtarget;
  28   const TargetInstrInfo &TII;
  29
  30   SparcRegisterInfo(SparcSubtarget &st, const TargetInstrInfo &tii);
  31
  32   /// Code Generation virtual methods...
  33   void storeRegToStackSlot(MachineBasicBlock &MBB,
  34                            MachineBasicBlock::iterator MBBI,
  35                            unsigned SrcReg, int FrameIndex,
  36                            const TargetRegisterClass *RC) const;
  37
  38   void storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
  39                       SmallVectorImpl<MachineOperand> &Addr,
  40                       const TargetRegisterClass *RC,
  41                       SmallVectorImpl<MachineInstr*> &NewMIs) const;
  42
  43   void loadRegFromStackSlot(MachineBasicBlock &MBB,
  44                             MachineBasicBlock::iterator MBBI,
  45                             unsigned DestReg, int FrameIndex,
  46                             const TargetRegisterClass *RC) const;
  47
  48   void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
  49                        SmallVectorImpl<MachineOperand> &Addr,
  50                        const TargetRegisterClass *RC,
  51                        SmallVectorImpl<MachineInstr*> &NewMIs) const;
  52
  53   void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
  54                     unsigned DestReg, unsigned SrcReg,
  55                     const TargetRegisterClass *DestRC,
  56                     const TargetRegisterClass *SrcRC) const;
  57
  58   void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
  59                      unsigned DestReg, const MachineInstr *Orig) const;
  60
  61   virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
  62                                           unsigned OpNum,
  63                                           int FrameIndex) const;
  64
  65   virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
  66                                           SmallVectorImpl<unsigned> &UseOps,
  67                                           int FrameIndex) const {
  68     return 0;
  69   }
  70
  71   virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
  72                                           unsigned OpNum,
  73                                           MachineInstr* LoadMI) const {
  74     return 0;
  75   }
  76
  77   virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
  78                                           SmallVectorImpl<unsigned> &UseOps,
  79                                           MachineInstr* LoadMI) const {
  80     return 0;
  81   }
  82
  83   const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
  84
  85   const TargetRegisterClass* const* getCalleeSavedRegClasses(
  86                                      const MachineFunction *MF = 0) const;
  87
  88   BitVector getReservedRegs(const MachineFunction &MF) const;
  89
  90   bool hasFP(const MachineFunction &MF) const;
  91
  92   void eliminateCallFramePseudoInstr(MachineFunction &MF,
  93                                      MachineBasicBlock &MBB,
  94                                      MachineBasicBlock::iterator I) const;
  95
  96   void eliminateFrameIndex(MachineBasicBlock::iterator II,
  97                            int SPAdj, RegScavenger *RS = NULL) const;
  98
  99   void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
 100
 101   void emitPrologue(MachineFunction &MF) const;
 102   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
 103
 104   // Debug information queries.
 105   unsigned getRARegister() const;
 106   unsigned getFrameRegister(MachineFunction &MF) const;
 107
 108   // Exception handling queries.
 109   unsigned getEHExceptionRegister() const;
 110   unsigned getEHHandlerRegister() const;
 111
 112   int getDwarfRegNum(unsigned RegNum, bool isEH) const;
 113 };
 114
 115 } // end namespace llvm
 116
 117 #endif