1 //===- SparcV8RegisterInfo.cpp - SparcV8 Register Information ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SparcV8 implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
15 #include "SparcV8RegisterInfo.h"
16 #include "llvm/CodeGen/MachineInstrBuilder.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/Type.h"
19 #include "Support/STLExtras.h"
22 SparcV8RegisterInfo::SparcV8RegisterInfo()
23 : SparcV8GenRegisterInfo(V8::ADJCALLSTACKDOWN,
24 V8::ADJCALLSTACKUP) {}
26 int SparcV8RegisterInfo::storeRegToStackSlot(
27 MachineBasicBlock &MBB,
28 MachineBasicBlock::iterator MBBI,
29 unsigned SrcReg, int FrameIdx,
30 const TargetRegisterClass *RC) const
36 int SparcV8RegisterInfo::loadRegFromStackSlot(
37 MachineBasicBlock &MBB,
38 MachineBasicBlock::iterator MBBI,
39 unsigned DestReg, int FrameIdx,
40 const TargetRegisterClass *RC) const
46 int SparcV8RegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
47 MachineBasicBlock::iterator MBBI,
48 unsigned DestReg, unsigned SrcReg,
49 const TargetRegisterClass *RC) const {
54 void SparcV8RegisterInfo::
55 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
56 MachineBasicBlock::iterator I) const {
61 SparcV8RegisterInfo::eliminateFrameIndex(MachineFunction &MF,
62 MachineBasicBlock::iterator II) const {
66 void SparcV8RegisterInfo::
67 processFunctionBeforeFrameFinalized(MachineFunction &MF) const {}
69 void SparcV8RegisterInfo::emitPrologue(MachineFunction &MF) const {
70 MachineBasicBlock &MBB = MF.front();
72 // Eventually this should emit the correct save instruction based on the
73 // number of bytes in the frame. For now we just hardcode it.
74 BuildMI(MBB, MBB.begin(), V8::SAVEi, 2, V8::SP).addImm(-122).addReg(V8::SP);
77 void SparcV8RegisterInfo::emitEpilogue(MachineFunction &MF,
78 MachineBasicBlock &MBB) const {
79 MachineBasicBlock::iterator MBBI = prior(MBB.end());
80 assert(MBBI->getOpcode() == V8::JMPLi &&
81 "Can only put epilog before return instruction!");
82 BuildMI(MBB, MBBI, V8::RESTOREi, 2, V8::O0).addImm(0).addReg(V8::L7);
86 #include "SparcV8GenRegisterInfo.inc"
88 const TargetRegisterClass*
89 SparcV8RegisterInfo::getRegClassForType(const Type* Ty) const {
90 switch (Ty->getPrimitiveID()) {
92 case Type::DoubleTyID:
93 assert(0 && "Floating point registers not supported yet!");
95 case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
96 default: assert(0 && "Invalid type to getClass!");
100 case Type::ShortTyID:
101 case Type::UShortTyID:
104 case Type::PointerTyID: return &IntRegsInstance;