1 //===-- Sparc/SparcCodeEmitter.cpp - Convert Sparc Code to Machine Code ---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===---------------------------------------------------------------------===//
10 // This file contains the pass that transforms the Sparc machine instructions
11 // into relocatable machine code.
13 //===---------------------------------------------------------------------===//
15 #define DEBUG_TYPE "jit"
17 #include "MCTargetDesc/SparcMCExpr.h"
18 #include "SparcRelocations.h"
19 #include "SparcTargetMachine.h"
20 #include "llvm/ADT/Statistic.h"
21 #include "llvm/CodeGen/JITCodeEmitter.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/Support/Debug.h"
28 STATISTIC(NumEmitted, "Number of machine instructions emitted");
32 class SparcCodeEmitter : public MachineFunctionPass {
34 const SparcInstrInfo *II;
36 const SparcSubtarget *Subtarget;
39 const std::vector<MachineConstantPoolEntry> *MCPEs;
42 void getAnalysisUsage(AnalysisUsage &AU) const {
43 AU.addRequired<MachineModuleInfo> ();
44 MachineFunctionPass::getAnalysisUsage(AU);
50 SparcCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
51 : MachineFunctionPass(ID), JTI(0), II(0), TD(0),
52 TM(tm), MCE(mce), MCPEs(0),
53 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
55 bool runOnMachineFunction(MachineFunction &MF);
57 virtual const char *getPassName() const {
58 return "Sparc Machine Code Emitter";
61 /// getBinaryCodeForInstr - This function, generated by the
62 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
63 /// machine instructions.
64 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
66 void emitInstruction(MachineBasicBlock::instr_iterator MI,
67 MachineBasicBlock &MBB);
70 /// getMachineOpValue - Return binary encoding of operand. If the machine
71 /// operand requires relocation, record the relocation and return zero.
72 unsigned getMachineOpValue(const MachineInstr &MI,
73 const MachineOperand &MO) const;
75 unsigned getCallTargetOpValue(const MachineInstr &MI,
77 unsigned getBranchTargetOpValue(const MachineInstr &MI,
79 unsigned getBranchPredTargetOpValue(const MachineInstr &MI,
82 void emitWord(unsigned Word);
84 unsigned getRelocation(const MachineInstr &MI,
85 const MachineOperand &MO) const;
87 void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc) const;
88 void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const;
89 void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const;
90 void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const;
92 } // end anonymous namespace.
94 char SparcCodeEmitter::ID = 0;
96 bool SparcCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
97 SparcTargetMachine &Target = static_cast<SparcTargetMachine &>(
98 const_cast<TargetMachine &>(MF.getTarget()));
100 JTI = Target.getJITInfo();
101 II = Target.getInstrInfo();
102 TD = Target.getDataLayout();
103 Subtarget = &TM.getSubtarget<SparcSubtarget> ();
104 MCPEs = &MF.getConstantPool()->getConstants();
105 JTI->Initialize(MF, IsPIC);
106 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ());
109 DEBUG(errs() << "JITTing function '"
110 << MF.getName() << "'\n");
111 MCE.startFunction(MF);
113 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
115 MCE.StartMachineBasicBlock(MBB);
116 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
117 E = MBB->instr_end(); I != E;)
118 emitInstruction(*I++, *MBB);
120 } while (MCE.finishFunction(MF));
125 void SparcCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI,
126 MachineBasicBlock &MBB) {
127 DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI);
129 MCE.processDebugLoc(MI->getDebugLoc(), true);
133 switch (MI->getOpcode()) {
135 emitWord(getBinaryCodeForInstr(*MI));
138 case TargetOpcode::INLINEASM: {
139 // We allow inline assembler nodes with empty bodies - they can
140 // implicitly define registers, which is ok for JIT.
141 if (MI->getOperand(0).getSymbolName()[0]) {
142 report_fatal_error("JIT does not support inline asm!");
146 case TargetOpcode::PROLOG_LABEL:
147 case TargetOpcode::EH_LABEL: {
148 MCE.emitLabel(MI->getOperand(0).getMCSymbol());
151 case TargetOpcode::IMPLICIT_DEF:
152 case TargetOpcode::KILL: {
157 report_fatal_error("JIT does not support pseudo instruction GETPCX yet!");
162 MCE.processDebugLoc(MI->getDebugLoc(), false);
165 void SparcCodeEmitter::emitWord(unsigned Word) {
166 DEBUG(errs() << " 0x";
167 errs().write_hex(Word) << "\n");
168 MCE.emitWordBE(Word);
171 /// getMachineOpValue - Return binary encoding of operand. If the machine
172 /// operand requires relocation, record the relocation and return zero.
173 unsigned SparcCodeEmitter::getMachineOpValue(const MachineInstr &MI,
174 const MachineOperand &MO) const {
176 return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
178 return static_cast<unsigned>(MO.getImm());
179 else if (MO.isGlobal())
180 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO));
181 else if (MO.isSymbol())
182 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
184 emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO));
186 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
188 llvm_unreachable("Unable to encode MachineOperand!");
191 unsigned SparcCodeEmitter::getCallTargetOpValue(const MachineInstr &MI,
192 unsigned opIdx) const {
193 const MachineOperand MO = MI.getOperand(opIdx);
194 return getMachineOpValue(MI, MO);
197 unsigned SparcCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
198 unsigned opIdx) const {
199 const MachineOperand MO = MI.getOperand(opIdx);
200 return getMachineOpValue(MI, MO);
203 unsigned SparcCodeEmitter::getBranchPredTargetOpValue(const MachineInstr &MI,
204 unsigned opIdx) const {
205 const MachineOperand MO = MI.getOperand(opIdx);
206 return getMachineOpValue(MI, MO);
209 unsigned SparcCodeEmitter::getRelocation(const MachineInstr &MI,
210 const MachineOperand &MO) const {
212 unsigned TF = MO.getTargetFlags();
215 case SparcMCExpr::VK_Sparc_None: break;
216 case SparcMCExpr::VK_Sparc_LO: return SP::reloc_sparc_lo;
217 case SparcMCExpr::VK_Sparc_HI: return SP::reloc_sparc_hi;
218 case SparcMCExpr::VK_Sparc_H44: return SP::reloc_sparc_h44;
219 case SparcMCExpr::VK_Sparc_M44: return SP::reloc_sparc_m44;
220 case SparcMCExpr::VK_Sparc_L44: return SP::reloc_sparc_l44;
221 case SparcMCExpr::VK_Sparc_HH: return SP::reloc_sparc_hh;
222 case SparcMCExpr::VK_Sparc_HM: return SP::reloc_sparc_hm;
225 unsigned Opc = MI.getOpcode();
228 case SP::CALL: return SP::reloc_sparc_pc30;
231 case SP::FBCOND: return SP::reloc_sparc_pc22;
232 case SP::BPXCC: return SP::reloc_sparc_pc19;
234 llvm_unreachable("unknown reloc!");
237 void SparcCodeEmitter::emitGlobalAddress(const GlobalValue *GV,
238 unsigned Reloc) const {
239 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
240 const_cast<GlobalValue *>(GV), 0,
244 void SparcCodeEmitter::
245 emitExternalSymbolAddress(const char *ES, unsigned Reloc) const {
246 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
250 void SparcCodeEmitter::
251 emitConstPoolAddress(unsigned CPI, unsigned Reloc) const {
252 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
253 Reloc, CPI, 0, false));
256 void SparcCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
257 unsigned Reloc) const {
258 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
263 /// createSparcJITCodeEmitterPass - Return a pass that emits the collected Sparc
264 /// code to the specified MCE object.
265 FunctionPass *llvm::createSparcJITCodeEmitterPass(SparcTargetMachine &TM,
266 JITCodeEmitter &JCE) {
267 return new SparcCodeEmitter(TM, JCE);
270 #include "SparcGenCodeEmitter.inc"