1 //===-- SparcAsmBackend.cpp - Sparc Assembler Backend ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/MC/MCAsmBackend.h"
11 #include "MCTargetDesc/SparcFixupKinds.h"
12 #include "MCTargetDesc/SparcMCTargetDesc.h"
13 #include "llvm/MC/MCELFObjectWriter.h"
14 #include "llvm/MC/MCFixupKindInfo.h"
15 #include "llvm/MC/MCObjectWriter.h"
16 #include "llvm/Support/TargetRegistry.h"
20 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
23 llvm_unreachable("Unknown fixup kind!");
29 case Sparc::fixup_sparc_wplt30:
30 case Sparc::fixup_sparc_call30:
31 return (Value >> 2) & 0x3fffffff;
32 case Sparc::fixup_sparc_br22:
33 return (Value >> 2) & 0x3fffff;
34 case Sparc::fixup_sparc_br19:
35 return (Value >> 2) & 0x7ffff;
36 case Sparc::fixup_sparc_pc22:
37 case Sparc::fixup_sparc_got22:
38 case Sparc::fixup_sparc_hi22:
39 return (Value >> 10) & 0x3fffff;
40 case Sparc::fixup_sparc_pc10:
41 case Sparc::fixup_sparc_got10:
42 case Sparc::fixup_sparc_lo10:
44 case Sparc::fixup_sparc_h44:
45 return (Value >> 22) & 0x3fffff;
46 case Sparc::fixup_sparc_m44:
47 return (Value >> 12) & 0x3ff;
48 case Sparc::fixup_sparc_l44:
50 case Sparc::fixup_sparc_hh:
51 return (Value >> 42) & 0x3fffff;
52 case Sparc::fixup_sparc_hm:
53 return (Value >> 32) & 0x3ff;
58 class SparcAsmBackend : public MCAsmBackend {
59 const Target &TheTarget;
61 SparcAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
63 unsigned getNumFixupKinds() const {
64 return Sparc::NumTargetFixupKinds;
67 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
68 const static MCFixupKindInfo Infos[Sparc::NumTargetFixupKinds] = {
69 // name offset bits flags
70 { "fixup_sparc_call30", 2, 30, MCFixupKindInfo::FKF_IsPCRel },
71 { "fixup_sparc_br22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
72 { "fixup_sparc_br19", 13, 19, MCFixupKindInfo::FKF_IsPCRel },
73 { "fixup_sparc_hi22", 10, 22, 0 },
74 { "fixup_sparc_lo10", 22, 10, 0 },
75 { "fixup_sparc_h44", 10, 22, 0 },
76 { "fixup_sparc_m44", 22, 10, 0 },
77 { "fixup_sparc_l44", 20, 12, 0 },
78 { "fixup_sparc_hh", 10, 22, 0 },
79 { "fixup_sparc_hm", 22, 10, 0 },
80 { "fixup_sparc_pc22", 10, 22, MCFixupKindInfo::FKF_IsPCRel },
81 { "fixup_sparc_pc10", 22, 10, MCFixupKindInfo::FKF_IsPCRel },
82 { "fixup_sparc_got22", 10, 22, 0 },
83 { "fixup_sparc_got10", 22, 10, 0 },
84 { "fixup_sparc_wplt30", 2, 30, MCFixupKindInfo::FKF_IsPCRel }
87 if (Kind < FirstTargetFixupKind)
88 return MCAsmBackend::getFixupKindInfo(Kind);
90 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
92 return Infos[Kind - FirstTargetFixupKind];
95 void processFixupValue(const MCAssembler &Asm,
96 const MCAsmLayout &Layout,
102 switch ((Sparc::Fixups)Fixup.getKind()) {
104 case Sparc::fixup_sparc_wplt30: IsResolved = false; break;
109 bool mayNeedRelaxation(const MCInst &Inst) const {
114 /// fixupNeedsRelaxation - Target specific predicate for whether a given
115 /// fixup requires the associated instruction to be relaxed.
116 bool fixupNeedsRelaxation(const MCFixup &Fixup,
118 const MCRelaxableFragment *DF,
119 const MCAsmLayout &Layout) const {
121 assert(0 && "fixupNeedsRelaxation() unimplemented");
124 void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
126 assert(0 && "relaxInstruction() unimplemented");
129 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
130 // FIXME: Zero fill for now.
131 for (uint64_t i = 0; i != Count; ++i)
136 bool is64Bit() const {
137 StringRef name = TheTarget.getName();
138 return name == "sparcv9";
142 class ELFSparcAsmBackend : public SparcAsmBackend {
143 Triple::OSType OSType;
145 ELFSparcAsmBackend(const Target &T, Triple::OSType OSType) :
146 SparcAsmBackend(T), OSType(OSType) { }
148 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
149 uint64_t Value) const {
151 Value = adjustFixupValue(Fixup.getKind(), Value);
152 if (!Value) return; // Doesn't change encoding.
154 unsigned Offset = Fixup.getOffset();
156 // For each byte of the fragment that the fixup touches, mask in the bits
157 // from the fixup value. The Value has been "split up" into the
158 // appropriate bitfields above.
159 for (unsigned i = 0; i != 4; ++i)
160 Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
164 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
165 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
166 return createSparcELFObjectWriter(OS, is64Bit(), OSABI);
170 } // end anonymous namespace
173 MCAsmBackend *llvm::createSparcAsmBackend(const Target &T,
174 const MCRegisterInfo &MRI,
177 return new ELFSparcAsmBackend(T, Triple(TT).getOS());