lib/Target/R600/VIInstructions.td

   1 //===-- VIInstructions.td - VI Instruction Defintions ---------------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 // Instruction definitions for VI and newer.
  10 //===----------------------------------------------------------------------===//
  11
  12 let SubtargetPredicate = isVI in {
  13
  14 def V_LDEXP_F32 : VOP3InstVI <0x288, "v_ldexp_f32", VOP_F32_F32_I32,
  15   AMDGPUldexp
  16 >;
  17 def V_BFM_B32 : VOP3InstVI <0x293, "v_bfm_b32", VOP_I32_I32_I32, AMDGPUbfm>;
  18 def V_BCNT_U32_B32 : VOP3InstVI <0x28b, "v_bcnt_u32_b32", VOP_I32_I32_I32>;
  19 def V_MBCNT_LO_U32_B32 : VOP3InstVI <0x28c, "v_mbcnt_lo_u32_b32",
  20   VOP_I32_I32_I32
  21 >;
  22 def V_MBCNT_HI_U32_B32 : VOP3InstVI <0x28d, "v_mbcnt_hi_u32_b32",
  23   VOP_I32_I32_I32
  24 >;
  25
  26 def V_CVT_PKRTZ_F16_F32 : VOP3InstVI <0x296, "v_cvt_pkrtz_f16_f32",
  27  VOP_I32_F32_F32, int_SI_packf16
  28 >;
  29
  30 defm BUFFER_LOAD_DWORD_VI : MUBUF_Load_Helper_vi <
  31   0x14, "buffer_load_dword", VGPR_32, i32, global_load
  32 >;
  33
  34 defm BUFFER_LOAD_FORMAT_XYZW_VI : MUBUF_Load_Helper_vi <
  35   0x03, "buffer_load_format_xyzw", VReg_128
  36 >;
  37
  38 } // End SubtargetPredicate = isVI
  39
  40 //===----------------------------------------------------------------------===//
  41 // VOP2 Patterns
  42 //===----------------------------------------------------------------------===//
  43
  44 let Predicates = [isVI] in {
  45
  46 def : Pat <
  47   (int_SI_tid),
  48   (V_MBCNT_HI_U32_B32 0xffffffff,
  49                       (V_MBCNT_LO_U32_B32 0xffffffff, 0))
  50 >;
  51
  52 //===----------------------------------------------------------------------===//
  53 // SMEM Patterns
  54 //===----------------------------------------------------------------------===//
  55
  56 // 1. Offset as 8bit DWORD immediate
  57 def : Pat <
  58   (SIload_constant v4i32:$sbase, IMM20bit:$offset),
  59   (S_BUFFER_LOAD_DWORD_IMM $sbase, (as_i32imm $offset))
  60 >;
  61
  62 //===----------------------------------------------------------------------===//
  63 // MUBUF Patterns
  64 //===----------------------------------------------------------------------===//
  65
  66 // Offset in an 32Bit VGPR
  67 def : Pat <
  68   (SIload_constant v4i32:$sbase, i32:$voff),
  69   (BUFFER_LOAD_DWORD_VI_OFFEN $sbase, $voff, 0, 0, 0, 0, 0)
  70 >;
  71
  72 // Offset in an 32Bit VGPR
  73 def : Pat <
  74   (SIload_constant v4i32:$sbase, i32:$voff),
  75   (BUFFER_LOAD_DWORD_VI_OFFEN $sbase, $voff, 0, 0, 0, 0, 0)
  76 >;
  77
  78 /* int_SI_vs_load_input */
  79 def : Pat<
  80   (SIload_input v4i32:$tlst, imm:$attr_offset, i32:$buf_idx_vgpr),
  81   (BUFFER_LOAD_FORMAT_XYZW_VI_IDXEN $tlst, $buf_idx_vgpr, imm:$attr_offset, 0, 0, 0, 0)
  82 >;
  83
  84 defm : MUBUF_Load_Dword <i32, BUFFER_LOAD_DWORD_VI_OFFSET,
  85                          BUFFER_LOAD_DWORD_VI_OFFEN,
  86                          BUFFER_LOAD_DWORD_VI_IDXEN,
  87                          BUFFER_LOAD_DWORD_VI_BOTHEN>;
  88
  89 } // End Predicates = [isVI]