1 //===-- R600MachineScheduler.h - R600 Scheduler Interface -*- C++ -*-------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief R600 Machine Scheduler interface
13 //===----------------------------------------------------------------------===//
15 #ifndef R600MACHINESCHEDULER_H_
16 #define R600MACHINESCHEDULER_H_
18 #include "R600InstrInfo.h"
19 #include "llvm/ADT/PriorityQueue.h"
20 #include "llvm/CodeGen/MachineScheduler.h"
21 #include "llvm/Support/Debug.h"
27 class R600SchedStrategy : public MachineSchedStrategy {
29 const ScheduleDAGMI *DAG;
30 const R600InstrInfo *TII;
31 const R600RegisterInfo *TRI;
32 MachineRegisterInfo *MRI;
49 AluDiscarded, // LLVM Instructions that are going to be eliminated
53 std::vector<SUnit *> Available[IDLast], Pending[IDLast];
54 std::vector<SUnit *> AvailableAlus[AluLast];
58 InstKind NextInstKind;
60 int InstKindLimit[IDLast];
66 DAG(0), TII(0), TRI(0), MRI(0) {
69 virtual ~R600SchedStrategy() {
72 virtual void initialize(ScheduleDAGMI *dag);
73 virtual SUnit *pickNode(bool &IsTopNode);
74 virtual void schedNode(SUnit *SU, bool IsTopNode);
75 virtual void releaseTopNode(SUnit *SU);
76 virtual void releaseBottomNode(SUnit *SU);
79 std::vector<MachineInstr *> InstructionsGroupCandidate;
81 int getInstKind(SUnit *SU);
82 bool regBelongsToClass(unsigned Reg, const TargetRegisterClass *RC) const;
83 AluKind getAluKind(SUnit *SU) const;
85 bool isAvailablesAluEmpty() const;
86 SUnit *AttemptFillSlot (unsigned Slot);
87 void PrepareNextSlot();
88 SUnit *PopInst(std::vector<SUnit*> &Q);
90 void AssignSlot(MachineInstr *MI, unsigned Slot);
92 SUnit* pickOther(int QID);
93 void MoveUnits(std::vector<SUnit *> &QSrc, std::vector<SUnit *> &QDst);
98 #endif /* R600MACHINESCHEDULER_H_ */