1 //===-- AMDGPUAsmBackend.cpp - AMDGPU Assembler Backend -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
11 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
12 #include "llvm/ADT/StringRef.h"
13 #include "llvm/MC/MCAsmBackend.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCObjectWriter.h"
16 #include "llvm/MC/MCValue.h"
17 #include "llvm/Support/TargetRegistry.h"
23 class AMDGPUMCObjectWriter : public MCObjectWriter {
25 AMDGPUMCObjectWriter(raw_ostream &OS) : MCObjectWriter(OS, true) { }
26 virtual void ExecutePostLayoutBinding(MCAssembler &Asm,
27 const MCAsmLayout &Layout) {
28 //XXX: Implement if necessary.
30 virtual void RecordRelocation(const MCAssembler &Asm,
31 const MCAsmLayout &Layout,
32 const MCFragment *Fragment,
34 MCValue Target, uint64_t &FixedValue) {
35 assert(!"Not implemented");
38 virtual void WriteObject(MCAssembler &Asm, const MCAsmLayout &Layout);
42 class AMDGPUAsmBackend : public MCAsmBackend {
44 AMDGPUAsmBackend(const Target &T)
47 virtual AMDGPUMCObjectWriter *createObjectWriter(raw_ostream &OS) const;
48 virtual unsigned getNumFixupKinds() const { return 0; };
49 virtual void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
50 uint64_t Value) const;
51 virtual bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
52 const MCInstFragment *DF,
53 const MCAsmLayout &Layout) const {
56 virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
57 assert(!"Not implemented");
59 virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
60 virtual bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
65 } //End anonymous namespace
67 void AMDGPUMCObjectWriter::WriteObject(MCAssembler &Asm,
68 const MCAsmLayout &Layout) {
69 for (MCAssembler::iterator I = Asm.begin(), E = Asm.end(); I != E; ++I) {
70 Asm.writeSectionData(I, Layout);
74 MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T, StringRef TT,
76 return new AMDGPUAsmBackend(T);
79 AMDGPUMCObjectWriter * AMDGPUAsmBackend::createObjectWriter(
80 raw_ostream &OS) const {
81 return new AMDGPUMCObjectWriter(OS);
84 void AMDGPUAsmBackend::applyFixup(const MCFixup &Fixup, char *Data,
85 unsigned DataSize, uint64_t Value) const {
87 uint16_t *Dst = (uint16_t*)(Data + Fixup.getOffset());
88 assert(Fixup.getKind() == FK_PCRel_4);
89 *Dst = (Value - 4) / 4;