1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter -mc-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 add_public_tablegen_target(AMDGPUCommonTableGen)
14 add_llvm_target(R600CodeGen
16 AMDILCFGStructurizer.cpp
19 AMDILEvergreenDevice.cpp
20 AMDILFrameLowering.cpp
21 AMDILIntrinsicInfo.cpp
25 AMDILPeepholeOptimizer.cpp
30 AMDGPUTargetMachine.cpp
31 AMDGPUISelLowering.cpp
32 AMDGPUConvertToISA.cpp
34 AMDGPURegisterInfo.cpp
35 R600ExpandSpecialInstrs.cpp
38 R600MachineFunctionInfo.cpp
40 SIAssignInterpRegs.cpp
43 SILowerLiteralConstants.cpp
44 SILowerControlFlow.cpp
45 SIMachineFunctionInfo.cpp
50 add_dependencies(LLVMR600CodeGen intrinsics_gen)
52 add_subdirectory(InstPrinter)
53 add_subdirectory(TargetInfo)
54 add_subdirectory(MCTargetDesc)