1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
11 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
12 add_public_tablegen_target(AMDGPUCommonTableGen)
14 add_llvm_target(R600CodeGen
15 AMDILCFGStructurizer.cpp
16 AMDGPUAlwaysInlinePass.cpp
18 AMDGPUFrameLowering.cpp
19 AMDGPUIntrinsicInfo.cpp
20 AMDGPUISelDAGToDAG.cpp
22 AMDGPUMachineFunction.cpp
24 AMDGPUTargetMachine.cpp
25 AMDGPUTargetTransformInfo.cpp
26 AMDGPUISelLowering.cpp
28 AMDGPUPromoteAlloca.cpp
29 AMDGPURegisterInfo.cpp
30 R600ClauseMergePass.cpp
31 R600ControlFlowFinalizer.cpp
32 R600EmitClauseMarkers.cpp
33 R600ExpandSpecialInstrs.cpp
36 R600MachineFunctionInfo.cpp
37 R600MachineScheduler.cpp
38 R600OptimizeVectorRegisters.cpp
41 R600TextureIntrinsicsReplacer.cpp
42 SIAnnotateControlFlow.cpp
44 SIFixSGPRLiveRanges.cpp
48 SILoadStoreOptimizer.cpp
49 SILowerControlFlow.cpp
51 SIMachineFunctionInfo.cpp
53 SIShrinkInstructions.cpp
57 add_subdirectory(InstPrinter)
58 add_subdirectory(TargetInfo)
59 add_subdirectory(MCTargetDesc)