1 //=====-- AMDGPUSubtarget.h - Define Subtarget for the AMDIL ---*- C++ -*-====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //==-----------------------------------------------------------------------===//
11 /// \brief AMDGPU specific subclass of TargetSubtarget.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
16 #define LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
18 #include "AMDGPUFrameLowering.h"
19 #include "AMDGPUInstrInfo.h"
20 #include "AMDGPUIntrinsicInfo.h"
21 #include "AMDGPUSubtarget.h"
22 #include "R600ISelLowering.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/ADT/StringExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/Target/TargetSubtargetInfo.h"
28 #define GET_SUBTARGETINFO_HEADER
29 #include "AMDGPUGenSubtargetInfo.inc"
33 class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo {
51 short TexVTXClauseSize;
57 bool FlatAddressSpace;
58 bool EnableIRStructurizer;
59 bool EnablePromoteAlloca;
61 bool EnableLoadStoreOpt;
62 unsigned WavefrontSize;
67 AMDGPUFrameLowering FrameLowering;
68 std::unique_ptr<AMDGPUTargetLowering> TLInfo;
69 std::unique_ptr<AMDGPUInstrInfo> InstrInfo;
70 InstrItineraryData InstrItins;
73 AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS, TargetMachine &TM);
74 AMDGPUSubtarget &initializeSubtargetDependencies(StringRef GPU, StringRef FS);
76 const AMDGPUFrameLowering *getFrameLowering() const override {
77 return &FrameLowering;
79 const AMDGPUInstrInfo *getInstrInfo() const override {
80 return InstrInfo.get();
82 const AMDGPURegisterInfo *getRegisterInfo() const override {
83 return &InstrInfo->getRegisterInfo();
85 AMDGPUTargetLowering *getTargetLowering() const override {
88 const DataLayout *getDataLayout() const override { return &DL; }
89 const InstrItineraryData *getInstrItineraryData() const override {
93 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
95 bool is64bit() const {
99 bool hasVertexCache() const {
100 return HasVertexCache;
103 short getTexVTXClauseSize() const {
104 return TexVTXClauseSize;
107 Generation getGeneration() const {
111 bool hasHWFP64() const {
115 bool hasCaymanISA() const {
119 bool hasFP32Denormals() const {
120 return FP32Denormals;
123 bool hasFP64Denormals() const {
124 return FP64Denormals;
127 bool hasFlatAddressSpace() const {
128 return FlatAddressSpace;
131 bool hasBFE() const {
132 return (getGeneration() >= EVERGREEN);
135 bool hasBFI() const {
136 return (getGeneration() >= EVERGREEN);
139 bool hasBFM() const {
143 bool hasBCNT(unsigned Size) const {
145 return (getGeneration() >= EVERGREEN);
148 return (getGeneration() >= SOUTHERN_ISLANDS);
153 bool hasMulU24() const {
154 return (getGeneration() >= EVERGREEN);
157 bool hasMulI24() const {
158 return (getGeneration() >= SOUTHERN_ISLANDS ||
162 bool hasFFBL() const {
163 return (getGeneration() >= EVERGREEN);
166 bool hasFFBH() const {
167 return (getGeneration() >= EVERGREEN);
170 bool IsIRStructurizerEnabled() const {
171 return EnableIRStructurizer;
174 bool isPromoteAllocaEnabled() const {
175 return EnablePromoteAlloca;
178 bool isIfCvtEnabled() const {
182 bool loadStoreOptEnabled() const {
183 return EnableLoadStoreOpt;
186 unsigned getWavefrontSize() const {
187 return WavefrontSize;
190 unsigned getStackEntrySize() const;
192 bool hasCFAluBug() const {
193 assert(getGeneration() <= NORTHERN_ISLANDS);
197 int getLocalMemorySize() const {
198 return LocalMemorySize;
201 bool enableMachineScheduler() const override {
202 return getGeneration() <= NORTHERN_ISLANDS;
205 // Helper functions to simplify if statements
206 bool isTargetELF() const {
210 StringRef getDeviceName() const {
214 bool dumpCode() const {
217 bool r600ALUEncoding() const {
222 } // End namespace llvm