1 //=====-- AMDGPUSubtarget.h - Define Subtarget for the AMDIL ---*- C++ -*-====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //==-----------------------------------------------------------------------===//
11 /// \brief AMDGPU specific subclass of TargetSubtarget.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
16 #define LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
18 #include "AMDGPUFrameLowering.h"
19 #include "AMDGPUInstrInfo.h"
20 #include "AMDGPUIntrinsicInfo.h"
21 #include "AMDGPUSubtarget.h"
22 #include "R600ISelLowering.h"
23 #include "llvm/ADT/StringExtras.h"
24 #include "llvm/ADT/StringRef.h"
25 #include "llvm/IR/DataLayout.h"
26 #include "llvm/Target/TargetSubtargetInfo.h"
28 #define GET_SUBTARGETINFO_HEADER
29 #include "AMDGPUGenSubtargetInfo.inc"
33 class SIMachineFunctionInfo;
35 class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo {
54 short TexVTXClauseSize;
60 bool FlatAddressSpace;
61 bool EnableIRStructurizer;
62 bool EnablePromoteAlloca;
64 bool EnableLoadStoreOpt;
65 unsigned WavefrontSize;
68 bool EnableVGPRSpilling;
71 AMDGPUFrameLowering FrameLowering;
72 std::unique_ptr<AMDGPUTargetLowering> TLInfo;
73 std::unique_ptr<AMDGPUInstrInfo> InstrInfo;
74 InstrItineraryData InstrItins;
78 AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS, TargetMachine &TM);
79 AMDGPUSubtarget &initializeSubtargetDependencies(StringRef TT, StringRef GPU,
82 // FIXME: This routine needs to go away. See comments in
83 // AMDGPUTargetMachine.h.
84 const DataLayout *getDataLayout() const { return &DL; }
86 const AMDGPUFrameLowering *getFrameLowering() const override {
87 return &FrameLowering;
89 const AMDGPUInstrInfo *getInstrInfo() const override {
90 return InstrInfo.get();
92 const AMDGPURegisterInfo *getRegisterInfo() const override {
93 return &InstrInfo->getRegisterInfo();
95 AMDGPUTargetLowering *getTargetLowering() const override {
98 const InstrItineraryData *getInstrItineraryData() const override {
102 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
104 bool is64bit() const {
108 bool hasVertexCache() const {
109 return HasVertexCache;
112 short getTexVTXClauseSize() const {
113 return TexVTXClauseSize;
116 Generation getGeneration() const {
120 bool hasHWFP64() const {
124 bool hasCaymanISA() const {
128 bool hasFP32Denormals() const {
129 return FP32Denormals;
132 bool hasFP64Denormals() const {
133 return FP64Denormals;
136 bool hasFlatAddressSpace() const {
137 return FlatAddressSpace;
140 bool hasBFE() const {
141 return (getGeneration() >= EVERGREEN);
144 bool hasBFI() const {
145 return (getGeneration() >= EVERGREEN);
148 bool hasBFM() const {
152 bool hasBCNT(unsigned Size) const {
154 return (getGeneration() >= EVERGREEN);
157 return (getGeneration() >= SOUTHERN_ISLANDS);
162 bool hasMulU24() const {
163 return (getGeneration() >= EVERGREEN);
166 bool hasMulI24() const {
167 return (getGeneration() >= SOUTHERN_ISLANDS ||
171 bool hasFFBL() const {
172 return (getGeneration() >= EVERGREEN);
175 bool hasFFBH() const {
176 return (getGeneration() >= EVERGREEN);
179 bool IsIRStructurizerEnabled() const {
180 return EnableIRStructurizer;
183 bool isPromoteAllocaEnabled() const {
184 return EnablePromoteAlloca;
187 bool isIfCvtEnabled() const {
191 bool loadStoreOptEnabled() const {
192 return EnableLoadStoreOpt;
195 unsigned getWavefrontSize() const {
196 return WavefrontSize;
199 unsigned getStackEntrySize() const;
201 bool hasCFAluBug() const {
202 assert(getGeneration() <= NORTHERN_ISLANDS);
206 int getLocalMemorySize() const {
207 return LocalMemorySize;
210 unsigned getAmdKernelCodeChipID() const;
212 bool enableMachineScheduler() const override {
213 return getGeneration() <= NORTHERN_ISLANDS;
216 // Helper functions to simplify if statements
217 bool isTargetELF() const {
221 StringRef getDeviceName() const {
225 bool dumpCode() const {
228 bool r600ALUEncoding() const {
231 bool isAmdHsaOS() const {
232 return TargetTriple.getOS() == Triple::AMDHSA;
234 bool isVGPRSpillingEnabled(const SIMachineFunctionInfo *MFI) const;
237 } // End namespace llvm