1 //===-- AMDGPUStructurizeCFG.cpp - ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// The pass implemented in this file transforms the programs control flow
12 /// graph into a form that's suitable for code generation on hardware that
13 /// implements control flow by execution masking. This currently includes all
14 /// AMD GPUs but may as well be useful for other types of hardware.
16 //===----------------------------------------------------------------------===//
19 #include "llvm/ADT/SCCIterator.h"
20 #include "llvm/Analysis/RegionInfo.h"
21 #include "llvm/Analysis/RegionIterator.h"
22 #include "llvm/Analysis/RegionPass.h"
23 #include "llvm/IR/Module.h"
24 #include "llvm/Transforms/Utils/SSAUpdater.h"
30 // Definition of the complex types used in this pass.
32 typedef std::pair<BasicBlock *, Value *> BBValuePair;
34 typedef SmallVector<RegionNode*, 8> RNVector;
35 typedef SmallVector<BasicBlock*, 8> BBVector;
36 typedef SmallVector<BranchInst*, 8> BranchVector;
37 typedef SmallVector<BBValuePair, 2> BBValueVector;
39 typedef SmallPtrSet<BasicBlock *, 8> BBSet;
41 typedef DenseMap<PHINode *, BBValueVector> PhiMap;
42 typedef DenseMap<DomTreeNode *, unsigned> DTN2UnsignedMap;
43 typedef DenseMap<BasicBlock *, PhiMap> BBPhiMap;
44 typedef DenseMap<BasicBlock *, Value *> BBPredicates;
45 typedef DenseMap<BasicBlock *, BBPredicates> PredMap;
46 typedef DenseMap<BasicBlock *, BBVector> BB2BBVecMap;
48 // The name for newly created blocks.
50 static const char *FlowBlockName = "Flow";
52 /// @brief Find the nearest common dominator for multiple BasicBlocks
54 /// Helper class for AMDGPUStructurizeCFG
55 /// TODO: Maybe move into common code
56 class NearestCommonDominator {
60 DTN2UnsignedMap IndexMap;
64 bool ExplicitMentioned;
67 /// \brief Start a new query
68 NearestCommonDominator(DominatorTree *DomTree) {
73 /// \brief Add BB to the resulting dominator
74 void addBlock(BasicBlock *BB, bool Remember = true) {
76 DomTreeNode *Node = DT->getNode(BB);
79 unsigned Numbering = 0;
80 for (;Node;Node = Node->getIDom())
81 IndexMap[Node] = ++Numbering;
84 ExplicitMentioned = Remember;
88 for (;Node;Node = Node->getIDom())
89 if (IndexMap.count(Node))
94 assert(Node && "Dominator tree invalid!");
96 unsigned Numbering = IndexMap[Node];
97 if (Numbering > ResultIndex) {
98 Result = Node->getBlock();
99 ResultIndex = Numbering;
100 ExplicitMentioned = Remember && (Result == BB);
101 } else if (Numbering == ResultIndex) {
102 ExplicitMentioned |= Remember;
106 /// \brief Is "Result" one of the BBs added with "Remember" = True?
107 bool wasResultExplicitMentioned() {
108 return ExplicitMentioned;
111 /// \brief Get the query result
112 BasicBlock *getResult() {
117 /// @brief Transforms the control flow graph on one single entry/exit region
120 /// After the transform all "If"/"Then"/"Else" style control flow looks like
132 /// | | 1 = "If" block, calculates the condition
133 /// 4 | 2 = "Then" subregion, runs if the condition is true
134 /// | / 3 = "Flow" blocks, newly inserted flow blocks, rejoins the flow
135 /// |/ 4 = "Else" optional subregion, runs if the condition is false
136 /// 5 5 = "End" block, also rejoins the control flow
139 /// Control flow is expressed as a branch where the true exit goes into the
140 /// "Then"/"Else" region, while the false exit skips the region
141 /// The condition for the optional "Else" region is expressed as a PHI node.
142 /// The incomming values of the PHI node are true for the "If" edge and false
143 /// for the "Then" edge.
145 /// Additionally to that even complicated loops look like this:
152 /// | / 1 = "Entry" block
153 /// |/ 2 = "Loop" optional subregion, with all exits at "Flow" block
154 /// 3 3 = "Flow" block, with back edge to entry block
158 /// The back edge of the "Flow" block is always on the false side of the branch
159 /// while the true side continues the general flow. So the loop condition
160 /// consist of a network of PHI nodes where the true incoming values expresses
161 /// breaks and the false values expresses continue states.
162 class AMDGPUStructurizeCFG : public RegionPass {
167 ConstantInt *BoolTrue;
168 ConstantInt *BoolFalse;
169 UndefValue *BoolUndef;
172 Region *ParentRegion;
179 BBPhiMap DeletedPhis;
180 BB2BBVecMap AddedPhis;
181 BranchVector Conditions;
183 BasicBlock *LoopStart;
186 BBPredicates LoopPred;
190 Value *buildCondition(BranchInst *Term, unsigned Idx, bool Invert);
192 bool analyzeLoopStart(BasicBlock *From, BasicBlock *To, Value *Condition);
194 void analyzeNode(RegionNode *N);
196 void analyzeLoopEnd(RegionNode *N);
200 void insertConditions();
202 void delPhiValues(BasicBlock *From, BasicBlock *To);
204 void addPhiValues(BasicBlock *From, BasicBlock *To);
208 void killTerminator(BasicBlock *BB);
210 void changeExit(RegionNode *Node, BasicBlock *NewExit,
211 bool IncludeDominator);
213 BasicBlock *getNextFlow(BasicBlock *Dominator);
215 BasicBlock *needPrefix(RegionNode *&Prev, RegionNode *Node);
217 BasicBlock *needPostfix(BasicBlock *Flow, bool ExitUseAllowed);
219 RegionNode *getNextPrev(BasicBlock *Next);
221 bool dominatesPredicates(BasicBlock *BB, RegionNode *Node);
223 bool isPredictableTrue(RegionNode *Who, RegionNode *Where);
225 RegionNode *wireFlow(RegionNode *&Prev, bool ExitUseAllowed);
232 AMDGPUStructurizeCFG():
235 initializeRegionInfoPass(*PassRegistry::getPassRegistry());
238 virtual bool doInitialization(Region *R, RGPassManager &RGM);
240 virtual bool runOnRegion(Region *R, RGPassManager &RGM);
242 virtual const char *getPassName() const {
243 return "AMDGPU simplify control flow";
246 void getAnalysisUsage(AnalysisUsage &AU) const {
248 AU.addRequired<DominatorTree>();
249 AU.addPreserved<DominatorTree>();
250 RegionPass::getAnalysisUsage(AU);
255 } // end anonymous namespace
257 char AMDGPUStructurizeCFG::ID = 0;
259 /// \brief Initialize the types and constants used in the pass
260 bool AMDGPUStructurizeCFG::doInitialization(Region *R, RGPassManager &RGM) {
261 LLVMContext &Context = R->getEntry()->getContext();
263 Boolean = Type::getInt1Ty(Context);
264 BoolTrue = ConstantInt::getTrue(Context);
265 BoolFalse = ConstantInt::getFalse(Context);
266 BoolUndef = UndefValue::get(Boolean);
271 /// \brief Build up the general order of nodes
272 void AMDGPUStructurizeCFG::orderNodes() {
273 scc_iterator<Region *> I = scc_begin(ParentRegion),
274 E = scc_end(ParentRegion);
275 for (Order.clear(); I != E; ++I) {
276 std::vector<RegionNode *> &Nodes = *I;
277 Order.append(Nodes.begin(), Nodes.end());
281 /// \brief Build the condition for one edge
282 Value *AMDGPUStructurizeCFG::buildCondition(BranchInst *Term, unsigned Idx,
284 Value *Cond = Invert ? BoolFalse : BoolTrue;
285 if (Term->isConditional()) {
286 Cond = Term->getCondition();
289 Cond = BinaryOperator::CreateNot(Cond, "", Term);
294 /// \brief Analyze the start of a loop and insert predicates as necessary
295 bool AMDGPUStructurizeCFG::analyzeLoopStart(BasicBlock *From, BasicBlock *To,
297 LoopPred[From] = Condition;
298 LoopTargets.insert(To);
303 } else if (LoopStart == To)
306 // We need to handle the case of intersecting loops, e. g.
310 // -> A -> B -> C -> D
314 RNVector::reverse_iterator OI = Order.rbegin(), OE = Order.rend();
316 for (;OI != OE; ++OI)
317 if ((*OI)->getEntry() == LoopStart)
320 for (;OI != OE && (*OI)->getEntry() != To; ++OI) {
321 BBPredicates &Pred = Predicates[(*OI)->getEntry()];
322 if (!Pred.count(From))
323 Pred[From] = Condition;
328 /// \brief Analyze the predecessors of each block and build up predicates
329 void AMDGPUStructurizeCFG::analyzeNode(RegionNode *N) {
330 RegionInfo *RI = ParentRegion->getRegionInfo();
331 BasicBlock *BB = N->getEntry();
332 BBPredicates &Pred = Predicates[BB];
334 for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
337 if (!ParentRegion->contains(*PI)) {
338 // It's a branch from outside into our region entry
339 Pred[*PI] = BoolTrue;
343 Region *R = RI->getRegionFor(*PI);
344 if (R == ParentRegion) {
346 // It's a top level block in our region
347 BranchInst *Term = cast<BranchInst>((*PI)->getTerminator());
348 for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
349 BasicBlock *Succ = Term->getSuccessor(i);
353 if (Visited.count(*PI)) {
354 // Normal forward edge
355 if (Term->isConditional()) {
356 // Try to treat it like an ELSE block
357 BasicBlock *Other = Term->getSuccessor(!i);
358 if (Visited.count(Other) && !LoopTargets.count(Other) &&
359 !Pred.count(Other) && !Pred.count(*PI)) {
361 Pred[Other] = BoolFalse;
362 Pred[*PI] = BoolTrue;
369 if (analyzeLoopStart(*PI, BB, buildCondition(Term, i, true)))
372 Pred[*PI] = buildCondition(Term, i, false);
377 // It's an exit from a sub region
378 while(R->getParent() != ParentRegion)
381 // Edge from inside a subregion to its entry, ignore it
385 BasicBlock *Entry = R->getEntry();
386 if (!Visited.count(Entry))
387 if (analyzeLoopStart(Entry, BB, BoolFalse))
390 Pred[Entry] = BoolTrue;
395 /// \brief Determine the end of the loop
396 void AMDGPUStructurizeCFG::analyzeLoopEnd(RegionNode *N) {
398 if (N->isSubRegion()) {
399 // Test for exit as back edge
400 BasicBlock *Exit = N->getNodeAs<Region>()->getExit();
401 if (Visited.count(Exit))
402 LoopEnd = N->getEntry();
405 // Test for sucessors as back edge
406 BasicBlock *BB = N->getNodeAs<BasicBlock>();
407 BranchInst *Term = cast<BranchInst>(BB->getTerminator());
409 for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
410 BasicBlock *Succ = Term->getSuccessor(i);
412 if (Visited.count(Succ))
418 /// \brief Collect various loop and predicate infos
419 void AMDGPUStructurizeCFG::collectInfos() {
425 LoopStart = LoopEnd = 0;
429 // Reset the visited nodes
432 for (RNVector::reverse_iterator OI = Order.rbegin(), OE = Order.rend();
435 // Analyze all the conditions leading to a node
438 // Remember that we've seen this node
439 Visited.insert((*OI)->getEntry());
441 // Find the last back edge
445 // Both or neither must be set
446 assert(!LoopStart == !LoopEnd);
449 /// \brief Insert the missing branch conditions
450 void AMDGPUStructurizeCFG::insertConditions() {
451 SSAUpdater PhiInserter;
453 for (BranchVector::iterator I = Conditions.begin(),
454 E = Conditions.end(); I != E; ++I) {
456 BranchInst *Term = *I;
457 BasicBlock *Parent = Term->getParent();
459 assert(Term->isConditional());
461 PhiInserter.Initialize(Boolean, "");
462 if (Parent == LoopEnd) {
463 PhiInserter.AddAvailableValue(LoopStart, BoolTrue);
465 PhiInserter.AddAvailableValue(&Func->getEntryBlock(), BoolFalse);
466 PhiInserter.AddAvailableValue(Parent, BoolFalse);
469 bool ParentHasValue = false;
470 BasicBlock *Succ = Term->getSuccessor(0);
471 BBPredicates &Preds = (Parent == LoopEnd) ? LoopPred : Predicates[Succ];
472 for (BBPredicates::iterator PI = Preds.begin(), PE = Preds.end();
475 PhiInserter.AddAvailableValue(PI->first, PI->second);
476 ParentHasValue |= PI->first == Parent;
480 Term->setCondition(PhiInserter.GetValueAtEndOfBlock(Parent));
482 Term->setCondition(PhiInserter.GetValueInMiddleOfBlock(Parent));
486 /// \brief Remove all PHI values coming from "From" into "To" and remember
487 /// them in DeletedPhis
488 void AMDGPUStructurizeCFG::delPhiValues(BasicBlock *From, BasicBlock *To) {
489 PhiMap &Map = DeletedPhis[To];
490 for (BasicBlock::iterator I = To->begin(), E = To->end();
491 I != E && isa<PHINode>(*I);) {
493 PHINode &Phi = cast<PHINode>(*I++);
494 while (Phi.getBasicBlockIndex(From) != -1) {
495 Value *Deleted = Phi.removeIncomingValue(From, false);
496 Map[&Phi].push_back(std::make_pair(From, Deleted));
501 /// \brief Add a dummy PHI value as soon as we knew the new predecessor
502 void AMDGPUStructurizeCFG::addPhiValues(BasicBlock *From, BasicBlock *To) {
503 for (BasicBlock::iterator I = To->begin(), E = To->end();
504 I != E && isa<PHINode>(*I);) {
506 PHINode &Phi = cast<PHINode>(*I++);
507 Value *Undef = UndefValue::get(Phi.getType());
508 Phi.addIncoming(Undef, From);
510 AddedPhis[To].push_back(From);
513 /// \brief Add the real PHI value as soon as everything is set up
514 void AMDGPUStructurizeCFG::setPhiValues() {
517 for (BB2BBVecMap::iterator AI = AddedPhis.begin(), AE = AddedPhis.end();
520 BasicBlock *To = AI->first;
521 BBVector &From = AI->second;
523 if (!DeletedPhis.count(To))
526 PhiMap &Map = DeletedPhis[To];
527 for (PhiMap::iterator PI = Map.begin(), PE = Map.end();
530 PHINode *Phi = PI->first;
531 Value *Undef = UndefValue::get(Phi->getType());
532 Updater.Initialize(Phi->getType(), "");
533 Updater.AddAvailableValue(&Func->getEntryBlock(), Undef);
534 Updater.AddAvailableValue(To, Undef);
536 for (BBValueVector::iterator VI = PI->second.begin(),
537 VE = PI->second.end(); VI != VE; ++VI) {
539 Updater.AddAvailableValue(VI->first, VI->second);
542 for (BBVector::iterator FI = From.begin(), FE = From.end();
545 int Idx = Phi->getBasicBlockIndex(*FI);
547 Phi->setIncomingValue(Idx, Updater.GetValueAtEndOfBlock(*FI));
551 DeletedPhis.erase(To);
553 assert(DeletedPhis.empty());
556 /// \brief Remove phi values from all successors and then remove the terminator.
557 void AMDGPUStructurizeCFG::killTerminator(BasicBlock *BB) {
558 TerminatorInst *Term = BB->getTerminator();
562 for (succ_iterator SI = succ_begin(BB), SE = succ_end(BB);
565 delPhiValues(BB, *SI);
568 Term->eraseFromParent();
571 /// \brief Let node exit(s) point to NewExit
572 void AMDGPUStructurizeCFG::changeExit(RegionNode *Node, BasicBlock *NewExit,
573 bool IncludeDominator) {
575 if (Node->isSubRegion()) {
576 Region *SubRegion = Node->getNodeAs<Region>();
577 BasicBlock *OldExit = SubRegion->getExit();
578 BasicBlock *Dominator = 0;
580 // Find all the edges from the sub region to the exit
581 for (pred_iterator I = pred_begin(OldExit), E = pred_end(OldExit);
584 BasicBlock *BB = *I++;
585 if (!SubRegion->contains(BB))
588 // Modify the edges to point to the new exit
589 delPhiValues(BB, OldExit);
590 BB->getTerminator()->replaceUsesOfWith(OldExit, NewExit);
591 addPhiValues(BB, NewExit);
593 // Find the new dominator (if requested)
594 if (IncludeDominator) {
598 Dominator = DT->findNearestCommonDominator(Dominator, BB);
602 // Change the dominator (if requested)
604 DT->changeImmediateDominator(NewExit, Dominator);
606 // Update the region info
607 SubRegion->replaceExit(NewExit);
610 BasicBlock *BB = Node->getNodeAs<BasicBlock>();
612 BranchInst::Create(NewExit, BB);
613 addPhiValues(BB, NewExit);
614 if (IncludeDominator)
615 DT->changeImmediateDominator(NewExit, BB);
619 /// \brief Create a new flow node and update dominator tree and region info
620 BasicBlock *AMDGPUStructurizeCFG::getNextFlow(BasicBlock *Dominator) {
621 LLVMContext &Context = Func->getContext();
622 BasicBlock *Insert = Order.empty() ? ParentRegion->getExit() :
623 Order.back()->getEntry();
624 BasicBlock *Flow = BasicBlock::Create(Context, FlowBlockName,
626 DT->addNewBlock(Flow, Dominator);
627 ParentRegion->getRegionInfo()->setRegionFor(Flow, ParentRegion);
631 /// \brief Create a new or reuse the previous node as flow node
632 BasicBlock *AMDGPUStructurizeCFG::needPrefix(RegionNode *&Prev,
635 if (!Prev || Prev->isSubRegion() ||
636 (Node && Node->getEntry() == LoopStart)) {
638 // We need to insert a flow node, first figure out the dominator
639 DomTreeNode *Dominator = Prev ? DT->getNode(Prev->getEntry()) : 0;
641 Dominator = DT->getNode(Node->getEntry())->getIDom();
642 assert(Dominator && "Illegal loop to function entry");
644 // then create the flow node
645 BasicBlock *Flow = getNextFlow(Dominator->getBlock());
647 // wire up the new flow
649 changeExit(Prev, Flow, true);
651 // Parent regions entry needs predicates, create a new region entry
652 BasicBlock *Entry = Node->getEntry();
653 for (pred_iterator I = pred_begin(Entry), E = pred_end(Entry);
656 BasicBlock *BB = *(I++);
657 if (ParentRegion->contains(BB))
660 // Remove PHY values from outside to our entry node
661 delPhiValues(BB, Entry);
663 // Update the branch instructions
664 BB->getTerminator()->replaceUsesOfWith(Entry, Flow);
667 // Populate the region tree with the new entry
668 for (Region *R = ParentRegion; R && R->getEntry() == Entry;
669 R = R->getParent()) {
670 R->replaceEntry(Flow);
673 Prev = ParentRegion->getBBNode(Flow);
676 killTerminator(Prev->getEntry());
679 return Prev->getEntry();
682 /// \brief Returns the region exit if possible, otherwise just a new flow node
683 BasicBlock *AMDGPUStructurizeCFG::needPostfix(BasicBlock *Flow,
684 bool ExitUseAllowed) {
686 if (Order.empty() && ExitUseAllowed) {
687 BasicBlock *Exit = ParentRegion->getExit();
688 DT->changeImmediateDominator(Exit, Flow);
689 addPhiValues(Flow, Exit);
692 return getNextFlow(Flow);
695 /// \brief Returns the region node for Netx, or null if Next is the exit
696 RegionNode *AMDGPUStructurizeCFG::getNextPrev(BasicBlock *Next) {
697 return ParentRegion->contains(Next) ? ParentRegion->getBBNode(Next) : 0;
700 /// \brief Does BB dominate all the predicates of Node ?
701 bool AMDGPUStructurizeCFG::dominatesPredicates(BasicBlock *BB, RegionNode *Node) {
702 BBPredicates &Preds = Predicates[Node->getEntry()];
703 for (BBPredicates::iterator PI = Preds.begin(), PE = Preds.end();
706 if (!DT->dominates(BB, PI->first))
712 /// \brief Can we predict that this node will always be called?
713 bool AMDGPUStructurizeCFG::isPredictableTrue(RegionNode *Who,
716 BBPredicates &Preds = Predicates[Who->getEntry()];
717 bool Dominated = Where == 0;
719 for (BBPredicates::iterator I = Preds.begin(), E = Preds.end();
722 if (I->second != BoolTrue)
725 if (!Dominated && DT->dominates(I->first, Where->getEntry()))
729 // TODO: The dominator check is too strict
733 /// Take one node from the order vector and wire it up
734 RegionNode *AMDGPUStructurizeCFG::wireFlow(RegionNode *&Prev,
735 bool ExitUseAllowed) {
737 RegionNode *Node = Order.pop_back_val();
739 if (isPredictableTrue(Node, Prev)) {
740 // Just a linear flow
742 changeExit(Prev, Node->getEntry(), true);
747 // Insert extra prefix node (or reuse last one)
748 BasicBlock *Flow = needPrefix(Prev, Node);
749 if (Node->getEntry() == LoopStart)
752 // Insert extra postfix node (or use exit instead)
753 BasicBlock *Entry = Node->getEntry();
754 BasicBlock *Next = needPostfix(Flow, ExitUseAllowed && Entry != LoopEnd);
756 // let it point to entry and next block
757 Conditions.push_back(BranchInst::Create(Entry, Next, BoolUndef, Flow));
758 addPhiValues(Flow, Entry);
759 DT->changeImmediateDominator(Entry, Flow);
762 while (!Order.empty() && Node->getEntry() != LoopEnd &&
763 !LoopTargets.count(Order.back()->getEntry()) &&
764 dominatesPredicates(Entry, Order.back())) {
765 Node = wireFlow(Prev, false);
768 changeExit(Prev, Next, false);
769 Prev = getNextPrev(Next);
775 /// After this function control flow looks like it should be, but
776 /// branches and PHI nodes only have undefined conditions.
777 void AMDGPUStructurizeCFG::createFlow() {
779 BasicBlock *Exit = ParentRegion->getExit();
780 bool EntryDominatesExit = DT->dominates(ParentRegion->getEntry(), Exit);
786 RegionNode *Prev = 0;
787 while (!Order.empty()) {
789 RegionNode *Node = wireFlow(Prev, EntryDominatesExit);
791 // Create an extra loop end node
792 if (Node->getEntry() == LoopEnd) {
793 LoopEnd = needPrefix(Prev, 0);
794 BasicBlock *Next = needPostfix(LoopEnd, EntryDominatesExit);
796 Conditions.push_back(BranchInst::Create(Next, LoopStart,
797 BoolUndef, LoopEnd));
798 addPhiValues(LoopEnd, LoopStart);
799 Prev = getNextPrev(Next);
804 changeExit(Prev, Exit, EntryDominatesExit);
806 assert(EntryDominatesExit);
809 /// Handle a rare case where the disintegrated nodes instructions
810 /// no longer dominate all their uses. Not sure if this is really nessasary
811 void AMDGPUStructurizeCFG::rebuildSSA() {
813 for (Region::block_iterator I = ParentRegion->block_begin(),
814 E = ParentRegion->block_end();
818 for (BasicBlock::iterator II = BB->begin(), IE = BB->end();
821 bool Initialized = false;
822 for (Use *I = &II->use_begin().getUse(), *Next; I; I = Next) {
826 Instruction *User = cast<Instruction>(I->getUser());
827 if (User->getParent() == BB) {
830 } else if (PHINode *UserPN = dyn_cast<PHINode>(User)) {
831 if (UserPN->getIncomingBlock(*I) == BB)
835 if (DT->dominates(II, User))
839 Value *Undef = UndefValue::get(II->getType());
840 Updater.Initialize(II->getType(), "");
841 Updater.AddAvailableValue(&Func->getEntryBlock(), Undef);
842 Updater.AddAvailableValue(BB, II);
845 Updater.RewriteUseAfterInsertions(*I);
851 /// \brief Run the transformation for each region found
852 bool AMDGPUStructurizeCFG::runOnRegion(Region *R, RGPassManager &RGM) {
853 if (R->isTopLevelRegion())
856 Func = R->getEntry()->getParent();
859 DT = &getAnalysis<DominatorTree>();
881 /// \brief Create the pass
882 Pass *llvm::createAMDGPUStructurizeCFGPass() {
883 return new AMDGPUStructurizeCFG();