1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef PPC_TARGETMACHINE_H
15 #define PPC_TARGETMACHINE_H
17 #include "PPCInstrInfo.h"
18 #include "PPCSubtarget.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/Target/TargetMachine.h"
24 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
26 class PPCTargetMachine : public LLVMTargetMachine {
27 PPCSubtarget Subtarget;
30 PPCTargetMachine(const Target &T, StringRef TT,
31 StringRef CPU, StringRef FS, const TargetOptions &Options,
32 Reloc::Model RM, CodeModel::Model CM,
33 CodeGenOpt::Level OL, bool is64Bit);
35 const PPCInstrInfo *getInstrInfo() const override {
36 return getSubtargetImpl()->getInstrInfo();
38 const PPCFrameLowering *getFrameLowering() const override {
39 return getSubtargetImpl()->getFrameLowering();
41 PPCJITInfo *getJITInfo() override { return getSubtargetImpl()->getJITInfo(); }
42 const PPCTargetLowering *getTargetLowering() const override {
43 return getSubtargetImpl()->getTargetLowering();
45 const PPCSelectionDAGInfo* getSelectionDAGInfo() const override {
46 return getSubtargetImpl()->getSelectionDAGInfo();
48 const PPCRegisterInfo *getRegisterInfo() const override {
49 return &getInstrInfo()->getRegisterInfo();
52 const DataLayout *getDataLayout() const override {
53 return getSubtargetImpl()->getDataLayout();
55 const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }
56 PPCSubtarget *getSubtargetImpl() override { return &Subtarget; }
57 const InstrItineraryData *getInstrItineraryData() const override {
58 return &getSubtargetImpl()->getInstrItineraryData();
61 // Pass Pipeline Configuration
62 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
63 bool addCodeEmitter(PassManagerBase &PM,
64 JITCodeEmitter &JCE) override;
66 /// \brief Register PPC analysis passes with a pass manager.
67 void addAnalysisPasses(PassManagerBase &PM) override;
70 /// PPC32TargetMachine - PowerPC 32-bit target machine.
72 class PPC32TargetMachine : public PPCTargetMachine {
73 virtual void anchor();
75 PPC32TargetMachine(const Target &T, StringRef TT,
76 StringRef CPU, StringRef FS, const TargetOptions &Options,
77 Reloc::Model RM, CodeModel::Model CM,
78 CodeGenOpt::Level OL);
81 /// PPC64TargetMachine - PowerPC 64-bit target machine.
83 class PPC64TargetMachine : public PPCTargetMachine {
84 virtual void anchor();
86 PPC64TargetMachine(const Target &T, StringRef TT,
87 StringRef CPU, StringRef FS, const TargetOptions &Options,
88 Reloc::Model RM, CodeModel::Model CM,
89 CodeGenOpt::Level OL);
92 } // end namespace llvm