1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the PowerPC specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef PPC_TARGETMACHINE_H
15 #define PPC_TARGETMACHINE_H
17 #include "PPCFrameLowering.h"
18 #include "PPCISelLowering.h"
19 #include "PPCInstrInfo.h"
20 #include "PPCJITInfo.h"
21 #include "PPCSelectionDAGInfo.h"
22 #include "PPCSubtarget.h"
23 #include "llvm/IR/DataLayout.h"
24 #include "llvm/Target/TargetMachine.h"
28 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets.
30 class PPCTargetMachine : public LLVMTargetMachine {
31 PPCSubtarget Subtarget;
34 PPCTargetMachine(const Target &T, StringRef TT,
35 StringRef CPU, StringRef FS, const TargetOptions &Options,
36 Reloc::Model RM, CodeModel::Model CM,
37 CodeGenOpt::Level OL, bool is64Bit);
39 const PPCInstrInfo *getInstrInfo() const override {
40 return getSubtargetImpl()->getInstrInfo();
42 const PPCFrameLowering *getFrameLowering() const override {
43 return getSubtargetImpl()->getFrameLowering();
45 PPCJITInfo *getJITInfo() override { return Subtarget.getJITInfo(); }
46 const PPCTargetLowering *getTargetLowering() const override {
47 return getSubtargetImpl()->getTargetLowering();
49 const PPCSelectionDAGInfo* getSelectionDAGInfo() const override {
50 return getSubtargetImpl()->getSelectionDAGInfo();
52 const PPCRegisterInfo *getRegisterInfo() const override {
53 return &getInstrInfo()->getRegisterInfo();
56 const DataLayout *getDataLayout() const override {
57 return getSubtargetImpl()->getDataLayout();
59 const PPCSubtarget *getSubtargetImpl() const override { return &Subtarget; }
60 const InstrItineraryData *getInstrItineraryData() const override {
61 return &getSubtargetImpl()->getInstrItineraryData();
64 // Pass Pipeline Configuration
65 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
66 bool addCodeEmitter(PassManagerBase &PM,
67 JITCodeEmitter &JCE) override;
69 /// \brief Register PPC analysis passes with a pass manager.
70 void addAnalysisPasses(PassManagerBase &PM) override;
73 /// PPC32TargetMachine - PowerPC 32-bit target machine.
75 class PPC32TargetMachine : public PPCTargetMachine {
76 virtual void anchor();
78 PPC32TargetMachine(const Target &T, StringRef TT,
79 StringRef CPU, StringRef FS, const TargetOptions &Options,
80 Reloc::Model RM, CodeModel::Model CM,
81 CodeGenOpt::Level OL);
84 /// PPC64TargetMachine - PowerPC 64-bit target machine.
86 class PPC64TargetMachine : public PPCTargetMachine {
87 virtual void anchor();
89 PPC64TargetMachine(const Target &T, StringRef TT,
90 StringRef CPU, StringRef FS, const TargetOptions &Options,
91 Reloc::Model RM, CodeModel::Model CM,
92 CodeGenOpt::Level OL);
95 } // end namespace llvm