1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
14 #include "PPCTargetMachine.h"
16 #include "PPCTargetObjectFile.h"
17 #include "llvm/CodeGen/Passes.h"
18 #include "llvm/IR/Function.h"
19 #include "llvm/MC/MCStreamer.h"
20 #include "llvm/PassManager.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/FormattedStream.h"
23 #include "llvm/Support/TargetRegistry.h"
24 #include "llvm/Target/TargetOptions.h"
25 #include "llvm/Transforms/Scalar.h"
29 opt<bool> DisableCTRLoops("disable-ppc-ctrloops", cl::Hidden,
30 cl::desc("Disable CTR loops for PPC"));
33 VSXFMAMutateEarly("schedule-ppc-vsx-fma-mutation-early",
34 cl::Hidden, cl::desc("Schedule VSX FMA instruction mutation early"));
37 EnableGEPOpt("ppc-gep-opt", cl::Hidden,
38 cl::desc("Enable optimizations on complex GEPs"),
41 extern "C" void LLVMInitializePowerPCTarget() {
42 // Register the targets
43 RegisterTargetMachine<PPC32TargetMachine> A(ThePPC32Target);
44 RegisterTargetMachine<PPC64TargetMachine> B(ThePPC64Target);
45 RegisterTargetMachine<PPC64TargetMachine> C(ThePPC64LETarget);
48 static std::string computeFSAdditions(StringRef FS, CodeGenOpt::Level OL, StringRef TT) {
49 std::string FullFS = FS;
50 Triple TargetTriple(TT);
52 // Make sure 64-bit features are available when CPUname is generic
53 if (TargetTriple.getArch() == Triple::ppc64 ||
54 TargetTriple.getArch() == Triple::ppc64le) {
56 FullFS = "+64bit," + FullFS;
61 if (OL >= CodeGenOpt::Default) {
63 FullFS = "+crbits," + FullFS;
68 if (OL != CodeGenOpt::None) {
70 FullFS = "+invariant-function-descriptors," + FullFS;
72 FullFS = "+invariant-function-descriptors";
78 static std::unique_ptr<TargetLoweringObjectFile> createTLOF(const Triple &TT) {
79 // If it isn't a Mach-O file then it's going to be a linux ELF
82 return make_unique<TargetLoweringObjectFileMachO>();
84 return make_unique<PPC64LinuxTargetObjectFile>();
87 // The FeatureString here is a little subtle. We are modifying the feature string
88 // with what are (currently) non-function specific overrides as it goes into the
89 // LLVMTargetMachine constructor and then using the stored value in the
90 // Subtarget constructor below it.
91 PPCTargetMachine::PPCTargetMachine(const Target &T, StringRef TT, StringRef CPU,
92 StringRef FS, const TargetOptions &Options,
93 Reloc::Model RM, CodeModel::Model CM,
95 : LLVMTargetMachine(T, TT, CPU, computeFSAdditions(FS, OL, TT), Options, RM,
97 TLOF(createTLOF(Triple(getTargetTriple()))),
98 Subtarget(TT, CPU, TargetFS, *this) {
102 PPCTargetMachine::~PPCTargetMachine() {}
104 void PPC32TargetMachine::anchor() { }
106 PPC32TargetMachine::PPC32TargetMachine(const Target &T, StringRef TT,
107 StringRef CPU, StringRef FS,
108 const TargetOptions &Options,
109 Reloc::Model RM, CodeModel::Model CM,
110 CodeGenOpt::Level OL)
111 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
114 void PPC64TargetMachine::anchor() { }
116 PPC64TargetMachine::PPC64TargetMachine(const Target &T, StringRef TT,
117 StringRef CPU, StringRef FS,
118 const TargetOptions &Options,
119 Reloc::Model RM, CodeModel::Model CM,
120 CodeGenOpt::Level OL)
121 : PPCTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
125 PPCTargetMachine::getSubtargetImpl(const Function &F) const {
126 AttributeSet FnAttrs = F.getAttributes();
128 FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-cpu");
130 FnAttrs.getAttribute(AttributeSet::FunctionIndex, "target-features");
132 std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
133 ? CPUAttr.getValueAsString().str()
135 std::string FS = !FSAttr.hasAttribute(Attribute::None)
136 ? FSAttr.getValueAsString().str()
139 auto &I = SubtargetMap[CPU + FS];
141 // This needs to be done before we create a new subtarget since any
142 // creation will depend on the TM and the code generation flags on the
143 // function that reside in TargetOptions.
144 resetTargetOptions(F);
145 I = llvm::make_unique<PPCSubtarget>(TargetTriple, CPU, FS, *this);
150 //===----------------------------------------------------------------------===//
151 // Pass Pipeline Configuration
152 //===----------------------------------------------------------------------===//
155 /// PPC Code Generator Pass Configuration Options.
156 class PPCPassConfig : public TargetPassConfig {
158 PPCPassConfig(PPCTargetMachine *TM, PassManagerBase &PM)
159 : TargetPassConfig(TM, PM) {}
161 PPCTargetMachine &getPPCTargetMachine() const {
162 return getTM<PPCTargetMachine>();
165 const PPCSubtarget &getPPCSubtarget() const {
166 return *getPPCTargetMachine().getSubtargetImpl();
169 void addIRPasses() override;
170 bool addPreISel() override;
171 bool addILPOpts() override;
172 bool addInstSelector() override;
173 void addPreRegAlloc() override;
174 void addPreSched2() override;
175 void addPreEmitPass() override;
179 TargetPassConfig *PPCTargetMachine::createPassConfig(PassManagerBase &PM) {
180 return new PPCPassConfig(this, PM);
183 void PPCPassConfig::addIRPasses() {
184 addPass(createAtomicExpandPass(&getPPCTargetMachine()));
186 if (TM->getOptLevel() == CodeGenOpt::Aggressive && EnableGEPOpt) {
187 // Call SeparateConstOffsetFromGEP pass to extract constants within indices
188 // and lower a GEP with multiple indices to either arithmetic operations or
189 // multiple GEPs with single index.
190 addPass(createSeparateConstOffsetFromGEPPass(TM, true));
191 // Call EarlyCSE pass to find and remove subexpressions in the lowered
193 addPass(createEarlyCSEPass());
194 // Do loop invariant code motion in case part of the lowered result is
196 addPass(createLICMPass());
199 TargetPassConfig::addIRPasses();
202 bool PPCPassConfig::addPreISel() {
203 if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
204 addPass(createPPCCTRLoops(getPPCTargetMachine()));
209 bool PPCPassConfig::addILPOpts() {
210 addPass(&EarlyIfConverterID);
214 bool PPCPassConfig::addInstSelector() {
215 // Install an instruction selector.
216 addPass(createPPCISelDag(getPPCTargetMachine()));
219 if (!DisableCTRLoops && getOptLevel() != CodeGenOpt::None)
220 addPass(createPPCCTRLoopsVerify());
223 addPass(createPPCVSXCopyPass());
227 void PPCPassConfig::addPreRegAlloc() {
228 initializePPCVSXFMAMutatePass(*PassRegistry::getPassRegistry());
229 insertPass(VSXFMAMutateEarly ? &RegisterCoalescerID : &MachineSchedulerID,
233 void PPCPassConfig::addPreSched2() {
234 addPass(createPPCVSXCopyCleanupPass(), false);
236 if (getOptLevel() != CodeGenOpt::None)
237 addPass(&IfConverterID);
240 void PPCPassConfig::addPreEmitPass() {
241 if (getOptLevel() != CodeGenOpt::None)
242 addPass(createPPCEarlyReturnPass(), false);
243 // Must run branch selection immediately preceding the asm printer.
244 addPass(createPPCBranchSelectionPass(), false);
247 void PPCTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
248 // Add first the target-independent BasicTTI pass, then our PPC pass. This
249 // allows the PPC pass to delegate to the target independent layer when
251 PM.add(createBasicTargetTransformInfoPass(this));
252 PM.add(createPPCTargetTransformInfoPass(this));