1 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "PowerPCTargetMachine.h"
15 #include "llvm/Module.h"
16 #include "llvm/PassManager.h"
17 #include "llvm/CodeGen/IntrinsicLowering.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Target/TargetMachineRegistry.h"
22 #include "llvm/Transforms/IPO.h"
23 #include "llvm/Transforms/Scalar.h"
28 // Register the target.
29 RegisterTarget<PowerPCTargetMachine> X("powerpc", " PowerPC (experimental)");
32 unsigned PowerPCTargetMachine::getJITMatchQuality() {
33 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
40 unsigned PowerPCTargetMachine::getModuleMatchQuality(const Module &M) {
41 if (M.getEndianness() == Module::BigEndian &&
42 M.getPointerSize() == Module::Pointer32)
43 return 10; // Direct match
44 else if (M.getEndianness() != Module::AnyEndianness ||
45 M.getPointerSize() != Module::AnyPointerSize)
46 return 0; // Match for some other target
48 return getJITMatchQuality()/2;
52 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
54 PowerPCTargetMachine::PowerPCTargetMachine(const Module &M,
55 IntrinsicLowering *IL)
56 : TargetMachine("PowerPC", IL, false, 4, 4, 8, 4, 4, 4, 4, 4),
57 FrameInfo(TargetFrameInfo::StackGrowsDown, 16, -4), JITInfo(*this) {
60 /// addPassesToEmitAssembly - Add passes to the specified pass manager
61 /// to implement a static compiler for this target.
63 bool PowerPCTargetMachine::addPassesToEmitAssembly(PassManager &PM,
65 // FIXME: Implement efficient support for garbage collection intrinsics.
66 PM.add(createLowerGCPass());
68 // FIXME: Implement the invoke/unwind instructions!
69 PM.add(createLowerInvokePass());
71 // FIXME: Implement the switch instruction in the instruction selector!
72 PM.add(createLowerSwitchPass());
74 PM.add(createLowerConstantExpressionsPass());
76 // Make sure that no unreachable blocks are instruction selected.
77 PM.add(createUnreachableBlockEliminationPass());
79 PM.add(createPPCSimpleInstructionSelector(*this));
82 PM.add(createMachineFunctionPrinterPass(&std::cerr));
84 PM.add(createRegisterAllocator());
87 PM.add(createMachineFunctionPrinterPass(&std::cerr));
89 PM.add(createPrologEpilogCodeInserter());
90 PM.add(createPPCCodePrinterPass(Out, *this));
91 PM.add(createMachineCodeDeleter());
95 /// addPassesToJITCompile - Add passes to the specified pass manager to
96 /// implement a fast dynamic compiler for this target.
98 void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
99 // FIXME: Implement efficient support for garbage collection intrinsics.
100 PM.add(createLowerGCPass());
102 // FIXME: Implement the invoke/unwind instructions!
103 PM.add(createLowerInvokePass());
105 // FIXME: Implement the switch instruction in the instruction selector!
106 PM.add(createLowerSwitchPass());
108 PM.add(createLowerConstantExpressionsPass());
110 // Make sure that no unreachable blocks are instruction selected.
111 PM.add(createUnreachableBlockEliminationPass());
113 PM.add(createPPCSimpleInstructionSelector(TM));
114 PM.add(createRegisterAllocator());
115 PM.add(createPrologEpilogCodeInserter());