1 //===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PPCTargetAsmInfo.h"
16 #include "PPCTargetMachine.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/Target/TargetMachineRegistry.h"
20 #include "llvm/Target/TargetOptions.h"
21 #include "llvm/Support/FormattedStream.h"
24 // Register the targets
25 static RegisterTarget<PPC32TargetMachine>
26 X(ThePPC32Target, "ppc32", "PowerPC 32");
28 static RegisterTarget<PPC64TargetMachine>
29 Y(ThePPC64Target, "ppc64", "PowerPC 64");
31 // Force static initialization.
32 extern "C" void LLVMInitializePowerPCTarget() { }
34 const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
35 if (Subtarget.isDarwin())
36 return new PPCDarwinTargetAsmInfo(*this);
38 return new PPCLinuxTargetAsmInfo(*this);
41 PPCTargetMachine::PPCTargetMachine(const Target&T, const Module &M,
42 const std::string &FS, bool is64Bit)
43 : LLVMTargetMachine(T),
44 Subtarget(*this, M, FS, is64Bit),
45 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this),
46 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this),
47 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) {
49 if (getRelocationModel() == Reloc::Default) {
50 if (Subtarget.isDarwin())
51 setRelocationModel(Reloc::DynamicNoPIC);
53 setRelocationModel(Reloc::Static);
57 /// Override this for PowerPC. Tail merging happily breaks up instruction issue
58 /// groups, which typically degrades performance.
59 bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; }
61 PPC32TargetMachine::PPC32TargetMachine(const Target &T, const Module &M,
62 const std::string &FS)
63 : PPCTargetMachine(T, M, FS, false) {
67 PPC64TargetMachine::PPC64TargetMachine(const Target &T, const Module &M,
68 const std::string &FS)
69 : PPCTargetMachine(T, M, FS, true) {
73 //===----------------------------------------------------------------------===//
74 // Pass Pipeline Configuration
75 //===----------------------------------------------------------------------===//
77 bool PPCTargetMachine::addInstSelector(PassManagerBase &PM,
78 CodeGenOpt::Level OptLevel) {
79 // Install an instruction selector.
80 PM.add(createPPCISelDag(*this));
84 bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM,
85 CodeGenOpt::Level OptLevel) {
86 // Must run branch selection immediately preceding the asm printer.
87 PM.add(createPPCBranchSelectionPass());
91 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
92 CodeGenOpt::Level OptLevel,
93 MachineCodeEmitter &MCE) {
94 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
95 // FIXME: This should be moved to TargetJITInfo!!
96 if (Subtarget.isPPC64()) {
97 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
98 // instructions to materialize arbitrary global variable + function +
99 // constant pool addresses.
100 setRelocationModel(Reloc::PIC_);
101 // Temporary workaround for the inability of PPC64 JIT to handle jump
103 DisableJumpTables = true;
105 setRelocationModel(Reloc::Static);
108 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
110 Subtarget.SetJITMode();
112 // Machine code emitter pass for PowerPC.
113 PM.add(createPPCCodeEmitterPass(*this, MCE));
118 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
119 CodeGenOpt::Level OptLevel,
120 JITCodeEmitter &JCE) {
121 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
122 // FIXME: This should be moved to TargetJITInfo!!
123 if (Subtarget.isPPC64()) {
124 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
125 // instructions to materialize arbitrary global variable + function +
126 // constant pool addresses.
127 setRelocationModel(Reloc::PIC_);
128 // Temporary workaround for the inability of PPC64 JIT to handle jump
130 DisableJumpTables = true;
132 setRelocationModel(Reloc::Static);
135 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
137 Subtarget.SetJITMode();
139 // Machine code emitter pass for PowerPC.
140 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
145 bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM,
146 CodeGenOpt::Level OptLevel,
147 ObjectCodeEmitter &OCE) {
148 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
149 // FIXME: This should be moved to TargetJITInfo!!
150 if (Subtarget.isPPC64()) {
151 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many
152 // instructions to materialize arbitrary global variable + function +
153 // constant pool addresses.
154 setRelocationModel(Reloc::PIC_);
155 // Temporary workaround for the inability of PPC64 JIT to handle jump
157 DisableJumpTables = true;
159 setRelocationModel(Reloc::Static);
162 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho
164 Subtarget.SetJITMode();
166 // Machine code emitter pass for PowerPC.
167 PM.add(createPPCObjectCodeEmitterPass(*this, OCE));
172 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
173 CodeGenOpt::Level OptLevel,
174 MachineCodeEmitter &MCE) {
175 // Machine code emitter pass for PowerPC.
176 PM.add(createPPCCodeEmitterPass(*this, MCE));
180 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
181 CodeGenOpt::Level OptLevel,
182 JITCodeEmitter &JCE) {
183 // Machine code emitter pass for PowerPC.
184 PM.add(createPPCJITCodeEmitterPass(*this, JCE));
188 bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
189 CodeGenOpt::Level OptLevel,
190 ObjectCodeEmitter &OCE) {
191 // Machine code emitter pass for PowerPC.
192 PM.add(createPPCObjectCodeEmitterPass(*this, OCE));