1 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Top-level implementation for the PowerPC target.
12 //===----------------------------------------------------------------------===//
15 #include "PowerPCTargetMachine.h"
16 #include "PowerPCFrameInfo.h"
17 #include "PPC32TargetMachine.h"
18 #include "PPC32JITInfo.h"
19 #include "llvm/Module.h"
20 #include "llvm/PassManager.h"
21 #include "llvm/Analysis/Verifier.h"
22 #include "llvm/CodeGen/IntrinsicLowering.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Target/TargetOptions.h"
26 #include "llvm/Target/TargetMachineRegistry.h"
27 #include "llvm/Transforms/Scalar.h"
28 #include "llvm/Support/CommandLine.h"
33 const char *PPC32ID = "PowerPC/32bit";
35 static cl::opt<bool> EnablePPCDAGDAG("enable-ppc-dag-isel", cl::Hidden,
36 cl::desc("Enable DAG-to-DAG isel for PPC (beta)"));
38 // Register the targets
39 RegisterTarget<PPC32TargetMachine>
40 X("ppc32", " PowerPC 32-bit");
43 PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
44 IntrinsicLowering *IL,
46 const std::string &FS,
48 const PowerPCFrameInfo &TFI)
49 : TargetMachine(name, IL, TD), FrameInfo(TFI), Subtarget(M, FS) {
50 if (TargetDefault == PPCTarget) {
51 if (Subtarget.isAIX()) PPCTarget = TargetAIX;
52 if (Subtarget.isDarwin()) PPCTarget = TargetDarwin;
56 unsigned PPC32TargetMachine::getJITMatchQuality() {
57 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
64 /// addPassesToEmitFile - Add passes to the specified pass manager to implement
65 /// a static compiler for this target.
67 bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM,
69 CodeGenFileType FileType) {
70 if (FileType != TargetMachine::AssemblyFile) return true;
72 // Run loop strength reduction before anything else.
73 PM.add(createLoopStrengthReducePass());
74 PM.add(createCFGSimplificationPass());
76 // FIXME: Implement efficient support for garbage collection intrinsics.
77 PM.add(createLowerGCPass());
79 // FIXME: Implement the invoke/unwind instructions!
80 PM.add(createLowerInvokePass());
82 // FIXME: Implement the switch instruction in the instruction selector!
83 PM.add(createLowerSwitchPass());
85 // Make sure that no unreachable blocks are instruction selected.
86 PM.add(createUnreachableBlockEliminationPass());
88 // Install an instruction selector.
90 PM.add(createPPC32ISelDag(*this));
92 PM.add(createPPC32ISelPattern(*this));
95 PM.add(createMachineFunctionPrinterPass(&std::cerr));
97 PM.add(createRegisterAllocator());
100 PM.add(createMachineFunctionPrinterPass(&std::cerr));
102 PM.add(createPrologEpilogCodeInserter());
104 // Must run branch selection immediately preceding the asm printer
105 PM.add(createPPCBranchSelectionPass());
107 // Decide which asm printer to use. If the user has not specified one on
108 // the command line, choose whichever one matches the default (current host).
111 PM.add(createAIXAsmPrinter(Out, *this));
115 PM.add(createDarwinAsmPrinter(Out, *this));
119 PM.add(createMachineCodeDeleter());
123 void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
124 // The JIT does not support or need PIC.
127 // Run loop strength reduction before anything else.
128 PM.add(createLoopStrengthReducePass());
129 PM.add(createCFGSimplificationPass());
131 // FIXME: Implement efficient support for garbage collection intrinsics.
132 PM.add(createLowerGCPass());
134 // FIXME: Implement the invoke/unwind instructions!
135 PM.add(createLowerInvokePass());
137 // FIXME: Implement the switch instruction in the instruction selector!
138 PM.add(createLowerSwitchPass());
140 // Make sure that no unreachable blocks are instruction selected.
141 PM.add(createUnreachableBlockEliminationPass());
143 // Install an instruction selector.
144 PM.add(createPPC32ISelPattern(TM));
146 PM.add(createRegisterAllocator());
147 PM.add(createPrologEpilogCodeInserter());
149 // Must run branch selection immediately preceding the asm printer
150 PM.add(createPPCBranchSelectionPass());
152 if (PrintMachineCode)
153 PM.add(createMachineFunctionPrinterPass(&std::cerr));
156 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
158 PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL,
159 const std::string &FS)
160 : PowerPCTargetMachine(PPC32ID, IL, M, FS,
161 TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1),
162 PowerPCFrameInfo(*this, false)), JITInfo(*this) {}
164 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
165 // We strongly match "powerpc-*".
166 std::string TT = M.getTargetTriple();
167 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
170 if (M.getEndianness() == Module::BigEndian &&
171 M.getPointerSize() == Module::Pointer32)
172 return 10; // Weak match
173 else if (M.getEndianness() != Module::AnyEndianness ||
174 M.getPointerSize() != Module::AnyPointerSize)
175 return 0; // Match for some other target
177 return getJITMatchQuality()/2;