1 //===-- PPCSchedule.td - PowerPC Scheduling Definitions ----*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Functional units across PowerPC chips sets
13 def BPU : FuncUnit; // Branch unit
14 def SLU : FuncUnit; // Store/load unit
15 def SRU : FuncUnit; // special register unit
16 def IU1 : FuncUnit; // integer unit 1 (simple)
17 def IU2 : FuncUnit; // integer unit 2 (complex)
18 def FPU1 : FuncUnit; // floating point unit 1
19 def FPU2 : FuncUnit; // floating point unit 2
20 def VPU : FuncUnit; // vector permutation unit
21 def VIU1 : FuncUnit; // vector integer unit 1 (simple)
22 def VIU2 : FuncUnit; // vector integer unit 2 (complex)
23 def VFPU : FuncUnit; // vector floating point unit
25 //===----------------------------------------------------------------------===//
26 // Instruction Itinerary classes used for PowerPC
28 def IntGeneral : InstrItinClass;
29 def IntCompare : InstrItinClass;
30 def IntDivD : InstrItinClass;
31 def IntDivW : InstrItinClass;
32 def IntMFFS : InstrItinClass;
33 def IntMFVSCR : InstrItinClass;
34 def IntMTFSB0 : InstrItinClass;
35 def IntMTSRD : InstrItinClass;
36 def IntMulHD : InstrItinClass;
37 def IntMulHW : InstrItinClass;
38 def IntMulHWU : InstrItinClass;
39 def IntMulLI : InstrItinClass;
40 def IntRFID : InstrItinClass;
41 def IntRotateD : InstrItinClass;
42 def IntRotate : InstrItinClass;
43 def IntShift : InstrItinClass;
44 def IntTrapD : InstrItinClass;
45 def IntTrapW : InstrItinClass;
46 def BrB : InstrItinClass;
47 def BrCR : InstrItinClass;
48 def BrMCR : InstrItinClass;
49 def BrMCRX : InstrItinClass;
50 def LdStDCBA : InstrItinClass;
51 def LdStDCBF : InstrItinClass;
52 def LdStDCBI : InstrItinClass;
53 def LdStLoad : InstrItinClass;
54 def LdStStore : InstrItinClass;
55 def LdStDSS : InstrItinClass;
56 def LdStICBI : InstrItinClass;
57 def LdStUX : InstrItinClass;
58 def LdStLD : InstrItinClass;
59 def LdStLDARX : InstrItinClass;
60 def LdStLFD : InstrItinClass;
61 def LdStLFDU : InstrItinClass;
62 def LdStLHA : InstrItinClass;
63 def LdStLMW : InstrItinClass;
64 def LdStLVecX : InstrItinClass;
65 def LdStLWA : InstrItinClass;
66 def LdStLWARX : InstrItinClass;
67 def LdStSLBIA : InstrItinClass;
68 def LdStSLBIE : InstrItinClass;
69 def LdStSTD : InstrItinClass;
70 def LdStSTDCX : InstrItinClass;
71 def LdStSTVEBX : InstrItinClass;
72 def LdStSTWCX : InstrItinClass;
73 def LdStSync : InstrItinClass;
74 def SprISYNC : InstrItinClass;
75 def SprMFSR : InstrItinClass;
76 def SprMTMSR : InstrItinClass;
77 def SprMTSR : InstrItinClass;
78 def SprTLBSYNC : InstrItinClass;
79 def SprMFCR : InstrItinClass;
80 def SprMFMSR : InstrItinClass;
81 def SprMFSPR : InstrItinClass;
82 def SprMFTB : InstrItinClass;
83 def SprMTSPR : InstrItinClass;
84 def SprMTSRIN : InstrItinClass;
85 def SprRFI : InstrItinClass;
86 def SprSC : InstrItinClass;
87 def FPGeneral : InstrItinClass;
88 def FPCompare : InstrItinClass;
89 def FPDivD : InstrItinClass;
90 def FPDivS : InstrItinClass;
91 def FPFused : InstrItinClass;
92 def FPRes : InstrItinClass;
93 def FPSqrt : InstrItinClass;
94 def VecGeneral : InstrItinClass;
95 def VecFP : InstrItinClass;
96 def VecFPCompare : InstrItinClass;
97 def VecComplex : InstrItinClass;
98 def VecPerm : InstrItinClass;
99 def VecFPRound : InstrItinClass;
100 def VecVSL : InstrItinClass;
101 def VecVSR : InstrItinClass;
103 //===----------------------------------------------------------------------===//
104 // Processor instruction itineraries.
106 include "PPCScheduleG3.td"
107 include "PPCSchedule440.td"
108 include "PPCScheduleG4.td"
109 include "PPCScheduleG4Plus.td"
110 include "PPCScheduleG5.td"
111 include "PPCScheduleA2.td"
113 //===----------------------------------------------------------------------===//
114 // Instruction to itinerary class map - When add new opcodes to the supported
115 // set, refer to the following table to determine which itinerary class the
118 // opcode itinerary class
119 // ====== ===============
360 // tlbsync SprTLBSYNC
363 // vaddcuw VecGeneral
365 // vaddsbs VecGeneral
366 // vaddshs VecGeneral
367 // vaddsws VecGeneral
368 // vaddubm VecGeneral
369 // vaddubs VecGeneral
370 // vadduhm VecGeneral
371 // vadduhs VecGeneral
372 // vadduwm VecGeneral
373 // vadduws VecGeneral
384 // vcmpbfp VecFPCompare
385 // vcmpeqfp VecFPCompare
386 // vcmpequb VecGeneral
387 // vcmpequh VecGeneral
388 // vcmpequw VecGeneral
389 // vcmpgefp VecFPCompare
390 // vcmpgtfp VecFPCompare
391 // vcmpgtsb VecGeneral
392 // vcmpgtsh VecGeneral
393 // vcmpgtsw VecGeneral
394 // vcmpgtub VecGeneral
395 // vcmpgtuh VecGeneral
396 // vcmpgtuw VecGeneral
402 // vmaxfp VecFPCompare
409 // vmhaddshs VecComplex
410 // vmhraddshs VecComplex
411 // vminfp VecFPCompare
418 // vmladduhm VecComplex
426 // vmsummbm VecComplex
427 // vmsumshm VecComplex
428 // vmsumshs VecComplex
429 // vmsumubm VecComplex
430 // vmsumuhm VecComplex
431 // vmsumuhs VecComplex
432 // vmulesb VecComplex
433 // vmulesh VecComplex
434 // vmuleub VecComplex
435 // vmuleuh VecComplex
436 // vmulosb VecComplex
437 // vmulosh VecComplex
438 // vmuloub VecComplex
439 // vmulouh VecComplex
482 // vsubcuw VecGeneral
484 // vsubsbs VecGeneral
485 // vsubshs VecGeneral
486 // vsubsws VecGeneral
487 // vsububm VecGeneral
488 // vsububs VecGeneral
489 // vsubuhm VecGeneral
490 // vsubuhs VecGeneral
491 // vsubuwm VecGeneral
492 // vsubuws VecGeneral
493 // vsum2sws VecComplex
494 // vsum4sbs VecComplex
495 // vsum4shs VecComplex
496 // vsum4ubs VecComplex
497 // vsumsws VecComplex