1 //===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the PowerPC implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef POWERPC32_REGISTERINFO_H
15 #define POWERPC32_REGISTERINFO_H
18 #include "PPCGenRegisterInfo.h.inc"
23 class TargetInstrInfo;
26 class PPCRegisterInfo : public PPCGenRegisterInfo {
27 std::map<unsigned, unsigned> ImmToIdxMap;
28 const PPCSubtarget &Subtarget;
29 const TargetInstrInfo &TII;
31 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii);
33 /// getRegisterNumbering - Given the enum value for some register, e.g.
34 /// PPC::F14, return the number that it corresponds to (e.g. 14).
35 static unsigned getRegisterNumbering(unsigned RegEnum);
37 /// Code Generation virtual methods...
38 void storeRegToStackSlot(MachineBasicBlock &MBB,
39 MachineBasicBlock::iterator MBBI,
40 unsigned SrcReg, int FrameIndex,
41 const TargetRegisterClass *RC) const;
43 void storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
44 SmallVectorImpl<MachineOperand> &Addr,
45 const TargetRegisterClass *RC,
46 SmallVectorImpl<MachineInstr*> &NewMIs) const;
48 void loadRegFromStackSlot(MachineBasicBlock &MBB,
49 MachineBasicBlock::iterator MBBI,
50 unsigned DestReg, int FrameIndex,
51 const TargetRegisterClass *RC) const;
53 void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
54 SmallVectorImpl<MachineOperand> &Addr,
55 const TargetRegisterClass *RC,
56 SmallVectorImpl<MachineInstr*> &NewMIs) const;
58 void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
59 unsigned DestReg, unsigned SrcReg,
60 const TargetRegisterClass *DestRC,
61 const TargetRegisterClass *SrcRC) const;
63 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
64 unsigned DestReg, const MachineInstr *Orig) const;
66 /// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
67 /// copy instructions, turning them into load/store instructions.
68 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
69 int FrameIndex) const;
71 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
72 SmallVectorImpl<unsigned> &UseOps,
73 int FrameIndex) const {
77 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
78 MachineInstr* LoadMI) const {
82 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
83 SmallVectorImpl<unsigned> &UseOps,
84 MachineInstr* LoadMI) const {
88 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const;
90 const TargetRegisterClass* const*
91 getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
93 BitVector getReservedRegs(const MachineFunction &MF) const;
95 /// targetHandlesStackFrameRounding - Returns true if the target is
96 /// responsible for rounding up the stack frame (probably at emitPrologue
98 bool targetHandlesStackFrameRounding() const { return true; }
100 bool hasFP(const MachineFunction &MF) const;
102 void eliminateCallFramePseudoInstr(MachineFunction &MF,
103 MachineBasicBlock &MBB,
104 MachineBasicBlock::iterator I) const;
106 /// usesLR - Returns if the link registers (LR) has been used in the function.
108 bool usesLR(MachineFunction &MF) const;
110 void lowerDynamicAlloc(MachineBasicBlock::iterator II) const;
111 void eliminateFrameIndex(MachineBasicBlock::iterator II,
112 int SPAdj, RegScavenger *RS = NULL) const;
114 /// determineFrameLayout - Determine the size of the frame and maximum call
116 void determineFrameLayout(MachineFunction &MF) const;
118 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
119 RegScavenger *RS = NULL) const;
120 void emitPrologue(MachineFunction &MF) const;
121 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
123 // Debug information queries.
124 unsigned getRARegister() const;
125 unsigned getFrameRegister(MachineFunction &MF) const;
126 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
128 // Exception handling queries.
129 unsigned getEHExceptionRegister() const;
130 unsigned getEHHandlerRegister() const;
132 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
135 } // end namespace llvm