1 //===-- PPCJITInfo.cpp - Implement the JIT interfaces for the PowerPC -----===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the JIT interfaces for the 32-bit PowerPC target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "jit"
15 #include "PPCJITInfo.h"
16 #include "PPCRelocations.h"
17 #include "llvm/CodeGen/MachineCodeEmitter.h"
18 #include "llvm/Config/alloca.h"
19 #include "llvm/Support/Debug.h"
24 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
26 #define BUILD_ADDIS(RD,RS,IMM16) \
27 ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
28 #define BUILD_ORI(RD,RS,UIMM16) \
29 ((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
30 #define BUILD_MTSPR(RS,SPR) \
31 ((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
32 #define BUILD_BCCTRx(BO,BI,LINK) \
33 ((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
36 #define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16)
37 #define BUILD_MTCTR(RS) BUILD_MTSPR(RS,9)
38 #define BUILD_BCTR(LINK) BUILD_BCCTRx(20,0,LINK)
41 static void EmitBranchToAt(void *At, void *To, bool isCall) {
42 intptr_t Addr = (intptr_t)To;
44 // FIXME: should special case the short branch case.
45 unsigned *AtI = (unsigned*)At;
47 AtI[0] = BUILD_LIS(12, Addr >> 16); // lis r12, hi16(address)
48 AtI[1] = BUILD_ORI(12, 12, Addr); // ori r12, r12, low16(address)
49 AtI[2] = BUILD_MTCTR(12); // mtctr r12
50 AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl
53 extern "C" void PPC32CompilationCallback();
55 #if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
56 // CompilationCallback stub - We can't use a C function with inline assembly in
57 // it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
58 // write our own wrapper, which does things our way, so we have complete control
59 // over register saving and restoring.
63 ".globl _PPC32CompilationCallback\n"
64 "_PPC32CompilationCallback:\n"
65 // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
66 // FIXME: need to save v[0-19] for altivec?
67 // Set up a proper stack frame
71 // Save all int arg registers
72 "stw r10, 204(r1)\n" "stw r9, 200(r1)\n"
73 "stw r8, 196(r1)\n" "stw r7, 192(r1)\n"
74 "stw r6, 188(r1)\n" "stw r5, 184(r1)\n"
75 "stw r4, 180(r1)\n" "stw r3, 176(r1)\n"
76 // Save all call-clobbered FP regs.
77 "stfd f13, 168(r1)\n" "stfd f12, 160(r1)\n"
78 "stfd f11, 152(r1)\n" "stfd f10, 144(r1)\n"
79 "stfd f9, 136(r1)\n" "stfd f8, 128(r1)\n"
80 "stfd f7, 120(r1)\n" "stfd f6, 112(r1)\n"
81 "stfd f5, 104(r1)\n" "stfd f4, 96(r1)\n"
82 "stfd f3, 88(r1)\n" "stfd f2, 80(r1)\n"
84 // Arguments to Compilation Callback:
85 // r3 - our lr (address of the call instruction in stub plus 4)
86 // r4 - stub's lr (address of instruction that called the stub plus 4)
88 "lwz r2, 208(r1)\n" // stub's frame
89 "lwz r4, 8(r2)\n" // stub's lr
90 "bl _PPC32CompilationCallbackC\n"
92 // Restore all int arg registers
93 "lwz r10, 204(r1)\n" "lwz r9, 200(r1)\n"
94 "lwz r8, 196(r1)\n" "lwz r7, 192(r1)\n"
95 "lwz r6, 188(r1)\n" "lwz r5, 184(r1)\n"
96 "lwz r4, 180(r1)\n" "lwz r3, 176(r1)\n"
97 // Restore all FP arg registers
98 "lfd f13, 168(r1)\n" "lfd f12, 160(r1)\n"
99 "lfd f11, 152(r1)\n" "lfd f10, 144(r1)\n"
100 "lfd f9, 136(r1)\n" "lfd f8, 128(r1)\n"
101 "lfd f7, 120(r1)\n" "lfd f6, 112(r1)\n"
102 "lfd f5, 104(r1)\n" "lfd f4, 96(r1)\n"
103 "lfd f3, 88(r1)\n" "lfd f2, 80(r1)\n"
105 // Pop 3 frames off the stack and branch to target
112 void PPC32CompilationCallback() {
113 assert(0 && "This is not a power pc, you can't execute this!");
118 extern "C" unsigned *PPC32CompilationCallbackC(unsigned *StubCallAddrPlus4,
119 unsigned *OrigCallAddrPlus4) {
120 // Adjust the pointer to the address of the call instruction in the stub
121 // emitted by emitFunctionStub, rather than the instruction after it.
122 unsigned *StubCallAddr = StubCallAddrPlus4 - 1;
123 unsigned *OrigCallAddr = OrigCallAddrPlus4 - 1;
125 void *Target = JITCompilerFunction(StubCallAddr);
127 // Check to see if *OrigCallAddr is a 'bl' instruction, and if we can rewrite
128 // it to branch directly to the destination. If so, rewrite it so it does not
129 // need to go through the stub anymore.
130 unsigned OrigCallInst = *OrigCallAddr;
131 if ((OrigCallInst >> 26) == 18) { // Direct call.
132 intptr_t Offset = ((intptr_t)Target - (intptr_t)OrigCallAddr) >> 2;
134 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
135 // Clear the original target out.
136 OrigCallInst &= (63 << 26) | 3;
137 // Fill in the new target.
138 OrigCallInst |= (Offset & ((1 << 24)-1)) << 2;
140 *OrigCallAddr = OrigCallInst;
144 // Assert that we are coming from a stub that was created with our
146 assert((*StubCallAddr >> 26) == 19 && "Call in stub is not indirect!");
149 // Rewrite the stub with an unconditional branch to the target, for any users
150 // who took the address of the stub.
151 EmitBranchToAt(StubCallAddr, Target, false);
153 // Put the address of the target function to call and the address to return to
154 // after calling the target function in a place that is easy to get on the
155 // stack after we restore all regs.
156 return (unsigned *)Target;
161 TargetJITInfo::LazyResolverFn
162 PPCJITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
163 JITCompilerFunction = Fn;
164 return PPC32CompilationCallback;
167 void *PPCJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
168 // If this is just a call to an external function, emit a branch instead of a
169 // call. The code is the same except for one bit of the last instruction.
170 if (Fn != (void*)(intptr_t)PPC32CompilationCallback) {
171 MCE.startFunctionStub(4*4);
172 void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
177 EmitBranchToAt(Addr, Fn, false);
178 return MCE.finishFunctionStub(0);
181 MCE.startFunctionStub(4*7);
182 MCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
183 MCE.emitWordBE(0x7d6802a6); // mflr r11
184 MCE.emitWordBE(0x91610028); // stw r11, 40(r1)
185 void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
190 EmitBranchToAt(Addr, Fn, true/*is call*/);
191 return MCE.finishFunctionStub(0);
195 void PPCJITInfo::relocate(void *Function, MachineRelocation *MR,
196 unsigned NumRelocs, unsigned char* GOTBase) {
197 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
198 unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
199 intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
200 switch ((PPC::RelocationType)MR->getRelocationType()) {
201 default: assert(0 && "Unknown relocation type!");
202 case PPC::reloc_pcrel_bx:
203 // PC-relative relocation for b and bl instructions.
204 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
205 assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) &&
206 "Relocation out of range!");
207 *RelocPos |= (ResultPtr & ((1 << 24)-1)) << 2;
209 case PPC::reloc_absolute_ptr_high: // Pointer relocations.
210 case PPC::reloc_absolute_ptr_low:
211 case PPC::reloc_absolute_high: // high bits of ref -> low 16 of instr
212 case PPC::reloc_absolute_low: { // low bits of ref -> low 16 of instr
213 ResultPtr += MR->getConstantVal();
215 // If this is a high-part access, get the high-part.
216 if (MR->getRelocationType() == PPC::reloc_absolute_high ||
217 MR->getRelocationType() == PPC::reloc_absolute_ptr_high) {
218 // If the low part will have a carry (really a borrow) from the low
219 // 16-bits into the high 16, add a bit to borrow from.
220 if (((int)ResultPtr << 16) < 0)
221 ResultPtr += 1 << 16;
225 // Do the addition then mask, so the addition does not overflow the 16-bit
226 // immediate section of the instruction.
227 unsigned LowBits = (*RelocPos + ResultPtr) & 65535;
228 unsigned HighBits = *RelocPos & ~65535;
229 *RelocPos = LowBits | HighBits; // Slam into low 16-bits
232 case PPC::reloc_absolute_low_ix: { // low bits of ref -> low 14 of instr
233 ResultPtr += MR->getConstantVal();
234 // Do the addition then mask, so the addition does not overflow the 16-bit
235 // immediate section of the instruction.
236 unsigned LowBits = (*RelocPos + ResultPtr) & 0xFFFC;
237 unsigned HighBits = *RelocPos & 0xFFFF0003;
238 *RelocPos = LowBits | HighBits; // Slam into low 14-bits.
245 void PPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
246 EmitBranchToAt(Old, New, false);
249 void PPCJITInfo::resolveBBRefs(MachineCodeEmitter &MCE) {
250 // Resolve branches to BasicBlocks for the entire function
251 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
252 intptr_t Location = MCE.getMachineBasicBlockAddress(BBRefs[i].first);
253 unsigned *Ref = (unsigned *)BBRefs[i].second;
254 DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
256 unsigned Instr = *Ref;
257 intptr_t BranchTargetDisp = (Location - (intptr_t)Ref) >> 2;
259 switch (Instr >> 26) {
260 default: assert(0 && "Unknown branch user!");
261 case 18: // This is B or BL
262 *Ref |= (BranchTargetDisp & ((1 << 24)-1)) << 2;
264 case 16: // This is BLT,BLE,BEQ,BGE,BGT,BNE, or other bcx instruction
265 *Ref |= (BranchTargetDisp & ((1 << 14)-1)) << 2;