1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 class Format<bits<5> val> {
17 def Pseudo: Format<0>;
20 def Simm16 : Format<3>;
21 def PCRelimm24 : Format<5>;
22 def Imm24 : Format<6>;
24 def PCRelimm14 : Format<8>;
25 def Imm14 : Format<9>;
26 def Imm2 : Format<10>;
28 def Imm3 : Format<12>;
29 def Imm1 : Format<13>;
31 def Imm4 : Format<15>;
32 def Imm8 : Format<16>;
33 def Disimm16 : Format<17>;
34 def Disimm14 : Format<18>;
37 def Imm15 : Format<21>;
39 def Imm6 : Format<23>;
41 //===----------------------------------------------------------------------===//
43 // PowerPC instruction formats
45 class I<bits<6> opcode, dag OL, string asmstr> : Instruction {
48 bit PPC64 = 0; // Default value, override with isPPC64
49 bit VMX = 0; // Default value, override with isVMX
52 let Namespace = "PPC";
53 let Inst{0-5} = opcode;
55 let AsmString = asmstr;
59 class IForm<bits<6> opcode, bit aa, bit lk, dag OL, string asmstr>
60 : I<opcode, OL, asmstr> {
69 class BForm<bits<6> opcode, bit aa, bit lk, dag OL, string asmstr>
70 : I<opcode, OL, asmstr> {
77 let Inst{11-13} = CRNum;
78 let Inst{14-15} = BICode;
84 class BForm_ext<bits<6> opcode, bit aa, bit lk, bits<5> bo, bits<2> bicode,
85 dag OL, string asmstr>
86 : BForm<opcode, aa, lk, OL, asmstr> {
92 class DForm_base<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr>{
102 class DForm_1<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> {
112 class DForm_2<bits<6> opcode, dag OL, string asmstr>
113 : DForm_base<opcode, OL, asmstr>;
115 class DForm_2_r0<bits<6> opcode, dag OL, string asmstr>
116 : I<opcode, OL, asmstr> {
125 // Currently we make the use/def reg distinction in ISel, not tablegen
126 class DForm_3<bits<6> opcode, dag OL, string asmstr>
127 : DForm_1<opcode, OL, asmstr>;
129 class DForm_4<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> {
139 class DForm_4_zero<bits<6> opcode, dag OL, string asmstr>
140 : DForm_1<opcode, OL, asmstr> {
146 class DForm_5<bits<6> opcode, dag OL, string asmstr> : I<opcode, OL, asmstr> {
155 let Inst{11-15} = RA;
159 class DForm_5_ext<bits<6> opcode, dag OL, string asmstr>
160 : DForm_5<opcode, OL, asmstr> {
164 class DForm_6<bits<6> opcode, dag OL, string asmstr>
165 : DForm_5<opcode, OL, asmstr>;
167 class DForm_6_ext<bits<6> opcode, dag OL, string asmstr>
168 : DForm_6<opcode, OL, asmstr> {
172 class DForm_8<bits<6> opcode, dag OL, string asmstr>
173 : DForm_1<opcode, OL, asmstr> {
176 class DForm_9<bits<6> opcode, dag OL, string asmstr>
177 : DForm_1<opcode, OL, asmstr> {
181 class DSForm_1<bits<6> opcode, bits<2> xo, dag OL, string asmstr>
182 : I<opcode, OL, asmstr> {
187 let Inst{6-10} = RST;
188 let Inst{11-15} = RA;
189 let Inst{16-29} = DS;
190 let Inst{30-31} = xo;
193 class DSForm_2<bits<6> opcode, bits<2> xo, dag OL, string asmstr>
194 : DSForm_1<opcode, xo, OL, asmstr>;
197 class XForm_base_r3xo<bits<6> opcode, bits<10> xo, bit rc,
198 dag OL, string asmstr> : I<opcode, OL, asmstr> {
203 let Inst{6-10} = RST;
206 let Inst{21-30} = xo;
210 // This is the same as XForm_base_r3xo, but the first two operands are swapped
211 // when code is emitted.
212 class XForm_base_r3xo_swapped
213 <bits<6> opcode, bits<10> xo, bit rc, dag OL, string asmstr>
214 : I<opcode, OL, asmstr> {
219 let Inst{6-10} = RST;
222 let Inst{21-30} = xo;
227 class XForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
228 : XForm_base_r3xo<opcode, xo, 0, OL, asmstr>;
230 class XForm_6<bits<6> opcode, bits<10> xo, bit rc, dag OL, string asmstr>
231 : XForm_base_r3xo_swapped<opcode, xo, rc, OL, asmstr>;
233 class XForm_8<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
234 : XForm_base_r3xo<opcode, xo, 0, OL, asmstr>;
236 class XForm_10<bits<6> opcode, bits<10> xo, bit rc, dag OL, string asmstr>
237 : XForm_base_r3xo_swapped<opcode, xo, rc, OL, asmstr> {
240 class XForm_11<bits<6> opcode, bits<10> xo, bit rc, dag OL, string asmstr>
241 : XForm_base_r3xo_swapped<opcode, xo, rc, OL, asmstr> {
245 class XForm_16<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
246 : I<opcode, OL, asmstr> {
255 let Inst{11-15} = RA;
256 let Inst{16-20} = RB;
257 let Inst{21-30} = xo;
261 class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
262 : XForm_16<opcode, xo, OL, asmstr> {
266 class XForm_17<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
267 : I<opcode, OL, asmstr> {
274 let Inst{11-15} = FRA;
275 let Inst{16-20} = FRB;
276 let Inst{21-30} = xo;
280 class XForm_25<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
281 : XForm_base_r3xo<opcode, xo, 0, OL, asmstr> {
284 class XForm_26<bits<6> opcode, bits<10> xo, bit rc, dag OL, string asmstr>
285 : XForm_base_r3xo<opcode, xo, rc, OL, asmstr> {
289 class XForm_28<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
290 : XForm_base_r3xo<opcode, xo, 0, OL, asmstr> {
294 class XLForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
295 : I<opcode, OL, asmstr> {
304 let Inst{9-10} = CRDb;
305 let Inst{11-13} = CRA;
306 let Inst{14-15} = CRAb;
307 let Inst{16-18} = CRB;
308 let Inst{19-20} = CRBb;
309 let Inst{21-30} = xo;
313 class XLForm_2<bits<6> opcode, bits<10> xo, bit lk,
314 dag OL, string asmstr> : I<opcode, OL, asmstr> {
320 let Inst{11-15} = BI;
322 let Inst{19-20} = BH;
323 let Inst{21-30} = xo;
327 class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo,
328 bits<5> bi, bit lk, dag OL, string asmstr>
329 : XLForm_2<opcode, xo, lk, OL, asmstr> {
335 class XLForm_3<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
336 : I<opcode, OL, asmstr> {
342 let Inst{11-13} = BFA;
345 let Inst{21-30} = xo;
350 class XFXForm_1<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
351 : I<opcode, OL, asmstr> {
356 let Inst{11-20} = SPR;
357 let Inst{21-30} = xo;
361 class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
362 dag OL, string asmstr>
363 : XFXForm_1<opcode, xo, OL, asmstr> {
367 class XFXForm_3<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
368 : I<opcode, OL, asmstr> {
373 let Inst{21-30} = xo;
377 class XFXForm_5<bits<6> opcode, bit mfcrf, bits<10> xo,
378 dag OL, string asmstr> : I<opcode, OL, asmstr> {
383 let Inst{11} = mfcrf;
384 let Inst{12-19} = FXM;
386 let Inst{21-30} = xo;
390 class XFXForm_7<bits<6> opcode, bits<10> xo, dag OL, string asmstr>
391 : XFXForm_1<opcode, xo, OL, asmstr>;
393 class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
394 dag OL, string asmstr>
395 : XFXForm_7<opcode, xo, OL, asmstr> {
400 class XSForm_1<bits<6> opcode, bits<9> xo, bit rc, dag OL, string asmstr>
401 : I<opcode, OL, asmstr> {
408 let Inst{16-20} = SH{1-5};
409 let Inst{21-29} = xo;
410 let Inst{30} = SH{0};
415 class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, bit rc,
416 dag OL, string asmstr> : I<opcode, OL, asmstr> {
422 let Inst{11-15} = RA;
423 let Inst{16-20} = RB;
425 let Inst{22-30} = xo;
429 class XOForm_1r<bits<6> opcode, bits<9> xo, bit oe, bit rc,
430 dag OL, string asmstr>
431 : XOForm_1<opcode, xo, oe, rc, OL, asmstr> {
432 let Inst{11-15} = RB;
433 let Inst{16-20} = RA;
436 class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, bit rc,
437 dag OL, string asmstr>
438 : XOForm_1<opcode, xo, oe, rc, OL, asmstr> {
443 class AForm_1<bits<6> opcode, bits<5> xo, bit rc, dag OL, string asmstr>
444 : I<opcode, OL, asmstr> {
450 let Inst{6-10} = FRT;
451 let Inst{11-15} = FRA;
452 let Inst{16-20} = FRB;
453 let Inst{21-25} = FRC;
454 let Inst{26-30} = xo;
458 class AForm_2<bits<6> opcode, bits<5> xo, bit rc, dag OL, string asmstr>
459 : AForm_1<opcode, xo, rc, OL, asmstr> {
463 class AForm_3<bits<6> opcode, bits<5> xo, bit rc, dag OL,
465 : AForm_1<opcode, xo, rc, OL, asmstr> {
470 class MForm_1<bits<6> opcode, bit rc, dag OL, string asmstr>
471 : I<opcode, OL, asmstr> {
479 let Inst{11-15} = RA;
480 let Inst{16-20} = RB;
481 let Inst{21-25} = MB;
482 let Inst{26-30} = ME;
486 class MForm_2<bits<6> opcode, bit rc, dag OL, string asmstr>
487 : MForm_1<opcode, rc, OL, asmstr> {
491 class MDForm_1<bits<6> opcode, bits<3> xo, bit rc,
492 dag OL, string asmstr> : I<opcode, OL, asmstr> {
499 let Inst{11-15} = RA;
500 let Inst{16-20} = SH{1-5};
501 let Inst{21-26} = MBE;
502 let Inst{27-29} = xo;
503 let Inst{30} = SH{0};
507 //===----------------------------------------------------------------------===//
509 class Pseudo<dag OL, string asmstr> : I<0, OL, asmstr> {