1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bytecode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/Visibility.h"
26 #include "llvm/Target/TargetOptions.h"
31 class VISIBILITY_HIDDEN PPCCodeEmitter : public MachineFunctionPass {
33 MachineCodeEmitter &MCE;
35 // Tracks which instruction references which BasicBlock
36 std::vector<std::pair<MachineBasicBlock*, unsigned*> > BBRefs;
38 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
40 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
43 PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
46 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
48 /// runOnMachineFunction - emits the given MachineFunction to memory
50 bool runOnMachineFunction(MachineFunction &MF);
52 /// emitBasicBlock - emits the given MachineBasicBlock to memory
54 void emitBasicBlock(MachineBasicBlock &MBB);
56 /// getValueBit - return the particular bit of Val
58 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
60 /// getBinaryCodeForInstr - This function, generated by the
61 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
62 /// machine instructions.
64 unsigned getBinaryCodeForInstr(MachineInstr &MI);
68 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
69 /// machine code emitted. This uses a MachineCodeEmitter object to handle
70 /// actually outputting the machine code and resolving things like the address
71 /// of functions. This method should returns true if machine code emission is
74 bool PPCTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
75 MachineCodeEmitter &MCE) {
76 // Machine code emitter pass for PowerPC
77 PM.add(new PPCCodeEmitter(*this, MCE));
78 // Delete machine code for this function after emitting it
79 PM.add(createMachineCodeDeleter());
83 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
84 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
85 MF.getTarget().getRelocationModel() != Reloc::Static) &&
86 "JIT relocation model must be set to static or default!");
90 MCE.startFunction(MF);
91 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
93 } while (MCE.finishFunction(MF));
95 // Resolve branches to BasicBlocks for the entire function
96 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
97 intptr_t Location = MCE.getMachineBasicBlockAddress(BBRefs[i].first);
98 unsigned *Ref = BBRefs[i].second;
99 DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
101 unsigned Instr = *Ref;
102 intptr_t BranchTargetDisp = (Location - (intptr_t)Ref) >> 2;
104 switch (Instr >> 26) {
105 default: assert(0 && "Unknown branch user!");
106 case 18: // This is B or BL
107 *Ref |= (BranchTargetDisp & ((1 << 24)-1)) << 2;
109 case 16: // This is BLT,BLE,BEQ,BGE,BGT,BNE, or other bcx instruction
110 *Ref |= (BranchTargetDisp & ((1 << 14)-1)) << 2;
119 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
120 MCE.StartMachineBasicBlock(&MBB);
122 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
123 MachineInstr &MI = *I;
124 unsigned Opcode = MI.getOpcode();
125 switch (MI.getOpcode()) {
127 MCE.emitWordBE(getBinaryCodeForInstr(*I));
129 case PPC::IMPLICIT_DEF_GPRC:
130 case PPC::IMPLICIT_DEF_G8RC:
131 case PPC::IMPLICIT_DEF_F8:
132 case PPC::IMPLICIT_DEF_F4:
133 case PPC::IMPLICIT_DEF_VRRC:
134 break; // pseudo opcode, no side effects
135 case PPC::MovePCtoLR:
136 assert(0 && "CodeEmitter does not support MovePCtoLR instruction");
142 int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
144 intptr_t rv = 0; // Return value; defaults to 0 for unhandled cases
145 // or things that get fixed up later by the JIT.
146 if (MO.isRegister()) {
147 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
149 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
150 // register, not the register number directly.
151 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
152 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
155 } else if (MO.isImmediate()) {
156 rv = MO.getImmedValue();
157 } else if (MO.isGlobalAddress() || MO.isExternalSymbol()) {
159 if (MI.getOpcode() == PPC::BL)
160 Reloc = PPC::reloc_pcrel_bx;
162 switch (MI.getOpcode()) {
163 default: DEBUG(MI.dump()); assert(0 && "Unknown instruction for relocation!");
165 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
180 Reloc = PPC::reloc_absolute_low;
184 if (MO.isGlobalAddress())
185 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
186 Reloc, MO.getGlobal(), 0));
188 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
189 Reloc, MO.getSymbolName(), 0));
190 } else if (MO.isMachineBasicBlock()) {
191 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
192 BBRefs.push_back(std::make_pair(MO.getMachineBasicBlock(), CurrPC));
193 } else if (MO.isConstantPoolIndex() || MO.isJumpTableIndex()) {
194 if (MO.isConstantPoolIndex())
195 rv = MCE.getConstantPoolEntryAddress(MO.getConstantPoolIndex());
197 rv = MCE.getJumpTableEntryAddress(MO.getJumpTableIndex());
199 unsigned Opcode = MI.getOpcode();
200 if (Opcode == PPC::LIS || Opcode == PPC::ADDIS) {
201 // lis wants hi16(addr)
202 if ((short)rv < 0) rv += 1 << 16;
204 } else if (Opcode == PPC::LWZ || Opcode == PPC::LA ||
206 Opcode == PPC::LFS || Opcode == PPC::LFD) {
207 // These load opcodes want lo16(addr)
210 assert(0 && "Unknown constant pool or jump table using instruction!");
213 std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
220 #include "PPCGenCodeEmitter.inc"