1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/JITCodeEmitter.h"
22 #include "llvm/CodeGen/ObjectCodeEmitter.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/Passes.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/Compiler.h"
29 #include "llvm/Target/TargetOptions.h"
33 class PPCCodeEmitter {
35 MachineCodeEmitter &MCE;
37 PPCCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce):
40 /// getBinaryCodeForInstr - This function, generated by the
41 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
42 /// machine instructions.
44 unsigned getBinaryCodeForInstr(const MachineInstr &MI);
46 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
48 unsigned getMachineOpValue(const MachineInstr &MI,
49 const MachineOperand &MO);
51 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
52 /// its address in the function into this pointer.
54 void *MovePCtoLROffset;
57 template <class CodeEmitter>
58 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
64 void getAnalysisUsage(AnalysisUsage &AU) const {
65 AU.addRequired<MachineModuleInfo>();
66 MachineFunctionPass::getAnalysisUsage(AU);
71 Emitter(TargetMachine &tm, CodeEmitter &mce)
72 : MachineFunctionPass(&ID), PPCCodeEmitter(tm, mce), TM(tm), MCE(mce) {}
74 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
76 /// runOnMachineFunction - emits the given MachineFunction to memory
78 bool runOnMachineFunction(MachineFunction &MF);
80 /// emitBasicBlock - emits the given MachineBasicBlock to memory
82 void emitBasicBlock(MachineBasicBlock &MBB);
84 /// getValueBit - return the particular bit of Val
86 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
89 template <class CodeEmitter>
90 char Emitter<CodeEmitter>::ID = 0;
93 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
94 /// to the specified MCE object.
96 FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM,
97 MachineCodeEmitter &MCE) {
98 return new Emitter<MachineCodeEmitter>(TM, MCE);
101 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
102 JITCodeEmitter &JCE) {
103 return new Emitter<JITCodeEmitter>(TM, JCE);
106 FunctionPass *llvm::createPPCObjectCodeEmitterPass(PPCTargetMachine &TM,
107 ObjectCodeEmitter &OCE) {
108 return new Emitter<ObjectCodeEmitter>(TM, OCE);
111 template <class CodeEmitter>
112 bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
113 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
114 MF.getTarget().getRelocationModel() != Reloc::Static) &&
115 "JIT relocation model must be set to static or default!");
117 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
119 MovePCtoLROffset = 0;
120 MCE.startFunction(MF);
121 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
123 } while (MCE.finishFunction(MF));
128 template <class CodeEmitter>
129 void Emitter<CodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
130 MCE.StartMachineBasicBlock(&MBB);
132 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
133 const MachineInstr &MI = *I;
134 switch (MI.getOpcode()) {
136 MCE.emitWordBE(getBinaryCodeForInstr(MI));
138 case TargetInstrInfo::DBG_LABEL:
139 case TargetInstrInfo::EH_LABEL:
140 MCE.emitLabel(MI.getOperand(0).getImm());
142 case TargetInstrInfo::IMPLICIT_DEF:
143 break; // pseudo opcode, no side effects
144 case PPC::MovePCtoLR:
145 case PPC::MovePCtoLR8:
146 assert(TM.getRelocationModel() == Reloc::PIC_);
147 MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
148 MCE.emitWordBE(0x48000005); // bl 1
154 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
155 const MachineOperand &MO) {
157 unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
158 // or things that get fixed up later by the JIT.
160 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
162 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
163 // register, not the register number directly.
164 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
165 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
168 } else if (MO.isImm()) {
170 } else if (MO.isGlobal() || MO.isSymbol() ||
171 MO.isCPI() || MO.isJTI()) {
173 if (MI.getOpcode() == PPC::BL_Darwin || MI.getOpcode() == PPC::BL8_Darwin ||
174 MI.getOpcode() == PPC::BL_SVR4 || MI.getOpcode() == PPC::BL8_ELF ||
175 MI.getOpcode() == PPC::TAILB || MI.getOpcode() == PPC::TAILB8)
176 Reloc = PPC::reloc_pcrel_bx;
178 if (TM.getRelocationModel() == Reloc::PIC_) {
179 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
181 switch (MI.getOpcode()) {
182 default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
187 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
213 Reloc = PPC::reloc_absolute_low;
220 Reloc = PPC::reloc_absolute_low_ix;
227 R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
229 isa<Function>(MO.getGlobal()));
230 } else if (MO.isSymbol()) {
231 R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
232 Reloc, MO.getSymbolName(), 0);
233 } else if (MO.isCPI()) {
234 R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
235 Reloc, MO.getIndex(), 0);
238 R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
239 Reloc, MO.getIndex(), 0);
242 // If in PIC mode, we need to encode the negated address of the
243 // 'movepctolr' into the unrelocated field. After relocation, we'll have
244 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm
245 // field, we get &gv. This doesn't happen for branch relocations, which are
246 // always implicitly pc relative.
247 if (TM.getRelocationModel() == Reloc::PIC_ && Reloc != PPC::reloc_pcrel_bx){
248 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
249 R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4);
251 MCE.addRelocation(R);
253 } else if (MO.isMBB()) {
255 unsigned Opcode = MI.getOpcode();
256 if (Opcode == PPC::B || Opcode == PPC::BL_Darwin ||
257 Opcode == PPC::BLA_Darwin|| Opcode == PPC::BL_SVR4 ||
258 Opcode == PPC::BLA_SVR4)
259 Reloc = PPC::reloc_pcrel_bx;
260 else // BCC instruction
261 Reloc = PPC::reloc_pcrel_bcx;
263 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
264 Reloc, MO.getMBB()));
266 cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
273 #include "PPCGenCodeEmitter.inc"