1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/JITCodeEmitter.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineModuleInfo.h"
25 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Support/Compiler.h"
28 #include "llvm/Target/TargetOptions.h"
32 class PPCCodeEmitter {
34 MachineCodeEmitter &MCE;
36 PPCCodeEmitter( TargetMachine &tm, MachineCodeEmitter &mce) :
39 /// getBinaryCodeForInstr - This function, generated by the
40 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
41 /// machine instructions.
43 unsigned getBinaryCodeForInstr(const MachineInstr &MI);
45 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
47 unsigned getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO);
49 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
50 /// its address in the function into this pointer.
52 void *MovePCtoLROffset;
55 template <class machineCodeEmitter>
56 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
60 machineCodeEmitter &MCE;
62 void getAnalysisUsage(AnalysisUsage &AU) const {
63 AU.addRequired<MachineModuleInfo>();
64 MachineFunctionPass::getAnalysisUsage(AU);
69 Emitter(TargetMachine &tm, machineCodeEmitter &mce)
70 : MachineFunctionPass(&ID), PPCCodeEmitter( tm, mce), TM(tm), MCE(mce) {}
72 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
74 /// runOnMachineFunction - emits the given MachineFunction to memory
76 bool runOnMachineFunction(MachineFunction &MF);
78 /// emitBasicBlock - emits the given MachineBasicBlock to memory
80 void emitBasicBlock(MachineBasicBlock &MBB);
82 /// getValueBit - return the particular bit of Val
84 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
87 template <class machineCodeEmitter>
88 char Emitter<machineCodeEmitter>::ID = 0;
91 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
92 /// to the specified MCE object.
93 FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM,
94 MachineCodeEmitter &MCE) {
95 return new Emitter<MachineCodeEmitter>(TM, MCE);
98 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
99 JITCodeEmitter &JCE) {
100 return new Emitter<JITCodeEmitter>(TM, JCE);
103 template <class machineCodeEmitter>
104 bool Emitter<machineCodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
105 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
106 MF.getTarget().getRelocationModel() != Reloc::Static) &&
107 "JIT relocation model must be set to static or default!");
109 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
111 MovePCtoLROffset = 0;
112 MCE.startFunction(MF);
113 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
115 } while (MCE.finishFunction(MF));
120 template <class machineCodeEmitter>
121 void Emitter<machineCodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
122 MCE.StartMachineBasicBlock(&MBB);
124 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
125 const MachineInstr &MI = *I;
126 switch (MI.getOpcode()) {
128 MCE.emitWordBE(getBinaryCodeForInstr(MI));
130 case TargetInstrInfo::DBG_LABEL:
131 case TargetInstrInfo::EH_LABEL:
132 MCE.emitLabel(MI.getOperand(0).getImm());
134 case TargetInstrInfo::IMPLICIT_DEF:
135 break; // pseudo opcode, no side effects
136 case PPC::MovePCtoLR:
137 case PPC::MovePCtoLR8:
138 assert(TM.getRelocationModel() == Reloc::PIC_);
139 MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
140 MCE.emitWordBE(0x48000005); // bl 1
146 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
147 const MachineOperand &MO) {
149 unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
150 // or things that get fixed up later by the JIT.
152 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
154 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
155 // register, not the register number directly.
156 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
157 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
160 } else if (MO.isImm()) {
162 } else if (MO.isGlobal() || MO.isSymbol() ||
163 MO.isCPI() || MO.isJTI()) {
165 if (MI.getOpcode() == PPC::BL_Macho || MI.getOpcode() == PPC::BL8_Macho ||
166 MI.getOpcode() == PPC::BL_ELF || MI.getOpcode() == PPC::BL8_ELF ||
167 MI.getOpcode() == PPC::TAILB || MI.getOpcode() == PPC::TAILB8)
168 Reloc = PPC::reloc_pcrel_bx;
170 if (TM.getRelocationModel() == Reloc::PIC_) {
171 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
173 switch (MI.getOpcode()) {
174 default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
179 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
205 Reloc = PPC::reloc_absolute_low;
212 Reloc = PPC::reloc_absolute_low_ix;
219 R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
221 isa<Function>(MO.getGlobal()));
222 } else if (MO.isSymbol()) {
223 R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
224 Reloc, MO.getSymbolName(), 0);
225 } else if (MO.isCPI()) {
226 R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
227 Reloc, MO.getIndex(), 0);
230 R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
231 Reloc, MO.getIndex(), 0);
234 // If in PIC mode, we need to encode the negated address of the
235 // 'movepctolr' into the unrelocated field. After relocation, we'll have
236 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm
237 // field, we get &gv. This doesn't happen for branch relocations, which are
238 // always implicitly pc relative.
239 if (TM.getRelocationModel() == Reloc::PIC_ && Reloc != PPC::reloc_pcrel_bx){
240 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
241 R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4);
243 MCE.addRelocation(R);
245 } else if (MO.isMBB()) {
247 unsigned Opcode = MI.getOpcode();
248 if (Opcode == PPC::B || Opcode == PPC::BL_Macho ||
249 Opcode == PPC::BLA_Macho || Opcode == PPC::BL_ELF ||
250 Opcode == PPC::BLA_ELF)
251 Reloc = PPC::reloc_pcrel_bx;
252 else // BCC instruction
253 Reloc = PPC::reloc_pcrel_bcx;
254 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
255 Reloc, MO.getMBB()));
257 cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
264 #include "PPCGenCodeEmitter.inc"