1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bytecode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/Passes.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/Visibility.h"
26 #include "llvm/Target/TargetOptions.h"
31 class VISIBILITY_HIDDEN PPCCodeEmitter : public MachineFunctionPass {
33 MachineCodeEmitter &MCE;
35 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
37 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
40 PPCCodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
43 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
45 /// runOnMachineFunction - emits the given MachineFunction to memory
47 bool runOnMachineFunction(MachineFunction &MF);
49 /// emitBasicBlock - emits the given MachineBasicBlock to memory
51 void emitBasicBlock(MachineBasicBlock &MBB);
53 /// getValueBit - return the particular bit of Val
55 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
57 /// getBinaryCodeForInstr - This function, generated by the
58 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
59 /// machine instructions.
61 unsigned getBinaryCodeForInstr(MachineInstr &MI);
65 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
66 /// machine code emitted. This uses a MachineCodeEmitter object to handle
67 /// actually outputting the machine code and resolving things like the address
68 /// of functions. This method should returns true if machine code emission is
71 bool PPCTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
72 MachineCodeEmitter &MCE) {
73 // Machine code emitter pass for PowerPC
74 PM.add(new PPCCodeEmitter(*this, MCE));
75 // Delete machine code for this function after emitting it
76 PM.add(createMachineCodeDeleter());
81 extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
84 bool PPCCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
85 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
86 MF.getTarget().getRelocationModel() != Reloc::Static) &&
87 "JIT relocation model must be set to static or default!");
89 MCE.startFunction(MF);
90 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
92 } while (MCE.finishFunction(MF));
97 void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
98 MCE.StartMachineBasicBlock(&MBB);
100 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
101 MachineInstr &MI = *I;
102 unsigned Opcode = MI.getOpcode();
103 switch (MI.getOpcode()) {
105 MCE.emitWordBE(getBinaryCodeForInstr(*I));
107 case PPC::IMPLICIT_DEF_GPRC:
108 case PPC::IMPLICIT_DEF_G8RC:
109 case PPC::IMPLICIT_DEF_F8:
110 case PPC::IMPLICIT_DEF_F4:
111 case PPC::IMPLICIT_DEF_VRRC:
112 break; // pseudo opcode, no side effects
113 case PPC::MovePCtoLR:
114 assert(0 && "CodeEmitter does not support MovePCtoLR instruction");
120 int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
122 intptr_t rv = 0; // Return value; defaults to 0 for unhandled cases
123 // or things that get fixed up later by the JIT.
124 if (MO.isRegister()) {
125 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
127 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
128 // register, not the register number directly.
129 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
130 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
133 } else if (MO.isImmediate()) {
134 rv = MO.getImmedValue();
135 } else if (MO.isGlobalAddress() || MO.isExternalSymbol()) {
137 if (MI.getOpcode() == PPC::BL)
138 Reloc = PPC::reloc_pcrel_bx;
140 switch (MI.getOpcode()) {
141 default: DEBUG(MI.dump()); assert(0 && "Unknown instruction for relocation!");
145 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
165 Reloc = PPC::reloc_absolute_low;
172 Reloc = PPC::reloc_absolute_low_ix;
176 if (MO.isGlobalAddress())
177 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
178 Reloc, MO.getGlobal(), 0));
180 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
181 Reloc, MO.getSymbolName(), 0));
182 } else if (MO.isMachineBasicBlock()) {
183 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
184 TM.getJITInfo()->addBBRef(MO.getMachineBasicBlock(), (intptr_t)CurrPC);
185 } else if (MO.isConstantPoolIndex() || MO.isJumpTableIndex()) {
186 if (MO.isConstantPoolIndex())
187 rv = MCE.getConstantPoolEntryAddress(MO.getConstantPoolIndex());
189 rv = MCE.getJumpTableEntryAddress(MO.getJumpTableIndex());
191 unsigned Opcode = MI.getOpcode();
192 if (Opcode == PPC::LIS || Opcode == PPC::LIS8 ||
193 Opcode == PPC::ADDIS || Opcode == PPC::ADDIS8) {
194 // lis wants hi16(addr)
195 if ((short)rv < 0) rv += 1 << 16;
197 } else if (Opcode == PPC::LWZ || Opcode == PPC::LWZ8 ||
199 Opcode == PPC::LI || Opcode == PPC::LI8 ||
200 Opcode == PPC::LFS || Opcode == PPC::LFD) {
201 // These load opcodes want lo16(addr)
205 assert(0 && "Unknown constant pool or jump table using instruction!");
208 std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
215 #include "PPCGenCodeEmitter.inc"