1 //===-- PPC32CodeEmitter.cpp - JIT Code Emitter for PowerPC32 -----*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bytecode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPC32TargetMachine.h"
16 #include "PPC32Relocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/CodeGen/MachineCodeEmitter.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/Support/Debug.h"
27 class PPC32CodeEmitter : public MachineFunctionPass {
29 MachineCodeEmitter &MCE;
31 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
32 /// its address in the function into this pointer.
33 void *MovePCtoLROffset;
35 // Tracks which instruction references which BasicBlock
36 std::vector<std::pair<const BasicBlock*,
37 std::pair<unsigned*,MachineInstr*> > > BBRefs;
38 // Tracks where each BasicBlock starts
39 std::map<const BasicBlock*, long> BBLocations;
41 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
43 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
46 PPC32CodeEmitter(TargetMachine &T, MachineCodeEmitter &M)
49 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
51 /// runOnMachineFunction - emits the given MachineFunction to memory
53 bool runOnMachineFunction(MachineFunction &MF);
55 /// emitBasicBlock - emits the given MachineBasicBlock to memory
57 void emitBasicBlock(MachineBasicBlock &MBB);
59 /// emitWord - write a 32-bit word to memory at the current PC
61 void emitWord(unsigned w) { MCE.emitWord(w); }
63 /// getValueBit - return the particular bit of Val
65 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
67 /// getBinaryCodeForInstr - This function, generated by the
68 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
69 /// machine instructions.
71 unsigned getBinaryCodeForInstr(MachineInstr &MI);
75 /// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
76 /// machine code emitted. This uses a MachineCodeEmitter object to handle
77 /// actually outputting the machine code and resolving things like the address
78 /// of functions. This method should returns true if machine code emission is
81 bool PPC32TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
82 MachineCodeEmitter &MCE) {
83 // Machine code emitter pass for PowerPC
84 PM.add(new PPC32CodeEmitter(*this, MCE));
85 // Delete machine code for this function after emitting it
86 PM.add(createMachineCodeDeleter());
90 bool PPC32CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
92 MCE.startFunction(MF);
93 MCE.emitConstantPool(MF.getConstantPool());
94 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
96 MCE.finishFunction(MF);
98 // Resolve branches to BasicBlocks for the entire function
99 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
100 intptr_t Location = BBLocations[BBRefs[i].first];
101 unsigned *Ref = BBRefs[i].second.first;
102 MachineInstr *MI = BBRefs[i].second.second;
103 DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
104 << " in instr: " << *MI);
105 for (unsigned ii = 0, ee = MI->getNumOperands(); ii != ee; ++ii) {
106 MachineOperand &op = MI->getOperand(ii);
107 if (op.isPCRelativeDisp()) {
108 // the instruction's branch target is made such that it branches to
109 // PC + (branchTarget * 4), so undo that arithmetic here:
110 // Location is the target of the branch
111 // Ref is the location of the instruction, and hence the PC
112 int64_t branchTarget = (Location - (long)Ref) >> 2;
113 MI->SetMachineOperandConst(ii, MachineOperand::MO_SignExtendedImmed,
115 unsigned fixedInstr = PPC32CodeEmitter::getBinaryCodeForInstr(*MI);
116 MCE.emitWordAt(fixedInstr, Ref);
127 void PPC32CodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
128 BBLocations[MBB.getBasicBlock()] = MCE.getCurrentPCValue();
129 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
130 MachineInstr &MI = *I;
131 unsigned Opcode = MI.getOpcode();
132 switch (MI.getOpcode()) {
134 emitWord(getBinaryCodeForInstr(*I));
136 case PPC::IMPLICIT_DEF:
137 break; // pseudo opcode, no side effects
138 case PPC::MovePCtoLR:
139 assert(MovePCtoLROffset == 0 &&
140 "Multiple MovePCtoLR instructions in the function?");
141 MovePCtoLROffset = (void*)(intptr_t)MCE.getCurrentPCValue();
142 emitWord(0x48000005); // bl 1
148 static unsigned enumRegToMachineReg(unsigned enumReg) {
150 case PPC::R0 : case PPC::F0 : return 0;
151 case PPC::R1 : case PPC::F1 : return 1;
152 case PPC::R2 : case PPC::F2 : return 2;
153 case PPC::R3 : case PPC::F3 : return 3;
154 case PPC::R4 : case PPC::F4 : return 4;
155 case PPC::R5 : case PPC::F5 : return 5;
156 case PPC::R6 : case PPC::F6 : return 6;
157 case PPC::R7 : case PPC::F7 : return 7;
158 case PPC::R8 : case PPC::F8 : return 8;
159 case PPC::R9 : case PPC::F9 : return 9;
160 case PPC::R10: case PPC::F10: return 10;
161 case PPC::R11: case PPC::F11: return 11;
162 case PPC::R12: case PPC::F12: return 12;
163 case PPC::R13: case PPC::F13: return 13;
164 case PPC::R14: case PPC::F14: return 14;
165 case PPC::R15: case PPC::F15: return 15;
166 case PPC::R16: case PPC::F16: return 16;
167 case PPC::R17: case PPC::F17: return 17;
168 case PPC::R18: case PPC::F18: return 18;
169 case PPC::R19: case PPC::F19: return 19;
170 case PPC::R20: case PPC::F20: return 20;
171 case PPC::R21: case PPC::F21: return 21;
172 case PPC::R22: case PPC::F22: return 22;
173 case PPC::R23: case PPC::F23: return 23;
174 case PPC::R24: case PPC::F24: return 24;
175 case PPC::R25: case PPC::F25: return 25;
176 case PPC::R26: case PPC::F26: return 26;
177 case PPC::R27: case PPC::F27: return 27;
178 case PPC::R28: case PPC::F28: return 28;
179 case PPC::R29: case PPC::F29: return 29;
180 case PPC::R30: case PPC::F30: return 30;
181 case PPC::R31: case PPC::F31: return 31;
183 std::cerr << "Unhandled reg in enumRegToRealReg!\n";
188 int PPC32CodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
190 int rv = 0; // Return value; defaults to 0 for unhandled cases
191 // or things that get fixed up later by the JIT.
192 if (MO.isRegister()) {
193 rv = enumRegToMachineReg(MO.getReg());
194 } else if (MO.isImmediate()) {
195 rv = MO.getImmedValue();
196 } else if (MO.isGlobalAddress()) {
198 if (MI.getOpcode() == PPC::CALLpcrel)
199 Reloc = PPC::reloc_pcrel_bx;
200 else if (MI.getOpcode() == PPC::LOADHiAddr) {
201 Reloc = PPC::reloc_absolute_loadhi;
202 } else if (MI.getOpcode() == PPC::LA) {
203 Reloc = PPC::reloc_absolute_la;
205 assert(0 && "Unknown instruction for relocation!");
207 MCE.addRelocation(MachineRelocation(MCE.getCurrentPCOffset(),
208 Reloc, MO.getGlobal(),
209 -((intptr_t)MovePCtoLROffset+4)));
210 } else if (MO.isMachineBasicBlock()) {
211 const BasicBlock *BB = MO.getMachineBasicBlock()->getBasicBlock();
212 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
213 BBRefs.push_back(std::make_pair(BB, std::make_pair(CurrPC, &MI)));
214 } else if (MO.isConstantPoolIndex()) {
215 unsigned index = MO.getConstantPoolIndex();
216 rv = MCE.getConstantPoolEntryAddress(index);
218 std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
222 // Special treatment for global symbols: constants and vars
223 if ((MO.isConstantPoolIndex() || MO.isGlobalAddress()) &&
224 MI.getOpcode() != PPC::CALLpcrel) {
225 unsigned Opcode = MI.getOpcode();
226 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
228 if (Opcode == PPC::LOADHiAddr) {
229 // LoadHiAddr wants hi16(addr - &MovePCtoLR)
231 } else if (Opcode == PPC::LWZ || Opcode == PPC::LA ||
232 Opcode == PPC::LFS || Opcode == PPC::LFD) {
233 // These load opcodes want lo16(addr - &MovePCtoLR)
240 #include "PPC32GenCodeEmitter.inc"