1 //===-- PPCCodeEmitter.cpp - JIT Code Emitter for PowerPC32 -------*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the PowerPC 32-bit CodeEmitter and associated machinery to
11 // JIT-compile bitcode to native PowerPC.
13 //===----------------------------------------------------------------------===//
15 #include "PPCTargetMachine.h"
16 #include "PPCRelocations.h"
18 #include "llvm/Module.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/JITCodeEmitter.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineModuleInfo.h"
25 #include "llvm/CodeGen/Passes.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/Support/Compiler.h"
28 #include "llvm/Target/TargetOptions.h"
32 class PPCCodeEmitter {
34 MachineCodeEmitter &MCE;
36 PPCCodeEmitter(TargetMachine &tm, MachineCodeEmitter &mce):
39 /// getBinaryCodeForInstr - This function, generated by the
40 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
41 /// machine instructions.
43 unsigned getBinaryCodeForInstr(const MachineInstr &MI);
45 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
47 unsigned getMachineOpValue(const MachineInstr &MI,
48 const MachineOperand &MO);
50 /// MovePCtoLROffset - When/if we see a MovePCtoLR instruction, we record
51 /// its address in the function into this pointer.
53 void *MovePCtoLROffset;
56 template <class CodeEmitter>
57 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
63 void getAnalysisUsage(AnalysisUsage &AU) const {
64 AU.addRequired<MachineModuleInfo>();
65 MachineFunctionPass::getAnalysisUsage(AU);
70 Emitter(TargetMachine &tm, CodeEmitter &mce)
71 : MachineFunctionPass(&ID), PPCCodeEmitter(tm, mce), TM(tm), MCE(mce) {}
73 const char *getPassName() const { return "PowerPC Machine Code Emitter"; }
75 /// runOnMachineFunction - emits the given MachineFunction to memory
77 bool runOnMachineFunction(MachineFunction &MF);
79 /// emitBasicBlock - emits the given MachineBasicBlock to memory
81 void emitBasicBlock(MachineBasicBlock &MBB);
83 /// getValueBit - return the particular bit of Val
85 unsigned getValueBit(int64_t Val, unsigned bit) { return (Val >> bit) & 1; }
88 template <class CodeEmitter>
89 char Emitter<CodeEmitter>::ID = 0;
92 /// createPPCCodeEmitterPass - Return a pass that emits the collected PPC code
93 /// to the specified MCE object.
94 FunctionPass *llvm::createPPCCodeEmitterPass(PPCTargetMachine &TM,
95 MachineCodeEmitter &MCE) {
96 return new Emitter<MachineCodeEmitter>(TM, MCE);
99 FunctionPass *llvm::createPPCJITCodeEmitterPass(PPCTargetMachine &TM,
100 JITCodeEmitter &JCE) {
101 return new Emitter<JITCodeEmitter>(TM, JCE);
104 template <class CodeEmitter>
105 bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
106 assert((MF.getTarget().getRelocationModel() != Reloc::Default ||
107 MF.getTarget().getRelocationModel() != Reloc::Static) &&
108 "JIT relocation model must be set to static or default!");
110 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo>());
112 MovePCtoLROffset = 0;
113 MCE.startFunction(MF);
114 for (MachineFunction::iterator BB = MF.begin(), E = MF.end(); BB != E; ++BB)
116 } while (MCE.finishFunction(MF));
121 template <class CodeEmitter>
122 void Emitter<CodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
123 MCE.StartMachineBasicBlock(&MBB);
125 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){
126 const MachineInstr &MI = *I;
127 switch (MI.getOpcode()) {
129 MCE.emitWordBE(getBinaryCodeForInstr(MI));
131 case TargetInstrInfo::DBG_LABEL:
132 case TargetInstrInfo::EH_LABEL:
133 MCE.emitLabel(MI.getOperand(0).getImm());
135 case TargetInstrInfo::IMPLICIT_DEF:
136 break; // pseudo opcode, no side effects
137 case PPC::MovePCtoLR:
138 case PPC::MovePCtoLR8:
139 assert(TM.getRelocationModel() == Reloc::PIC_);
140 MovePCtoLROffset = (void*)MCE.getCurrentPCValue();
141 MCE.emitWordBE(0x48000005); // bl 1
147 unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI,
148 const MachineOperand &MO) {
150 unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
151 // or things that get fixed up later by the JIT.
153 rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg());
155 // Special encoding for MTCRF and MFOCRF, which uses a bit mask for the
156 // register, not the register number directly.
157 if ((MI.getOpcode() == PPC::MTCRF || MI.getOpcode() == PPC::MFOCRF) &&
158 (MO.getReg() >= PPC::CR0 && MO.getReg() <= PPC::CR7)) {
161 } else if (MO.isImm()) {
163 } else if (MO.isGlobal() || MO.isSymbol() ||
164 MO.isCPI() || MO.isJTI()) {
166 if (MI.getOpcode() == PPC::BL_Macho || MI.getOpcode() == PPC::BL8_Macho ||
167 MI.getOpcode() == PPC::BL_ELF || MI.getOpcode() == PPC::BL8_ELF ||
168 MI.getOpcode() == PPC::TAILB || MI.getOpcode() == PPC::TAILB8)
169 Reloc = PPC::reloc_pcrel_bx;
171 if (TM.getRelocationModel() == Reloc::PIC_) {
172 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
174 switch (MI.getOpcode()) {
175 default: MI.dump(); assert(0 && "Unknown instruction for relocation!");
180 Reloc = PPC::reloc_absolute_high; // Pointer to symbol
206 Reloc = PPC::reloc_absolute_low;
213 Reloc = PPC::reloc_absolute_low_ix;
220 R = MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
222 isa<Function>(MO.getGlobal()));
223 } else if (MO.isSymbol()) {
224 R = MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
225 Reloc, MO.getSymbolName(), 0);
226 } else if (MO.isCPI()) {
227 R = MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
228 Reloc, MO.getIndex(), 0);
231 R = MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
232 Reloc, MO.getIndex(), 0);
235 // If in PIC mode, we need to encode the negated address of the
236 // 'movepctolr' into the unrelocated field. After relocation, we'll have
237 // &gv-&movepctolr-4 in the imm field. Once &movepctolr is added to the imm
238 // field, we get &gv. This doesn't happen for branch relocations, which are
239 // always implicitly pc relative.
240 if (TM.getRelocationModel() == Reloc::PIC_ && Reloc != PPC::reloc_pcrel_bx){
241 assert(MovePCtoLROffset && "MovePCtoLR not seen yet?");
242 R.setConstantVal(-(intptr_t)MovePCtoLROffset - 4);
244 MCE.addRelocation(R);
246 } else if (MO.isMBB()) {
248 unsigned Opcode = MI.getOpcode();
249 if (Opcode == PPC::B || Opcode == PPC::BL_Macho ||
250 Opcode == PPC::BLA_Macho || Opcode == PPC::BL_ELF ||
251 Opcode == PPC::BLA_ELF)
252 Reloc = PPC::reloc_pcrel_bx;
253 else // BCC instruction
254 Reloc = PPC::reloc_pcrel_bcx;
255 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
256 Reloc, MO.getMBB()));
258 cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
265 #include "PPCGenCodeEmitter.inc"