1 //===- PPCCallingConv.td - Calling Conventions for PowerPC -*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This describes the calling conventions for the PowerPC 32- and 64-bit
13 //===----------------------------------------------------------------------===//
15 /// CCIfSubtarget - Match if the current subtarget has a feature F.
16 class CCIfSubtarget<string F, CCAction A>
17 : CCIf<!strconcat("State.getTarget().getSubtarget<PPCSubtarget>().", F), A>;
19 //===----------------------------------------------------------------------===//
20 // Return Value Calling Convention
21 //===----------------------------------------------------------------------===//
23 // Return-value convention for PowerPC
24 def RetCC_PPC : CallingConv<[
25 // On PPC64, integer return values are always promoted to i64
26 CCIfType<[i32], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
28 CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
29 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6]>>,
31 CCIfType<[f32], CCAssignToReg<[F1, F2]>>,
32 CCIfType<[f64], CCAssignToReg<[F1, F2, F3, F4]>>,
34 // Vector types are always returned in V2.
35 CCIfType<[v16i8, v8i16, v4i32, v4f32], CCAssignToReg<[V2]>>
39 //===----------------------------------------------------------------------===//
40 // PowerPC Argument Calling Conventions
41 //===----------------------------------------------------------------------===//
43 def CC_PPC : CallingConv<[
44 // The first 8 integer arguments are passed in integer registers.
45 CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
46 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
48 // Common sub-targets passes FP values in F1 - F13
50 CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8,F9,F10,F11,F12,F13]>>,
52 // The first 12 Vector arguments are passed in altivec registers.
53 CCIfType<[v16i8, v8i16, v4i32, v4f32],
54 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10,V11,V12,V13]>>
57 // Integer/FP values get stored in stack slots that are 8 bytes in size and
58 // 8-byte aligned if there are no more registers to hold them.
59 CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
61 // Vectors get 16-byte stack slots that are 16-byte aligned.
62 CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
63 CCAssignToStack<16, 16>>*/
68 //===----------------------------------------------------------------------===//
69 // PowerPC System V Release 4 ABI
70 //===----------------------------------------------------------------------===//
72 def CC_PPC_SVR4_Common : CallingConv<[
73 // The ABI requires i64 to be passed in two adjacent registers with the first
74 // register having an odd register number.
75 CCIfType<[i32], CCIfSplit<CCCustom<"CC_PPC_SVR4_Custom_AlignArgRegs">>>,
77 // The first 8 integer arguments are passed in integer registers.
78 CCIfType<[i32], CCAssignToReg<[R3, R4, R5, R6, R7, R8, R9, R10]>>,
80 // Make sure the i64 words from a long double are either both passed in
81 // registers or both passed on the stack.
82 CCIfType<[f64], CCIfSplit<CCCustom<"CC_PPC_SVR4_Custom_AlignFPArgRegs">>>,
84 // FP values are passed in F1 - F8.
85 CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
87 // Split arguments have an alignment of 8 bytes on the stack.
88 CCIfType<[i32], CCIfSplit<CCAssignToStack<4, 8>>>,
90 CCIfType<[i32], CCAssignToStack<4, 4>>,
92 // Floats are stored in double precision format, thus they have the same
93 // alignment and size as doubles.
94 CCIfType<[f32,f64], CCAssignToStack<8, 8>>,
96 // Vectors get 16-byte stack slots that are 16-byte aligned.
97 CCIfType<[v16i8, v8i16, v4i32, v4f32], CCAssignToStack<16, 16>>
100 // This calling convention puts vector arguments always on the stack. It is used
101 // to assign vector arguments which belong to the variable portion of the
102 // parameter list of a variable argument function.
103 def CC_PPC_SVR4_VarArg : CallingConv<[
104 CCDelegateTo<CC_PPC_SVR4_Common>
107 // In contrast to CC_PPC_SVR4_VarArg, this calling convention first tries to put
108 // vector arguments in vector registers before putting them on the stack.
109 def CC_PPC_SVR4 : CallingConv<[
110 // The first 12 Vector arguments are passed in AltiVec registers.
111 CCIfType<[v16i8, v8i16, v4i32, v4f32],
112 CCAssignToReg<[V2, V3, V4, V5, V6, V7, V8, V9, V10, V11, V12, V13]>>,
114 CCDelegateTo<CC_PPC_SVR4_Common>
117 // Helper "calling convention" to handle aggregate by value arguments.
118 // Aggregate by value arguments are always placed in the local variable space
119 // of the caller. This calling convention is only used to assign those stack
120 // offsets in the callers stack frame.
122 // Still, the address of the aggregate copy in the callers stack frame is passed
123 // in a GPR (or in the parameter list area if all GPRs are allocated) from the
124 // caller to the callee. The location for the address argument is assigned by
125 // the CC_PPC_SVR4 calling convention.
127 // The only purpose of CC_PPC_SVR4_Custom_Dummy is to skip arguments which are
128 // not passed by value.
130 def CC_PPC_SVR4_ByVal : CallingConv<[
131 CCIfByVal<CCPassByVal<4, 4>>,
133 CCCustom<"CC_PPC_SVR4_Custom_Dummy">
136 def CSR_Darwin32 : CalleeSavedRegs<(add R13, R14, R15, R16, R17, R18, R19, R20,
137 R21, R22, R23, R24, R25, R26, R27, R28,
138 R29, R30, R31, F14, F15, F16, F17, F18,
139 F19, F20, F21, F22, F23, F24, F25, F26,
140 F27, F28, F29, F30, F31, CR2, CR3, CR4,
141 V20, V21, V22, V23, V24, V25, V26, V27,
142 V28, V29, V30, V31)>;
144 def CSR_SVR432 : CalleeSavedRegs<(add R14, R15, R16, R17, R18, R19, R20, VRSAVE,
145 R21, R22, R23, R24, R25, R26, R27, R28,
146 R29, R30, R31, F14, F15, F16, F17, F18,
147 F19, F20, F21, F22, F23, F24, F25, F26,
148 F27, F28, F29, F30, F31, CR2, CR3, CR4,
149 V20, V21, V22, V23, V24, V25, V26, V27,
150 V28, V29, V30, V31)>;
152 def CSR_Darwin64 : CalleeSavedRegs<(add X13, X14, X15, X16, X17, X18, X19, X20,
153 X21, X22, X23, X24, X25, X26, X27, X28,
154 X29, X30, X31, F14, F15, F16, F17, F18,
155 F19, F20, F21, F22, F23, F24, F25, F26,
156 F27, F28, F29, F30, F31, CR2, CR3, CR4,
157 V20, V21, V22, V23, V24, V25, V26, V27,
158 V28, V29, V30, V31)>;
160 def CSR_SVR464 : CalleeSavedRegs<(add X14, X15, X16, X17, X18, X19, X20, VRSAVE,
161 X21, X22, X23, X24, X25, X26, X27, X28,
162 X29, X30, X31, F14, F15, F16, F17, F18,
163 F19, F20, F21, F22, F23, F24, F25, F26,
164 F27, F28, F29, F30, F31, CR2, CR3, CR4,
165 V20, V21, V22, V23, V24, V25, V26, V27,
166 V28, V29, V30, V31)>;