1 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Target/TargetAsmBackend.h"
12 #include "PPCFixupKinds.h"
13 #include "llvm/MC/MCMachObjectWriter.h"
14 #include "llvm/MC/MCSectionMachO.h"
15 #include "llvm/MC/MCObjectWriter.h"
16 #include "llvm/MC/MCValue.h"
17 #include "llvm/Object/MachOFormat.h"
18 #include "llvm/Target/TargetRegistry.h"
22 class PPCMachObjectWriter : public MCMachObjectTargetWriter {
24 PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
26 : MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
28 void RecordRelocation(MachObjectWriter *Writer,
29 const MCAssembler &Asm, const MCAsmLayout &Layout,
30 const MCFragment *Fragment, const MCFixup &Fixup,
31 MCValue Target, uint64_t &FixedValue) {}
34 class PPCAsmBackend : public TargetAsmBackend {
35 const Target &TheTarget;
37 PPCAsmBackend(const Target &T) : TargetAsmBackend(), TheTarget(T) {}
39 unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
41 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
42 const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
43 // name offset bits flags
44 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
45 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
46 { "fixup_ppc_lo16", 16, 16, 0 },
47 { "fixup_ppc_ha16", 16, 16, 0 },
48 { "fixup_ppc_lo14", 16, 14, 0 }
51 if (Kind < FirstTargetFixupKind)
52 return TargetAsmBackend::getFixupKindInfo(Kind);
54 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
56 return Infos[Kind - FirstTargetFixupKind];
59 bool MayNeedRelaxation(const MCInst &Inst) const {
64 void RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
66 assert(0 && "RelaxInstruction() unimplemented");
69 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
70 // FIXME: Zero fill for now. That's not right, but at least will get the
71 // section size right.
72 for (uint64_t i = 0; i != Count; ++i)
77 unsigned getPointerSize() const {
78 StringRef Name = TheTarget.getName();
79 if (Name == "ppc64") return 8;
80 assert(Name == "ppc32" && "Unknown target name!");
84 } // end anonymous namespace
87 // FIXME: This should be in a separate file.
89 class DarwinPPCAsmBackend : public PPCAsmBackend {
91 DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
93 void ApplyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
94 uint64_t Value) const {
98 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
99 bool is64 = getPointerSize() == 8;
100 return createMachObjectWriter(new PPCMachObjectWriter(
102 (is64 ? object::mach::CTM_PowerPC64 :
103 object::mach::CTM_PowerPC),
104 object::mach::CSPPC_ALL),
105 OS, /*IsLittleEndian=*/false);
108 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
112 } // end anonymous namespace
117 TargetAsmBackend *llvm::createPPCAsmBackend(const Target &T,
118 const std::string &TT) {
119 if (Triple(TT).isOSDarwin())
120 return new DarwinPPCAsmBackend(T);