1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides PowerPC specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #include "PPCMCTargetDesc.h"
15 #include "InstPrinter/PPCInstPrinter.h"
16 #include "PPCMCAsmInfo.h"
17 #include "PPCTargetStreamer.h"
18 #include "llvm/MC/MCCodeGenInfo.h"
19 #include "llvm/MC/MCInstrInfo.h"
20 #include "llvm/MC/MCRegisterInfo.h"
21 #include "llvm/MC/MCStreamer.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/MC/MachineLocation.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/FormattedStream.h"
27 #include "llvm/Support/TargetRegistry.h"
29 #define GET_INSTRINFO_MC_DESC
30 #include "PPCGenInstrInfo.inc"
32 #define GET_SUBTARGETINFO_MC_DESC
33 #include "PPCGenSubtargetInfo.inc"
35 #define GET_REGINFO_MC_DESC
36 #include "PPCGenRegisterInfo.inc"
40 // Pin the vtable to this file.
41 PPCTargetStreamer::~PPCTargetStreamer() {}
43 static MCInstrInfo *createPPCMCInstrInfo() {
44 MCInstrInfo *X = new MCInstrInfo();
45 InitPPCMCInstrInfo(X);
49 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
51 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
52 TheTriple.getArch() == Triple::ppc64le);
53 unsigned Flavour = isPPC64 ? 0 : 1;
54 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
56 MCRegisterInfo *X = new MCRegisterInfo();
57 InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
61 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
63 MCSubtargetInfo *X = new MCSubtargetInfo();
64 InitPPCMCSubtargetInfo(X, TT, CPU, FS);
68 static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
70 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
71 TheTriple.getArch() == Triple::ppc64le);
74 if (TheTriple.isOSDarwin())
75 MAI = new PPCMCAsmInfoDarwin(isPPC64, TheTriple);
77 MAI = new PPCLinuxMCAsmInfo(isPPC64);
79 // Initial state of the frame pointer is R1.
80 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
81 MCCFIInstruction Inst =
82 MCCFIInstruction::createDefCfa(0, MRI.getDwarfRegNum(Reg, true), 0);
83 MAI->addInitialFrameState(Inst);
88 static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
90 CodeGenOpt::Level OL) {
91 MCCodeGenInfo *X = new MCCodeGenInfo();
93 if (RM == Reloc::Default) {
96 RM = Reloc::DynamicNoPIC;
100 if (CM == CodeModel::Default) {
102 if (!T.isOSDarwin() &&
103 (T.getArch() == Triple::ppc64 || T.getArch() == Triple::ppc64le))
104 CM = CodeModel::Medium;
106 X->InitMCCodeGenInfo(RM, CM, OL);
111 class PPCTargetAsmStreamer : public PPCTargetStreamer {
112 formatted_raw_ostream &OS;
115 PPCTargetAsmStreamer(formatted_raw_ostream &OS) : OS(OS) {}
116 virtual void emitTCEntry(const MCSymbol &S) {
123 virtual void emitMachine(StringRef CPU) {
124 OS << "\t.machine " << CPU << '\n';
128 class PPCTargetELFStreamer : public PPCTargetStreamer {
129 virtual void emitTCEntry(const MCSymbol &S) {
130 // Creates a R_PPC64_TOC relocation
131 Streamer->EmitSymbolValue(&S, 8);
133 virtual void emitMachine(StringRef CPU) {
134 // FIXME: Is there anything to do in here or does this directive only
140 // This is duplicated code. Refactor this.
141 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
142 MCContext &Ctx, MCAsmBackend &MAB,
144 MCCodeEmitter *Emitter,
147 if (Triple(TT).isOSDarwin())
148 return createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll);
150 PPCTargetStreamer *S = new PPCTargetELFStreamer();
151 return createELFStreamer(Ctx, S, MAB, OS, Emitter, RelaxAll, NoExecStack);
155 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
156 bool isVerboseAsm, bool useLoc, bool useCFI,
157 bool useDwarfDirectory, MCInstPrinter *InstPrint,
158 MCCodeEmitter *CE, MCAsmBackend *TAB, bool ShowInst) {
159 PPCTargetStreamer *S = new PPCTargetAsmStreamer(OS);
161 return llvm::createAsmStreamer(Ctx, S, OS, isVerboseAsm, useLoc, useCFI,
162 useDwarfDirectory, InstPrint, CE, TAB,
166 static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
167 unsigned SyntaxVariant,
168 const MCAsmInfo &MAI,
169 const MCInstrInfo &MII,
170 const MCRegisterInfo &MRI,
171 const MCSubtargetInfo &STI) {
172 bool isDarwin = Triple(STI.getTargetTriple()).isOSDarwin();
173 return new PPCInstPrinter(MAI, MII, MRI, isDarwin);
176 extern "C" void LLVMInitializePowerPCTargetMC() {
177 // Register the MC asm info.
178 RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
179 RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
180 RegisterMCAsmInfoFn E(ThePPC64LETarget, createPPCMCAsmInfo);
182 // Register the MC codegen info.
183 TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
184 TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
185 TargetRegistry::RegisterMCCodeGenInfo(ThePPC64LETarget,
186 createPPCMCCodeGenInfo);
188 // Register the MC instruction info.
189 TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
190 TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
191 TargetRegistry::RegisterMCInstrInfo(ThePPC64LETarget,
192 createPPCMCInstrInfo);
194 // Register the MC register info.
195 TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
196 TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
197 TargetRegistry::RegisterMCRegInfo(ThePPC64LETarget, createPPCMCRegisterInfo);
199 // Register the MC subtarget info.
200 TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
201 createPPCMCSubtargetInfo);
202 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
203 createPPCMCSubtargetInfo);
204 TargetRegistry::RegisterMCSubtargetInfo(ThePPC64LETarget,
205 createPPCMCSubtargetInfo);
207 // Register the MC Code Emitter
208 TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter);
209 TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter);
210 TargetRegistry::RegisterMCCodeEmitter(ThePPC64LETarget,
211 createPPCMCCodeEmitter);
213 // Register the asm backend.
214 TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend);
215 TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend);
216 TargetRegistry::RegisterMCAsmBackend(ThePPC64LETarget, createPPCAsmBackend);
218 // Register the object streamer.
219 TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer);
220 TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer);
221 TargetRegistry::RegisterMCObjectStreamer(ThePPC64LETarget, createMCStreamer);
223 // Register the asm streamer.
224 TargetRegistry::RegisterAsmStreamer(ThePPC32Target, createMCAsmStreamer);
225 TargetRegistry::RegisterAsmStreamer(ThePPC64Target, createMCAsmStreamer);
226 TargetRegistry::RegisterAsmStreamer(ThePPC64LETarget, createMCAsmStreamer);
228 // Register the MCInstPrinter.
229 TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter);
230 TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter);
231 TargetRegistry::RegisterMCInstPrinter(ThePPC64LETarget,
232 createPPCMCInstPrinter);