lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp

   1 //===-- PPCMCTargetDesc.cpp - PowerPC Target Descriptions -----------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides PowerPC specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "PPCMCTargetDesc.h"
  15 #include "InstPrinter/PPCInstPrinter.h"
  16 #include "PPCMCAsmInfo.h"
  17 #include "llvm/MC/MCCodeGenInfo.h"
  18 #include "llvm/MC/MCInstrInfo.h"
  19 #include "llvm/MC/MCRegisterInfo.h"
  20 #include "llvm/MC/MCStreamer.h"
  21 #include "llvm/MC/MCSubtargetInfo.h"
  22 #include "llvm/MC/MachineLocation.h"
  23 #include "llvm/Support/ErrorHandling.h"
  24 #include "llvm/Support/TargetRegistry.h"
  25
  26 #define GET_INSTRINFO_MC_DESC
  27 #include "PPCGenInstrInfo.inc"
  28
  29 #define GET_SUBTARGETINFO_MC_DESC
  30 #include "PPCGenSubtargetInfo.inc"
  31
  32 #define GET_REGINFO_MC_DESC
  33 #include "PPCGenRegisterInfo.inc"
  34
  35 using namespace llvm;
  36
  37 static MCInstrInfo *createPPCMCInstrInfo() {
  38   MCInstrInfo *X = new MCInstrInfo();
  39   InitPPCMCInstrInfo(X);
  40   return X;
  41 }
  42
  43 static MCRegisterInfo *createPPCMCRegisterInfo(StringRef TT) {
  44   Triple TheTriple(TT);
  45   bool isPPC64 = (TheTriple.getArch() == Triple::ppc64);
  46   unsigned Flavour = isPPC64 ? 0 : 1;
  47   unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
  48
  49   MCRegisterInfo *X = new MCRegisterInfo();
  50   InitPPCMCRegisterInfo(X, RA, Flavour, Flavour);
  51   return X;
  52 }
  53
  54 static MCSubtargetInfo *createPPCMCSubtargetInfo(StringRef TT, StringRef CPU,
  55                                                  StringRef FS) {
  56   MCSubtargetInfo *X = new MCSubtargetInfo();
  57   InitPPCMCSubtargetInfo(X, TT, CPU, FS);
  58   return X;
  59 }
  60
  61 static MCAsmInfo *createPPCMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
  62   Triple TheTriple(TT);
  63   bool isPPC64 = TheTriple.getArch() == Triple::ppc64;
  64
  65   MCAsmInfo *MAI;
  66   if (TheTriple.isOSDarwin())
  67     MAI = new PPCMCAsmInfoDarwin(isPPC64);
  68   else
  69     MAI = new PPCLinuxMCAsmInfo(isPPC64);
  70
  71   // Initial state of the frame pointer is R1.
  72   unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
  73   MCCFIInstruction Inst =
  74       MCCFIInstruction::createDefCfa(0, MRI.getDwarfRegNum(Reg, true), 0);
  75   MAI->addInitialFrameState(Inst);
  76
  77   return MAI;
  78 }
  79
  80 static MCCodeGenInfo *createPPCMCCodeGenInfo(StringRef TT, Reloc::Model RM,
  81                                              CodeModel::Model CM,
  82                                              CodeGenOpt::Level OL) {
  83   MCCodeGenInfo *X = new MCCodeGenInfo();
  84
  85   if (RM == Reloc::Default) {
  86     Triple T(TT);
  87     if (T.isOSDarwin())
  88       RM = Reloc::DynamicNoPIC;
  89     else
  90       RM = Reloc::Static;
  91   }
  92   if (CM == CodeModel::Default) {
  93     Triple T(TT);
  94     if (!T.isOSDarwin() && T.getArch() == Triple::ppc64)
  95       CM = CodeModel::Medium;
  96   }
  97   X->InitMCCodeGenInfo(RM, CM, OL);
  98   return X;
  99 }
 100
 101 // This is duplicated code. Refactor this.
 102 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
 103                                     MCContext &Ctx, MCAsmBackend &MAB,
 104                                     raw_ostream &OS,
 105                                     MCCodeEmitter *Emitter,
 106                                     bool RelaxAll,
 107                                     bool NoExecStack) {
 108   if (Triple(TT).isOSDarwin())
 109     return createMachOStreamer(Ctx, MAB, OS, Emitter, RelaxAll);
 110
 111   return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
 112 }
 113
 114 static MCInstPrinter *createPPCMCInstPrinter(const Target &T,
 115                                              unsigned SyntaxVariant,
 116                                              const MCAsmInfo &MAI,
 117                                              const MCInstrInfo &MII,
 118                                              const MCRegisterInfo &MRI,
 119                                              const MCSubtargetInfo &STI) {
 120   return new PPCInstPrinter(MAI, MII, MRI, SyntaxVariant);
 121 }
 122
 123 extern "C" void LLVMInitializePowerPCTargetMC() {
 124   // Register the MC asm info.
 125   RegisterMCAsmInfoFn C(ThePPC32Target, createPPCMCAsmInfo);
 126   RegisterMCAsmInfoFn D(ThePPC64Target, createPPCMCAsmInfo);
 127
 128   // Register the MC codegen info.
 129   TargetRegistry::RegisterMCCodeGenInfo(ThePPC32Target, createPPCMCCodeGenInfo);
 130   TargetRegistry::RegisterMCCodeGenInfo(ThePPC64Target, createPPCMCCodeGenInfo);
 131
 132   // Register the MC instruction info.
 133   TargetRegistry::RegisterMCInstrInfo(ThePPC32Target, createPPCMCInstrInfo);
 134   TargetRegistry::RegisterMCInstrInfo(ThePPC64Target, createPPCMCInstrInfo);
 135
 136   // Register the MC register info.
 137   TargetRegistry::RegisterMCRegInfo(ThePPC32Target, createPPCMCRegisterInfo);
 138   TargetRegistry::RegisterMCRegInfo(ThePPC64Target, createPPCMCRegisterInfo);
 139
 140   // Register the MC subtarget info.
 141   TargetRegistry::RegisterMCSubtargetInfo(ThePPC32Target,
 142                                           createPPCMCSubtargetInfo);
 143   TargetRegistry::RegisterMCSubtargetInfo(ThePPC64Target,
 144                                           createPPCMCSubtargetInfo);
 145
 146   // Register the MC Code Emitter
 147   TargetRegistry::RegisterMCCodeEmitter(ThePPC32Target, createPPCMCCodeEmitter);
 148   TargetRegistry::RegisterMCCodeEmitter(ThePPC64Target, createPPCMCCodeEmitter);
 149
 150     // Register the asm backend.
 151   TargetRegistry::RegisterMCAsmBackend(ThePPC32Target, createPPCAsmBackend);
 152   TargetRegistry::RegisterMCAsmBackend(ThePPC64Target, createPPCAsmBackend);
 153
 154   // Register the object streamer.
 155   TargetRegistry::RegisterMCObjectStreamer(ThePPC32Target, createMCStreamer);
 156   TargetRegistry::RegisterMCObjectStreamer(ThePPC64Target, createMCStreamer);
 157
 158   // Register the MCInstPrinter.
 159   TargetRegistry::RegisterMCInstPrinter(ThePPC32Target, createPPCMCInstPrinter);
 160   TargetRegistry::RegisterMCInstPrinter(ThePPC64Target, createPPCMCInstPrinter);
 161 }