1 //===-- PIC16ISelDAGToDAG.cpp - A dag to dag inst selector for PIC16 ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the PIC16 target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "pic16-isel"
17 #include "PIC16ISelLowering.h"
18 #include "PIC16RegisterInfo.h"
19 #include "PIC16Subtarget.h"
20 #include "PIC16TargetMachine.h"
21 #include "llvm/GlobalValue.h"
22 #include "llvm/Instructions.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/Type.h"
25 #include "llvm/CodeGen/MachineConstantPool.h"
26 #include "llvm/CodeGen/MachineFunction.h"
27 #include "llvm/CodeGen/MachineFrameInfo.h"
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
29 #include "llvm/CodeGen/SelectionDAGISel.h"
30 #include "llvm/CodeGen/SelectionDAGNodes.h"
31 #include "llvm/Support/CFG.h"
32 #include "llvm/Support/Compiler.h"
33 #include "llvm/Support/Debug.h"
34 #include "llvm/Target/TargetMachine.h"
40 //===----------------------------------------------------------------------===//
41 // Instruction Selector Implementation
42 //===----------------------------------------------------------------------===//
44 //===----------------------------------------------------------------------===//
45 // PIC16DAGToDAGISel - PIC16 specific code to select PIC16 machine
46 // instructions for SelectionDAG operations.
47 //===----------------------------------------------------------------------===//
50 class VISIBILITY_HIDDEN PIC16DAGToDAGISel : public SelectionDAGISel {
52 /// TM - Keep a reference to PIC16TargetMachine.
53 PIC16TargetMachine &TM;
55 /// PIC16Lowering - This object fully describes how to lower LLVM code to an
56 /// PIC16-specific SelectionDAG.
57 PIC16TargetLowering PIC16Lowering;
60 PIC16DAGToDAGISel(PIC16TargetMachine &tm) :
61 SelectionDAGISel(PIC16Lowering),
62 TM(tm), PIC16Lowering(*TM.getTargetLowering()) {}
64 virtual void InstructionSelect(SelectionDAG &SD);
67 virtual const char *getPassName() const {
68 return "PIC16 DAG->DAG Pattern Instruction Selection";
72 // Include the pieces autogenerated from the target description.
73 #include "PIC16GenDAGISel.inc"
75 SDNode *Select(SDOperand N);
77 // Select addressing mode. currently assume base + offset addr mode.
78 bool SelectAM(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset);
79 bool SelectDirectAM(SDOperand Op, SDOperand N, SDOperand &Base,
81 bool StoreInDirectAM(SDOperand Op, SDOperand N, SDOperand &fsr);
82 bool LoadFSR(SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset);
83 bool LoadNothing(SDOperand Op, SDOperand N, SDOperand &Base,
86 // getI8Imm - Return a target constant with the specified
88 inline SDOperand getI8Imm(unsigned Imm) {
89 return CurDAG->getTargetConstant(Imm, MVT::i8);
100 /// InstructionSelect - This callback is invoked by
101 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
102 void PIC16DAGToDAGISel::InstructionSelect(SelectionDAG &SD)
105 // Codegen the basic block.
107 DOUT << "===== Instruction selection begins:\n";
112 // Select target instructions for the DAG.
113 SD.setRoot(SelectRoot(SD.getRoot()));
115 DOUT << "===== Instruction selection ends:\n";
117 SD.RemoveDeadNodes();
121 bool PIC16DAGToDAGISel::
122 SelectDirectAM (SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset)
124 GlobalAddressSDNode *GA;
127 // if Address is FI, get the TargetFrameIndex.
128 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(N)) {
129 DOUT << "--------- its frame Index\n";
130 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
131 Offset = CurDAG->getTargetConstant(0, MVT::i32);
135 if (N.getOpcode() == ISD::GlobalAddress) {
136 GA = dyn_cast<GlobalAddressSDNode>(N);
137 Offset = CurDAG->getTargetConstant((unsigned char)GA->getOffset(), MVT::i8);
138 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
143 if (N.getOpcode() == ISD::ADD) {
144 GC = dyn_cast<ConstantSDNode>(N.getOperand(1));
145 Offset = CurDAG->getTargetConstant((unsigned char)GC->getValue(), MVT::i8);
146 if ((GA = dyn_cast<GlobalAddressSDNode>(N.getOperand(0)))) {
147 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
151 else if (FrameIndexSDNode *FIN
152 = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) {
153 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
162 // FIXME: must also account for preinc/predec/postinc/postdec.
163 bool PIC16DAGToDAGISel::
164 StoreInDirectAM (SDOperand Op, SDOperand N, SDOperand &fsr)
167 if (N.getOpcode() == ISD::LOAD) {
168 LoadSDNode *LD = dyn_cast<LoadSDNode>(N);
170 fsr = LD->getBasePtr();
172 else if (isa<RegisterSDNode>(N.Val)) {
173 //FIXME an attempt to retrieve the register number
175 DOUT << "this is a register\n";
176 Reg = dyn_cast<RegisterSDNode>(N.Val);
177 fsr = CurDAG->getRegister(Reg->getReg(),MVT::i16);
180 DOUT << "this is not a register\n";
181 // FIXME must use whatever load is using
182 fsr = CurDAG->getRegister(1,MVT::i16);
189 bool PIC16DAGToDAGISel::
190 LoadFSR (SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset)
192 GlobalAddressSDNode *GA;
194 if (N.getOpcode() == ISD::GlobalAddress) {
195 GA = dyn_cast<GlobalAddressSDNode>(N);
196 Offset = CurDAG->getTargetConstant((unsigned char)GA->getOffset(), MVT::i8);
197 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
201 else if (N.getOpcode() == PIC16ISD::Package) {
202 CurDAG->setGraphColor(Op.Val, "blue");
209 // LoadNothing - Don't thake this seriously, it will change.
210 bool PIC16DAGToDAGISel::
211 LoadNothing (SDOperand Op, SDOperand N, SDOperand &Base, SDOperand &Offset)
213 GlobalAddressSDNode *GA;
214 if (N.getOpcode() == ISD::GlobalAddress) {
215 GA = dyn_cast<GlobalAddressSDNode>(N);
216 DOUT << "==========" << GA->getOffset() << "\n";
217 Offset = CurDAG->getTargetConstant((unsigned char)GA->getOffset(), MVT::i8);
218 Base = CurDAG->getTargetGlobalAddress(GA->getGlobal(), MVT::i16,
227 /// Select - Select instructions not customized! Used for
228 /// expanded, promoted and normal instructions.
229 SDNode* PIC16DAGToDAGISel::Select(SDOperand N)
231 SDNode *Node = N.Val;
232 unsigned Opcode = Node->getOpcode();
234 // Dump information about the Node being selected
236 DOUT << std::string(Indent, ' ') << "Selecting: ";
237 DEBUG(Node->dump(CurDAG));
242 // If we have a custom node, we already have selected!
243 if (Opcode >= ISD::BUILTIN_OP_END && Opcode < PIC16ISD::FIRST_NUMBER) {
245 DOUT << std::string(Indent-2, ' ') << "== ";
246 DEBUG(Node->dump(CurDAG));
254 // FIXME: Instruction Selection not handled by custom or by the
255 // auto-generated tablegen selection should be handled here.
261 // Select the default instruction.
262 SDNode *ResNode = SelectCode(N);
265 DOUT << std::string(Indent-2, ' ') << "=> ";
266 if (ResNode == NULL || ResNode == N.Val)
267 DEBUG(N.Val->dump(CurDAG));
269 DEBUG(ResNode->dump(CurDAG));
277 /// createPIC16ISelDag - This pass converts a legalized DAG into a
278 /// PIC16-specific DAG, ready for instruction scheduling.
279 FunctionPass *llvm::createPIC16ISelDag(PIC16TargetMachine &TM) {
280 return new PIC16DAGToDAGISel(TM);