1 //===-- MipsTargetMachine.h - Define TargetMachine for Mips -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the Mips specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef MIPSTARGETMACHINE_H
15 #define MIPSTARGETMACHINE_H
17 #include "MipsFrameLowering.h"
18 #include "MipsISelLowering.h"
19 #include "MipsInstrInfo.h"
20 #include "MipsSubtarget.h"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/SelectionDAGISel.h"
23 #include "llvm/Target/TargetFrameLowering.h"
24 #include "llvm/Target/TargetMachine.h"
27 class formatted_raw_ostream;
28 class MipsRegisterInfo;
30 class MipsTargetMachine : public LLVMTargetMachine {
31 MipsSubtarget Subtarget;
32 std::unique_ptr<const MipsInstrInfo> InstrInfo;
33 std::unique_ptr<const MipsFrameLowering> FrameLowering;
34 std::unique_ptr<const MipsTargetLowering> TLInfo;
35 std::unique_ptr<const MipsInstrInfo> InstrInfo16;
36 std::unique_ptr<const MipsFrameLowering> FrameLowering16;
37 std::unique_ptr<const MipsTargetLowering> TLInfo16;
38 std::unique_ptr<const MipsInstrInfo> InstrInfoSE;
39 std::unique_ptr<const MipsFrameLowering> FrameLoweringSE;
40 std::unique_ptr<const MipsTargetLowering> TLInfoSE;
43 MipsTargetMachine(const Target &T, StringRef TT,
44 StringRef CPU, StringRef FS, const TargetOptions &Options,
45 Reloc::Model RM, CodeModel::Model CM,
49 virtual ~MipsTargetMachine() {}
51 void addAnalysisPasses(PassManagerBase &PM) override;
53 const MipsInstrInfo *getInstrInfo() const override
54 { return InstrInfo.get(); }
55 const TargetFrameLowering *getFrameLowering() const override
56 { return FrameLowering.get(); }
57 const MipsSubtarget *getSubtargetImpl() const override
58 { return &Subtarget; }
60 const InstrItineraryData *getInstrItineraryData() const override {
61 return Subtarget.inMips16Mode()
63 : &getSubtargetImpl()->getInstrItineraryData();
66 MipsJITInfo *getJITInfo() override {
67 return Subtarget.getJITInfo();
70 const MipsRegisterInfo *getRegisterInfo() const override {
71 return &InstrInfo->getRegisterInfo();
74 const MipsTargetLowering *getTargetLowering() const override {
78 const DataLayout *getDataLayout() const override {
79 return getSubtargetImpl()->getDataLayout();
81 const MipsSelectionDAGInfo* getSelectionDAGInfo() const override {
82 return getSubtargetImpl()->getSelectionDAGInfo();
85 // Pass Pipeline Configuration
86 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
87 bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &JCE) override;
90 void setHelperClassesMips16();
92 void setHelperClassesMipsSE();
97 /// MipsebTargetMachine - Mips32/64 big endian target machine.
99 class MipsebTargetMachine : public MipsTargetMachine {
100 virtual void anchor();
102 MipsebTargetMachine(const Target &T, StringRef TT,
103 StringRef CPU, StringRef FS, const TargetOptions &Options,
104 Reloc::Model RM, CodeModel::Model CM,
105 CodeGenOpt::Level OL);
108 /// MipselTargetMachine - Mips32/64 little endian target machine.
110 class MipselTargetMachine : public MipsTargetMachine {
111 virtual void anchor();
113 MipselTargetMachine(const Target &T, StringRef TT,
114 StringRef CPU, StringRef FS, const TargetOptions &Options,
115 Reloc::Model RM, CodeModel::Model CM,
116 CodeGenOpt::Level OL);
119 } // End llvm namespace