1 //===-- MipsSchedule.td - Mips Scheduling Definitions ------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Functional units across Mips chips sets. Based on GCC/Mips backend files.
12 //===----------------------------------------------------------------------===//
14 def IMULDIV : FuncUnit;
16 //===----------------------------------------------------------------------===//
17 // Instruction Itinerary classes used for Mips
18 //===----------------------------------------------------------------------===//
19 def IIAlu : InstrItinClass;
20 def IILoad : InstrItinClass;
21 def IIStore : InstrItinClass;
22 def IIBranch : InstrItinClass;
23 def IIHiLo : InstrItinClass;
24 def IIImul : InstrItinClass;
25 def IIImult : InstrItinClass;
26 def IIIdiv : InstrItinClass;
27 def IIslt : InstrItinClass;
28 def IIFcvt : InstrItinClass;
29 def IIFmove : InstrItinClass;
30 def IIFcmp : InstrItinClass;
31 def IIFadd : InstrItinClass;
32 def IIFmulSingle : InstrItinClass;
33 def IIFmulDouble : InstrItinClass;
34 def IIFdivSingle : InstrItinClass;
35 def IIFdivDouble : InstrItinClass;
36 def IIFsqrtSingle : InstrItinClass;
37 def IIFsqrtDouble : InstrItinClass;
38 def IIFrecipFsqrtStep : InstrItinClass;
39 def IIFLoad : InstrItinClass;
40 def IIFStore : InstrItinClass;
41 def IIFmoveC1 : InstrItinClass;
42 def IIPseudo : InstrItinClass;
44 def II_ADDI : InstrItinClass;
45 def II_ADDIU : InstrItinClass;
46 def II_ADDU : InstrItinClass;
47 def II_AND : InstrItinClass;
48 def II_ANDI : InstrItinClass;
49 def II_CLO : InstrItinClass;
50 def II_CLZ : InstrItinClass;
51 def II_DADDIU : InstrItinClass;
52 def II_DADDU : InstrItinClass;
53 def II_DROTR : InstrItinClass;
54 def II_DROTR32 : InstrItinClass;
55 def II_DROTRV : InstrItinClass;
56 def II_DSLL : InstrItinClass;
57 def II_DSLL32 : InstrItinClass;
58 def II_DSLLV : InstrItinClass;
59 def II_DSRA : InstrItinClass;
60 def II_DSRA32 : InstrItinClass;
61 def II_DSRAV : InstrItinClass;
62 def II_DSRL : InstrItinClass;
63 def II_DSRL32 : InstrItinClass;
64 def II_DSRLV : InstrItinClass;
65 def II_DSUBU : InstrItinClass;
66 def II_LUI : InstrItinClass;
67 def II_MOVF : InstrItinClass;
68 def II_MOVN : InstrItinClass;
69 def II_MOVT : InstrItinClass;
70 def II_MOVZ : InstrItinClass;
71 def II_NOR : InstrItinClass;
72 def II_OR : InstrItinClass;
73 def II_ORI : InstrItinClass;
74 def II_RDHWR : InstrItinClass;
75 def II_ROTR : InstrItinClass;
76 def II_ROTRV : InstrItinClass;
77 def II_SEB : InstrItinClass;
78 def II_SEH : InstrItinClass;
79 def II_SLL : InstrItinClass;
80 def II_SLLV : InstrItinClass;
81 def II_SRA : InstrItinClass;
82 def II_SRAV : InstrItinClass;
83 def II_SRL : InstrItinClass;
84 def II_SRLV : InstrItinClass;
85 def II_SUBU : InstrItinClass;
86 def II_XOR : InstrItinClass;
87 def II_XORI : InstrItinClass;
89 //===----------------------------------------------------------------------===//
90 // Mips Generic instruction itineraries.
91 //===----------------------------------------------------------------------===//
92 def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [
93 InstrItinData<IIAlu , [InstrStage<1, [ALU]>]>,
94 InstrItinData<II_ADDI , [InstrStage<1, [ALU]>]>,
95 InstrItinData<II_ADDIU , [InstrStage<1, [ALU]>]>,
96 InstrItinData<II_ADDU , [InstrStage<1, [ALU]>]>,
97 InstrItinData<II_AND , [InstrStage<1, [ALU]>]>,
98 InstrItinData<II_SLL , [InstrStage<1, [ALU]>]>,
99 InstrItinData<II_SRA , [InstrStage<1, [ALU]>]>,
100 InstrItinData<II_SRL , [InstrStage<1, [ALU]>]>,
101 InstrItinData<II_ROTR , [InstrStage<1, [ALU]>]>,
102 InstrItinData<II_SLLV , [InstrStage<1, [ALU]>]>,
103 InstrItinData<II_SRAV , [InstrStage<1, [ALU]>]>,
104 InstrItinData<II_SRLV , [InstrStage<1, [ALU]>]>,
105 InstrItinData<II_ROTRV , [InstrStage<1, [ALU]>]>,
106 InstrItinData<II_CLO , [InstrStage<1, [ALU]>]>,
107 InstrItinData<II_CLZ , [InstrStage<1, [ALU]>]>,
108 InstrItinData<II_DADDIU , [InstrStage<1, [ALU]>]>,
109 InstrItinData<II_DADDU , [InstrStage<1, [ALU]>]>,
110 InstrItinData<II_DSLL , [InstrStage<1, [ALU]>]>,
111 InstrItinData<II_DSRL , [InstrStage<1, [ALU]>]>,
112 InstrItinData<II_DSRA , [InstrStage<1, [ALU]>]>,
113 InstrItinData<II_DSLLV , [InstrStage<1, [ALU]>]>,
114 InstrItinData<II_DSRLV , [InstrStage<1, [ALU]>]>,
115 InstrItinData<II_DSRAV , [InstrStage<1, [ALU]>]>,
116 InstrItinData<II_DSUBU , [InstrStage<1, [ALU]>]>,
117 InstrItinData<II_DROTR , [InstrStage<1, [ALU]>]>,
118 InstrItinData<II_DROTRV , [InstrStage<1, [ALU]>]>,
119 InstrItinData<II_LUI , [InstrStage<1, [ALU]>]>,
120 InstrItinData<II_MOVF , [InstrStage<1, [ALU]>]>,
121 InstrItinData<II_MOVN , [InstrStage<1, [ALU]>]>,
122 InstrItinData<II_MOVT , [InstrStage<1, [ALU]>]>,
123 InstrItinData<II_MOVZ , [InstrStage<1, [ALU]>]>,
124 InstrItinData<II_NOR , [InstrStage<1, [ALU]>]>,
125 InstrItinData<II_OR , [InstrStage<1, [ALU]>]>,
126 InstrItinData<II_RDHWR , [InstrStage<1, [ALU]>]>,
127 InstrItinData<II_SUBU , [InstrStage<1, [ALU]>]>,
128 InstrItinData<II_XOR , [InstrStage<1, [ALU]>]>,
129 InstrItinData<II_ANDI , [InstrStage<1, [ALU]>]>,
130 InstrItinData<II_ORI , [InstrStage<1, [ALU]>]>,
131 InstrItinData<II_XORI , [InstrStage<1, [ALU]>]>,
132 InstrItinData<IILoad , [InstrStage<3, [ALU]>]>,
133 InstrItinData<IIStore , [InstrStage<1, [ALU]>]>,
134 InstrItinData<IIBranch , [InstrStage<1, [ALU]>]>,
135 InstrItinData<IIHiLo , [InstrStage<1, [IMULDIV]>]>,
136 InstrItinData<IIImul , [InstrStage<17, [IMULDIV]>]>,
137 InstrItinData<IIImult , [InstrStage<17, [IMULDIV]>]>,
138 InstrItinData<IIIdiv , [InstrStage<38, [IMULDIV]>]>,
139 InstrItinData<IIFcvt , [InstrStage<1, [ALU]>]>,
140 InstrItinData<IIFmove , [InstrStage<2, [ALU]>]>,
141 InstrItinData<IIFcmp , [InstrStage<3, [ALU]>]>,
142 InstrItinData<IIFadd , [InstrStage<4, [ALU]>]>,
143 InstrItinData<IIFmulSingle , [InstrStage<7, [ALU]>]>,
144 InstrItinData<IIFmulDouble , [InstrStage<8, [ALU]>]>,
145 InstrItinData<IIFdivSingle , [InstrStage<23, [ALU]>]>,
146 InstrItinData<IIFdivDouble , [InstrStage<36, [ALU]>]>,
147 InstrItinData<IIFsqrtSingle , [InstrStage<54, [ALU]>]>,
148 InstrItinData<IIFsqrtDouble , [InstrStage<12, [ALU]>]>,
149 InstrItinData<IIFrecipFsqrtStep , [InstrStage<5, [ALU]>]>,
150 InstrItinData<IIFLoad , [InstrStage<3, [ALU]>]>,
151 InstrItinData<IIFStore , [InstrStage<1, [ALU]>]>,
152 InstrItinData<IIFmoveC1 , [InstrStage<2, [ALU]>]>