1 //===-- MipsSEFrameLowering.cpp - Mips32/64 Frame Information -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips32/64 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "MipsSEFrameLowering.h"
15 #include "MipsAnalyzeImmediate.h"
16 #include "MipsInstrInfo.h"
17 #include "MipsMachineFunction.h"
18 #include "MCTargetDesc/MipsBaseInfo.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/CodeGen/MachineModuleInfo.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/Support/CommandLine.h"
31 void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const {
32 MachineBasicBlock &MBB = MF.front();
33 MachineFrameInfo *MFI = MF.getFrameInfo();
34 const MipsRegisterInfo *RegInfo =
35 static_cast<const MipsRegisterInfo*>(MF.getTarget().getRegisterInfo());
36 const MipsInstrInfo &TII =
37 *static_cast<const MipsInstrInfo*>(MF.getTarget().getInstrInfo());
38 MachineBasicBlock::iterator MBBI = MBB.begin();
39 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
40 unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
41 unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
42 unsigned ZERO = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
43 unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
44 unsigned ADDiu = STI.isABI_N64() ? Mips::DADDiu : Mips::ADDiu;
46 // First, compute final stack size.
47 uint64_t StackSize = MFI->getStackSize();
49 // No need to allocate space on the stack.
50 if (StackSize == 0 && !MFI->adjustsStack()) return;
52 MachineModuleInfo &MMI = MF.getMMI();
53 std::vector<MachineMove> &Moves = MMI.getFrameMoves();
54 MachineLocation DstML, SrcML;
57 if (isInt<16>(-StackSize))// addi sp, sp, (-stacksize)
58 BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(-StackSize);
59 else { // Expand immediate that doesn't fit in 16-bit.
60 unsigned ATReg = STI.isABI_N64() ? Mips::AT_64 : Mips::AT;
62 MF.getInfo<MipsFunctionInfo>()->setEmitNOAT();
63 Mips::loadImmediate(-StackSize, STI.isABI_N64(), TII, MBB, MBBI, dl, false,
65 BuildMI(MBB, MBBI, dl, TII.get(ADDu), SP).addReg(SP).addReg(ATReg);
68 // emit ".cfi_def_cfa_offset StackSize"
69 MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
70 BuildMI(MBB, MBBI, dl,
71 TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel);
72 DstML = MachineLocation(MachineLocation::VirtualFP);
73 SrcML = MachineLocation(MachineLocation::VirtualFP, -StackSize);
74 Moves.push_back(MachineMove(AdjustSPLabel, DstML, SrcML));
76 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
79 // Find the instruction past the last instruction that saves a callee-saved
80 // register to the stack.
81 for (unsigned i = 0; i < CSI.size(); ++i)
84 // Iterate over list of callee-saved registers and emit .cfi_offset
86 MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
87 BuildMI(MBB, MBBI, dl,
88 TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
90 for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
91 E = CSI.end(); I != E; ++I) {
92 int64_t Offset = MFI->getObjectOffset(I->getFrameIdx());
93 unsigned Reg = I->getReg();
95 // If Reg is a double precision register, emit two cfa_offsets,
96 // one for each of the paired single precision registers.
97 if (Mips::AFGR64RegClass.contains(Reg)) {
98 MachineLocation DstML0(MachineLocation::VirtualFP, Offset);
99 MachineLocation DstML1(MachineLocation::VirtualFP, Offset + 4);
100 MachineLocation SrcML0(RegInfo->getSubReg(Reg, Mips::sub_fpeven));
101 MachineLocation SrcML1(RegInfo->getSubReg(Reg, Mips::sub_fpodd));
104 std::swap(SrcML0, SrcML1);
106 Moves.push_back(MachineMove(CSLabel, DstML0, SrcML0));
107 Moves.push_back(MachineMove(CSLabel, DstML1, SrcML1));
109 // Reg is either in CPURegs or FGR32.
110 DstML = MachineLocation(MachineLocation::VirtualFP, Offset);
111 SrcML = MachineLocation(Reg);
112 Moves.push_back(MachineMove(CSLabel, DstML, SrcML));
117 // if framepointer enabled, set it to point to the stack pointer.
119 // Insert instruction "move $fp, $sp" at this location.
120 BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO);
122 // emit ".cfi_def_cfa_register $fp"
123 MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol();
124 BuildMI(MBB, MBBI, dl,
125 TII.get(TargetOpcode::PROLOG_LABEL)).addSym(SetFPLabel);
126 DstML = MachineLocation(FP);
127 SrcML = MachineLocation(MachineLocation::VirtualFP);
128 Moves.push_back(MachineMove(SetFPLabel, DstML, SrcML));
132 void MipsSEFrameLowering::emitEpilogue(MachineFunction &MF,
133 MachineBasicBlock &MBB) const {
134 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
135 MachineFrameInfo *MFI = MF.getFrameInfo();
136 const MipsInstrInfo &TII =
137 *static_cast<const MipsInstrInfo*>(MF.getTarget().getInstrInfo());
138 DebugLoc dl = MBBI->getDebugLoc();
139 unsigned SP = STI.isABI_N64() ? Mips::SP_64 : Mips::SP;
140 unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
141 unsigned ZERO = STI.isABI_N64() ? Mips::ZERO_64 : Mips::ZERO;
142 unsigned ADDu = STI.isABI_N64() ? Mips::DADDu : Mips::ADDu;
143 unsigned ADDiu = STI.isABI_N64() ? Mips::DADDiu : Mips::ADDiu;
145 // if framepointer enabled, restore the stack pointer.
147 // Find the first instruction that restores a callee-saved register.
148 MachineBasicBlock::iterator I = MBBI;
150 for (unsigned i = 0; i < MFI->getCalleeSavedInfo().size(); ++i)
153 // Insert instruction "move $sp, $fp" at this location.
154 BuildMI(MBB, I, dl, TII.get(ADDu), SP).addReg(FP).addReg(ZERO);
157 // Get the number of bytes from FrameInfo
158 uint64_t StackSize = MFI->getStackSize();
164 if (isInt<16>(StackSize)) // addi sp, sp, (-stacksize)
165 BuildMI(MBB, MBBI, dl, TII.get(ADDiu), SP).addReg(SP).addImm(StackSize);
166 else { // Expand immediate that doesn't fit in 16-bit.
167 unsigned ATReg = STI.isABI_N64() ? Mips::AT_64 : Mips::AT;
169 MF.getInfo<MipsFunctionInfo>()->setEmitNOAT();
170 Mips::loadImmediate(StackSize, STI.isABI_N64(), TII, MBB, MBBI, dl, false,
172 BuildMI(MBB, MBBI, dl, TII.get(ADDu), SP).addReg(SP).addReg(ATReg);
176 bool MipsSEFrameLowering::
177 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
178 MachineBasicBlock::iterator MI,
179 const std::vector<CalleeSavedInfo> &CSI,
180 const TargetRegisterInfo *TRI) const {
181 MachineFunction *MF = MBB.getParent();
182 MachineBasicBlock *EntryBlock = MF->begin();
183 const TargetInstrInfo &TII = *MF->getTarget().getInstrInfo();
185 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
186 // Add the callee-saved register as live-in. Do not add if the register is
187 // RA and return address is taken, because it has already been added in
188 // method MipsTargetLowering::LowerRETURNADDR.
189 // It's killed at the spill, unless the register is RA and return address
191 unsigned Reg = CSI[i].getReg();
192 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA || Reg == Mips::RA_64)
193 && MF->getFrameInfo()->isReturnAddressTaken();
194 if (!IsRAAndRetAddrIsTaken)
195 EntryBlock->addLiveIn(Reg);
197 // Insert the spill to the stack frame.
198 bool IsKill = !IsRAAndRetAddrIsTaken;
199 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
200 TII.storeRegToStackSlot(*EntryBlock, MI, Reg, IsKill,
201 CSI[i].getFrameIdx(), RC, TRI);
208 MipsSEFrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
209 const MachineFrameInfo *MFI = MF.getFrameInfo();
211 // Reserve call frame if the size of the maximum call frame fits into 16-bit
212 // immediate field and there are no variable sized objects on the stack.
213 return isInt<16>(MFI->getMaxCallFrameSize()) && !MFI->hasVarSizedObjects();
216 void MipsSEFrameLowering::
217 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
218 RegScavenger *RS) const {
219 MachineRegisterInfo &MRI = MF.getRegInfo();
220 unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP;
222 // Mark $fp as used if function has dedicated frame pointer.
224 MRI.setPhysRegUsed(FP);