1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
15 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
18 SDTCisVT<3, OtherVT>]>;
19 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
22 SDTCisVT<3, OtherVT>]>;
23 def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
24 SDTCisInt<1>, SDTCisVec<1>,
25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
26 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
28 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
31 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
32 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
33 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
34 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
35 def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp,
36 [SDNPCommutative, SDNPAssociative]>;
37 def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp,
38 [SDNPCommutative, SDNPAssociative]>;
39 def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp,
40 [SDNPCommutative, SDNPAssociative]>;
41 def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp,
42 [SDNPCommutative, SDNPAssociative]>;
43 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
44 [SDNPCommutative, SDNPAssociative]>;
45 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
46 def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>;
47 def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>;
48 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
49 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
50 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
52 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
53 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
55 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
56 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
57 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
62 def uimm3 : Operand<i32> {
63 let PrintMethod = "printUnsignedImm";
66 def uimm4 : Operand<i32> {
67 let PrintMethod = "printUnsignedImm";
70 def uimm8 : Operand<i32> {
71 let PrintMethod = "printUnsignedImm";
74 def simm5 : Operand<i32>;
76 def simm10 : Operand<i32>;
78 def vsplat_uimm3 : Operand<vAny> {
79 let PrintMethod = "printUnsignedImm";
82 def vsplat_uimm4 : Operand<vAny> {
83 let PrintMethod = "printUnsignedImm";
86 def vsplat_uimm5 : Operand<vAny> {
87 let PrintMethod = "printUnsignedImm";
90 def vsplat_uimm6 : Operand<vAny> {
91 let PrintMethod = "printUnsignedImm";
94 def vsplat_uimm8 : Operand<vAny> {
95 let PrintMethod = "printUnsignedImm";
98 def vsplat_simm5 : Operand<vAny>;
100 def vsplat_simm10 : Operand<vAny>;
103 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
104 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
105 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
106 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
107 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
108 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
110 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
111 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
112 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
113 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
114 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
115 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
117 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
118 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
119 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
120 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
121 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
122 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
124 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
125 PatFrag<(ops node:$lhs, node:$rhs),
126 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
128 // ISD::SETFALSE cannot occur
129 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
130 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
131 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
132 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
133 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
134 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
135 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
136 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
137 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
138 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
139 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
140 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
141 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
142 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
143 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
144 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
145 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
146 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
147 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
148 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
149 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
150 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
151 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
152 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
153 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
154 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
155 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
156 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
157 // ISD::SETTRUE cannot occur
158 // ISD::SETFALSE2 cannot occur
159 // ISD::SETTRUE2 cannot occur
161 class vsetcc_type<ValueType ResTy, CondCode CC> :
162 PatFrag<(ops node:$lhs, node:$rhs),
163 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
165 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
166 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
167 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
168 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
169 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
170 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
171 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
172 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
173 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
174 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
175 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
176 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
177 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
178 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
179 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
180 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
181 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
182 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
183 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
184 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
186 def vsplati8 : PatFrag<(ops node:$e0),
187 (v16i8 (build_vector node:$e0, node:$e0,
194 node:$e0, node:$e0))>;
195 def vsplati16 : PatFrag<(ops node:$e0),
196 (v8i16 (build_vector node:$e0, node:$e0,
199 node:$e0, node:$e0))>;
200 def vsplati32 : PatFrag<(ops node:$e0),
201 (v4i32 (build_vector node:$e0, node:$e0,
202 node:$e0, node:$e0))>;
203 def vsplati64 : PatFrag<(ops node:$e0),
204 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>;
206 class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}],
207 SDNodeXForm xform = NOOP_SDNodeXForm>
208 : PatLeaf<frag, pred, xform> {
209 Operand OpClass = opclass;
212 class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn,
213 list<SDNode> roots = [],
214 list<SDNodeProperty> props = []> :
215 ComplexPattern<ty, numops, fn, roots, props> {
216 Operand OpClass = opclass;
219 def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1,
221 [build_vector, bitconvert]>;
223 def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1,
225 [build_vector, bitconvert]>;
227 def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1,
229 [build_vector, bitconvert]>;
231 def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1,
233 [build_vector, bitconvert]>;
235 def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1,
237 [build_vector, bitconvert]>;
239 def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1,
241 [build_vector, bitconvert]>;
243 def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1,
245 [build_vector, bitconvert]>;
247 def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1,
249 [build_vector, bitconvert]>;
251 def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1,
253 [build_vector, bitconvert]>;
255 def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1,
257 [build_vector, bitconvert]>;
259 def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1,
261 [build_vector, bitconvert]>;
263 def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1,
265 [build_vector, bitconvert]>;
267 // Any build_vector that is a constant splat with a value that is an exact
269 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
270 [build_vector, bitconvert]>;
273 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
274 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
276 // Instruction encoding.
277 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
278 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
279 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
280 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
282 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
283 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
284 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
285 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
287 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
288 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
289 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
290 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
292 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
293 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
294 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
295 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
297 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
298 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
299 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
300 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
302 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
303 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
304 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
305 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
307 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
309 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
311 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
312 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
313 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
314 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
316 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
317 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
318 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
319 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
321 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
322 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
323 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
324 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
326 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
327 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
328 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
329 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
331 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
332 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
333 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
334 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
336 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
337 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
338 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
339 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
341 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
342 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
343 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
344 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
346 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
347 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
348 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
349 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
351 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
352 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
353 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
354 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
356 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
357 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
358 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
359 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
361 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
362 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
363 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
364 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
366 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
367 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
368 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
369 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
371 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
373 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
375 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
377 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
379 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
380 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
381 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
382 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
384 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
385 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
386 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
387 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
389 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
390 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
391 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
392 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
394 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
396 class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>;
398 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
400 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
401 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
402 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
403 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
405 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
406 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
407 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
408 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
410 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
411 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
412 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
413 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
415 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
417 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
418 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
419 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
420 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
422 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
423 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
424 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
425 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
427 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
429 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
430 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
431 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
432 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
434 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
435 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
436 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
437 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
439 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
440 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
441 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
442 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
444 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
445 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
446 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
447 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
449 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
450 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
451 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
452 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
454 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
455 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
456 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
457 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
459 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
460 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
461 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
462 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
464 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
465 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
466 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
467 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
469 class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
470 class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
471 class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
473 class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
474 class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
475 class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
477 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
479 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
480 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
481 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
482 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
484 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
485 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
486 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
487 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
489 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
490 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
491 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
493 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
494 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
495 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
497 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
498 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
499 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
501 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
502 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
503 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
505 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
506 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
507 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
509 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
510 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
511 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
513 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
514 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
516 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
517 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
519 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
520 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
522 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
523 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
525 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
526 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
528 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
529 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
531 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
532 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
534 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
535 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
537 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
538 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
540 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
541 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
543 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
544 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
546 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
547 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
549 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
550 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
552 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
553 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
555 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
556 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
558 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
559 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
561 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
562 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
564 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
565 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
567 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
568 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
570 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
571 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
573 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
574 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
576 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
577 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
579 class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>;
580 class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>;
581 class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>;
583 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
584 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
586 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
587 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
589 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
590 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
592 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
593 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
595 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
596 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
598 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
599 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
601 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
602 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
604 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
605 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
607 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
608 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
610 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
611 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
613 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
614 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
616 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
617 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
619 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
620 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
622 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
623 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
625 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
626 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
628 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
629 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
631 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
632 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
634 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
635 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
637 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
638 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
640 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
641 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
643 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
644 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
646 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
647 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
649 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
650 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
652 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
653 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
655 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110100000, 0b0, 0b011110>;
656 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110100000, 0b1, 0b011110>;
658 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110100001, 0b0, 0b011110>;
659 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110100001, 0b1, 0b011110>;
661 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
662 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
664 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
665 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
667 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
668 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
670 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
671 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
672 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
674 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
675 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
676 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
678 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
679 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
680 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
682 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
683 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
684 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
686 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
687 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
688 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
689 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
691 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
692 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
693 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
694 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
696 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
697 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
698 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
699 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
701 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
702 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
703 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
704 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
706 class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>;
707 class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>;
708 class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>;
710 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
711 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
712 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
713 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
715 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
716 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
717 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
718 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
720 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
721 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
722 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
723 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
725 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
726 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
727 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
728 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
730 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
731 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
733 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
734 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
736 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
737 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
738 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
739 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
741 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
742 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
743 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
744 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
746 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
747 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
748 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
749 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
751 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
752 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
753 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
754 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
756 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
757 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
758 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
759 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
761 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
762 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
763 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
764 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
766 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
767 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
768 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
769 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
771 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
772 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
773 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
774 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
776 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
777 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
778 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
779 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
781 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
782 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
783 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
784 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
786 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
787 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
788 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
789 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
791 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
792 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
793 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
794 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
796 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
797 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
798 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
799 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
801 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
803 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
804 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
806 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
807 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
809 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
810 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
811 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
812 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
814 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>;
815 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>;
817 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
818 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
820 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
821 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
822 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
823 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
825 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
826 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
827 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
828 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
830 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
831 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
832 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
833 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
835 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
837 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
839 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
841 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
843 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
844 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
845 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
846 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
848 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
849 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
850 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
851 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
853 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
854 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
855 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
856 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
858 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
859 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
860 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
861 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
863 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
864 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
865 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
866 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
868 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
869 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
870 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
872 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
873 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
874 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
875 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
877 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
878 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
879 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
880 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
882 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
883 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
884 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
885 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
887 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
888 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
889 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
890 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
892 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
893 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
894 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
895 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
897 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
898 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
899 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
900 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
902 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
903 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
904 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
905 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
907 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
908 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
909 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
910 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
912 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
913 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
914 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
915 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
917 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
918 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
919 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
920 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
922 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
923 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
924 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
925 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
927 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
928 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
929 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
930 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
932 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
933 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
934 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
935 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
937 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
938 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
939 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
940 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
942 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
943 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
944 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
945 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
947 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
948 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
949 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
950 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
952 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
953 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
954 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
955 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
957 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
958 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
959 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
960 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
962 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
963 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
964 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
965 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
967 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
968 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
969 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
970 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
972 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
973 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
974 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
975 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
977 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
978 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
979 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
980 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
982 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
983 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
984 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
985 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
987 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
989 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
992 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
993 RegisterClass RCWD, RegisterClass RCWS = RCWD,
994 InstrItinClass itin = NoItinerary> {
995 dag OutOperandList = (outs RCWD:$wd);
996 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
997 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
998 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))];
999 InstrItinClass Itinerary = itin;
1002 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1003 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1004 InstrItinClass itin = NoItinerary> {
1005 dag OutOperandList = (outs RCWD:$wd);
1006 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
1007 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
1008 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))];
1009 InstrItinClass Itinerary = itin;
1012 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1013 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1014 InstrItinClass itin = NoItinerary> {
1015 dag OutOperandList = (outs RCWD:$wd);
1016 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
1017 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
1018 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
1019 InstrItinClass Itinerary = itin;
1022 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1023 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1024 InstrItinClass itin = NoItinerary> {
1025 dag OutOperandList = (outs RCWD:$wd);
1026 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
1027 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
1028 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))];
1029 InstrItinClass Itinerary = itin;
1032 class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1033 SplatComplexPattern SplatImm, RegisterClass RCWD,
1034 RegisterClass RCWS = RCWD,
1035 InstrItinClass itin = NoItinerary> {
1036 dag OutOperandList = (outs RCWD:$wd);
1037 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u);
1038 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u");
1039 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))];
1040 InstrItinClass Itinerary = itin;
1043 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1044 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS,
1045 InstrItinClass itin = NoItinerary> {
1046 dag OutOperandList = (outs RCD:$rd);
1047 dag InOperandList = (ins RCWS:$ws, uimm4:$n);
1048 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
1049 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))];
1050 InstrItinClass Itinerary = itin;
1053 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1054 SplatComplexPattern SplatImm, RegisterClass RCWD,
1055 RegisterClass RCWS = RCWD,
1056 InstrItinClass itin = NoItinerary> {
1057 dag OutOperandList = (outs RCWD:$wd);
1058 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$imm);
1059 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm");
1060 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$imm))];
1061 InstrItinClass Itinerary = itin;
1064 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1065 SplatComplexPattern SplatImm, RegisterClass RCWD,
1066 RegisterClass RCWS = RCWD,
1067 InstrItinClass itin = NoItinerary> {
1068 dag OutOperandList = (outs RCWD:$wd);
1069 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u8);
1070 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1071 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u8))];
1072 InstrItinClass Itinerary = itin;
1075 // This class is deprecated and will be removed in the next few patches
1076 class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1077 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1078 InstrItinClass itin = NoItinerary> {
1079 dag OutOperandList = (outs RCWD:$wd);
1080 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
1081 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1082 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))];
1083 InstrItinClass Itinerary = itin;
1086 class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterClass RCWD,
1087 RegisterClass RCWS = RCWD,
1088 InstrItinClass itin = NoItinerary> {
1089 dag OutOperandList = (outs RCWD:$wd);
1090 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
1091 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1092 list<dag> Pattern = [(set RCWD:$wd, (MipsSHF immZExt8:$u8, RCWS:$ws))];
1093 InstrItinClass Itinerary = itin;
1096 class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD,
1097 InstrItinClass itin = NoItinerary> {
1098 dag OutOperandList = (outs RCWD:$wd);
1099 dag InOperandList = (ins vsplat_simm10:$i10);
1100 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
1101 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp
1102 list<dag> Pattern = [];
1103 bit hasSideEffects = 0;
1104 InstrItinClass Itinerary = itin;
1107 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1108 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1109 InstrItinClass itin = NoItinerary> {
1110 dag OutOperandList = (outs RCWD:$wd);
1111 dag InOperandList = (ins RCWS:$ws);
1112 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1113 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))];
1114 InstrItinClass Itinerary = itin;
1117 class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT,
1118 SDPatternOperator OpNode, RegisterClass RCWD,
1119 RegisterClass RCWS = RCWD,
1120 InstrItinClass itin = NoItinerary> {
1121 dag OutOperandList = (outs RCWD:$wd);
1122 dag InOperandList = (ins RCWS:$ws);
1123 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1124 list<dag> Pattern = [(set RCWD:$wd, (VT (OpNode RCWS:$ws)))];
1125 InstrItinClass Itinerary = itin;
1128 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1129 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1130 InstrItinClass itin = NoItinerary> :
1131 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>;
1134 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1135 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1136 RegisterClass RCWT = RCWD,
1137 InstrItinClass itin = NoItinerary> {
1138 dag OutOperandList = (outs RCWD:$wd);
1139 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
1140 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1141 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
1142 InstrItinClass Itinerary = itin;
1145 class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterClass RCWD,
1146 RegisterClass RCWS = RCWD,
1147 RegisterClass RCWT = RCWD,
1148 InstrItinClass itin = NoItinerary> {
1149 dag OutOperandList = (outs RCWD:$wd);
1150 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
1151 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1152 list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF RCWD:$wd_in, RCWS:$ws,
1154 string Constraints = "$wd = $wd_in";
1155 InstrItinClass Itinerary = itin;
1158 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1159 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1160 RegisterClass RCWT = RCWD,
1161 InstrItinClass itin = NoItinerary> {
1162 dag OutOperandList = (outs RCWD:$wd);
1163 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
1164 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1165 list<dag> Pattern = [(set RCWD:$wd,
1166 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))];
1167 InstrItinClass Itinerary = itin;
1168 string Constraints = "$wd = $wd_in";
1171 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1172 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1173 RegisterClass RCWT = RCWD,
1174 InstrItinClass itin = NoItinerary> :
1175 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
1177 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1178 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1179 RegisterClass RCWT = RCWD,
1180 InstrItinClass itin = NoItinerary> :
1181 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
1183 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
1184 dag OutOperandList = (outs);
1185 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
1186 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
1187 list<dag> Pattern = [];
1188 InstrItinClass Itinerary = IIBranch;
1190 bit isTerminator = 1;
1191 bit hasDelaySlot = 1;
1192 list<Register> Defs = [AT];
1195 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1196 RegisterClass RCD, RegisterClass RCWS,
1197 InstrItinClass itin = NoItinerary> {
1198 dag OutOperandList = (outs RCD:$wd);
1199 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n);
1200 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1201 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in,
1204 InstrItinClass Itinerary = itin;
1205 string Constraints = "$wd = $wd_in";
1208 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1209 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1210 InstrItinClass itin = NoItinerary> {
1211 dag OutOperandList = (outs RCWD:$wd);
1212 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
1213 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1214 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
1217 InstrItinClass Itinerary = itin;
1218 string Constraints = "$wd = $wd_in";
1221 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1222 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1223 RegisterClass RCWT = RCWD,
1224 InstrItinClass itin = NoItinerary> {
1225 dag OutOperandList = (outs RCWD:$wd);
1226 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
1227 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1228 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
1229 InstrItinClass Itinerary = itin;
1232 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD,
1233 RegisterClass RCWS = RCWD,
1234 RegisterClass RCWT = RCWD> :
1235 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt),
1236 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>;
1238 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>,
1240 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>,
1242 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>,
1244 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>,
1247 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>,
1249 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>,
1251 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>,
1253 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>,
1256 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>,
1258 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>,
1260 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>,
1262 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>,
1265 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>,
1267 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>,
1269 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>,
1271 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>,
1274 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable;
1275 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable;
1276 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable;
1277 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable;
1279 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, MSA128B>;
1280 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, MSA128H>;
1281 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, MSA128W>;
1282 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, MSA128D>;
1284 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>;
1285 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>;
1286 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>;
1287 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>;
1289 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, MSA128B>;
1291 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>;
1292 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>;
1293 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>;
1294 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>;
1296 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>;
1297 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>;
1298 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>;
1299 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>;
1301 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>,
1303 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>,
1305 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>,
1307 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>,
1310 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>,
1312 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>,
1314 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>,
1316 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>,
1319 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>,
1321 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>,
1323 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>,
1325 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>,
1328 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>,
1330 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>,
1332 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>,
1334 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>,
1337 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>;
1338 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>;
1339 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>;
1340 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>;
1342 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>;
1343 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>;
1344 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>;
1345 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>;
1347 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>;
1348 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>;
1349 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>;
1350 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>;
1352 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1354 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1356 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1358 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1361 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>;
1362 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>;
1363 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>;
1364 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>;
1366 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1368 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1370 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1372 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1375 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>;
1377 class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>;
1379 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>;
1381 class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>;
1383 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>;
1384 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>;
1385 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>;
1386 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>;
1388 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>;
1389 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>;
1390 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>;
1391 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>;
1393 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1394 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1395 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1396 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1398 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1401 dag OutOperandList = (outs MSA128B:$wd);
1402 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt);
1403 string AsmString = "bsel.v\t$wd, $ws, $wt";
1404 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws,
1406 InstrItinClass Itinerary = NoItinerary;
1407 string Constraints = "$wd = $wd_in";
1410 class BSELI_B_DESC {
1411 dag OutOperandList = (outs MSA128B:$wd);
1412 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, vsplat_uimm8:$u8);
1413 string AsmString = "bseli.b\t$wd, $ws, $u8";
1414 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in,
1416 vsplati8_uimm8:$u8))];
1417 InstrItinClass Itinerary = NoItinerary;
1418 string Constraints = "$wd = $wd_in";
1421 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>;
1422 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>;
1423 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>;
1424 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>;
1426 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>;
1427 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>;
1428 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>;
1429 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>;
1431 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1432 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1433 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1434 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1436 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1438 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>,
1440 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>,
1442 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>,
1444 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>,
1447 class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5,
1449 class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5,
1451 class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5,
1453 class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5,
1457 dag OutOperandList = (outs GPR32:$rd);
1458 dag InOperandList = (ins MSACtrl:$cs);
1459 string AsmString = "cfcmsa\t$rd, $cs";
1460 InstrItinClass Itinerary = NoItinerary;
1461 bit hasSideEffects = 1;
1464 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>;
1465 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>;
1466 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>;
1467 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>;
1469 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>;
1470 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>;
1471 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>;
1472 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>;
1474 class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8,
1475 vsplati8_simm5, MSA128B>;
1476 class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16,
1477 vsplati16_simm5, MSA128H>;
1478 class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32,
1479 vsplati32_simm5, MSA128W>;
1480 class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64,
1481 vsplati64_simm5, MSA128D>;
1483 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8,
1484 vsplati8_uimm5, MSA128B>;
1485 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16,
1486 vsplati16_uimm5, MSA128H>;
1487 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32,
1488 vsplati32_uimm5, MSA128W>;
1489 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64,
1490 vsplati64_uimm5, MSA128D>;
1492 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>;
1493 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>;
1494 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>;
1495 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>;
1497 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>;
1498 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>;
1499 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>;
1500 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>;
1502 class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8,
1503 vsplati8_simm5, MSA128B>;
1504 class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16,
1505 vsplati16_simm5, MSA128H>;
1506 class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32,
1507 vsplati32_simm5, MSA128W>;
1508 class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64,
1509 vsplati64_simm5, MSA128D>;
1511 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8,
1512 vsplati8_uimm5, MSA128B>;
1513 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16,
1514 vsplati16_uimm5, MSA128H>;
1515 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32,
1516 vsplati32_uimm5, MSA128W>;
1517 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
1518 vsplati64_uimm5, MSA128D>;
1520 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1522 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1524 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1527 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1529 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1531 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1535 dag OutOperandList = (outs);
1536 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1537 string AsmString = "ctcmsa\t$cd, $rs";
1538 InstrItinClass Itinerary = NoItinerary;
1539 bit hasSideEffects = 1;
1542 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>;
1543 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>;
1544 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>;
1545 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>;
1547 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>;
1548 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>;
1549 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>;
1550 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>;
1552 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H,
1553 MSA128B, MSA128B>, IsCommutable;
1554 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W,
1555 MSA128H, MSA128H>, IsCommutable;
1556 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D,
1557 MSA128W, MSA128W>, IsCommutable;
1559 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H,
1560 MSA128B, MSA128B>, IsCommutable;
1561 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W,
1562 MSA128H, MSA128H>, IsCommutable;
1563 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D,
1564 MSA128W, MSA128W>, IsCommutable;
1566 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1567 MSA128H, MSA128B, MSA128B>,
1569 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1570 MSA128W, MSA128H, MSA128H>,
1572 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1573 MSA128D, MSA128W, MSA128W>,
1576 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1577 MSA128H, MSA128B, MSA128B>,
1579 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1580 MSA128W, MSA128H, MSA128H>,
1582 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1583 MSA128D, MSA128W, MSA128W>,
1586 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1587 MSA128H, MSA128B, MSA128B>;
1588 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1589 MSA128W, MSA128H, MSA128H>;
1590 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1591 MSA128D, MSA128W, MSA128W>;
1593 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1594 MSA128H, MSA128B, MSA128B>;
1595 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1596 MSA128W, MSA128H, MSA128H>;
1597 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1598 MSA128D, MSA128W, MSA128W>;
1600 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable;
1601 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable;
1603 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>,
1605 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>,
1608 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>,
1610 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>,
1613 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1615 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1618 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>;
1619 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>;
1621 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>;
1622 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>;
1624 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>,
1626 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>,
1629 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>,
1631 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>,
1634 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>,
1636 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>,
1639 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>,
1641 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>,
1644 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>,
1646 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>,
1649 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>,
1651 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>,
1654 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>,
1656 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>,
1659 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>;
1660 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>;
1662 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1663 MSA128H, MSA128W, MSA128W>;
1664 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1665 MSA128W, MSA128D, MSA128D>;
1667 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>;
1668 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>;
1670 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1672 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1675 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1677 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1680 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
1682 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
1685 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
1687 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
1690 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1692 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1695 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1697 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1700 class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, MSA128B,
1702 class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, MSA128H,
1704 class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, MSA128W,
1707 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>;
1708 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>;
1710 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
1712 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
1715 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>;
1716 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>;
1718 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1720 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1723 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>;
1724 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>;
1726 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1728 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1731 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
1733 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
1736 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>;
1737 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>;
1739 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>;
1740 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>;
1742 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>;
1743 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>;
1745 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1747 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1750 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>;
1751 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>;
1753 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>;
1754 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>;
1756 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>;
1757 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>;
1759 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>;
1760 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>;
1762 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>;
1763 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>;
1765 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>;
1766 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>;
1768 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>;
1769 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>;
1771 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>;
1772 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>;
1774 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>;
1775 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>;
1777 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>;
1778 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>;
1780 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>;
1781 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>;
1783 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>;
1784 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>;
1786 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>;
1787 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>;
1789 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w,
1791 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d,
1794 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w,
1796 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d,
1799 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1801 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1804 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1806 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1809 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1810 MSA128H, MSA128W, MSA128W>;
1811 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1812 MSA128W, MSA128D, MSA128D>;
1814 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H,
1816 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W,
1818 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D,
1821 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H,
1823 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W,
1825 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D,
1828 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H,
1830 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W,
1832 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D,
1835 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H,
1837 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W,
1839 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D,
1842 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128B>;
1843 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128H>;
1844 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128W>;
1845 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128D>;
1847 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128B>;
1848 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128H>;
1849 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128W>;
1850 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128D>;
1852 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128B>;
1853 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128H>;
1854 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128W>;
1855 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128D>;
1857 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128B>;
1858 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128H>;
1859 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128W>;
1860 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128D>;
1862 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B,
1864 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H,
1866 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W,
1869 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
1870 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
1871 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
1872 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
1874 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1875 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
1876 ComplexPattern Addr = addrRegImm,
1877 InstrItinClass itin = NoItinerary> {
1878 dag OutOperandList = (outs RCWD:$wd);
1879 dag InOperandList = (ins MemOpnd:$addr);
1880 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1881 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1882 InstrItinClass Itinerary = itin;
1885 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
1886 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
1887 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
1888 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
1890 class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>;
1891 class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>;
1892 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>;
1893 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>;
1895 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1896 ValueType TyNode, RegisterClass RCWD,
1897 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1898 InstrItinClass itin = NoItinerary> {
1899 dag OutOperandList = (outs RCWD:$wd);
1900 dag InOperandList = (ins MemOpnd:$addr);
1901 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1902 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1903 InstrItinClass Itinerary = itin;
1906 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
1907 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
1908 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
1909 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
1911 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
1913 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
1916 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
1918 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
1921 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>;
1922 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>;
1923 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>;
1924 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>;
1926 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>;
1927 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>;
1928 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>;
1929 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>;
1931 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128B>;
1932 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128H>;
1933 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128W>;
1934 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128D>;
1936 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128B>;
1937 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128H>;
1938 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128W>;
1939 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128D>;
1941 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5,
1943 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5,
1945 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5,
1947 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5,
1950 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5,
1952 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5,
1954 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5,
1956 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5,
1959 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>;
1960 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>;
1961 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>;
1962 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>;
1964 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128B>;
1965 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128H>;
1966 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128W>;
1967 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128D>;
1969 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128B>;
1970 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128H>;
1971 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128W>;
1972 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128D>;
1974 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5,
1976 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5,
1978 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5,
1980 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5,
1983 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5,
1985 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5,
1987 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5,
1989 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5,
1992 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>;
1993 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>;
1994 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>;
1995 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>;
1997 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>;
1998 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>;
1999 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>;
2000 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>;
2003 dag OutOperandList = (outs MSA128B:$wd);
2004 dag InOperandList = (ins MSA128B:$ws);
2005 string AsmString = "move.v\t$wd, $ws";
2006 list<dag> Pattern = [];
2007 InstrItinClass Itinerary = NoItinerary;
2010 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
2012 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
2015 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
2017 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
2020 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>;
2021 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>;
2022 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>;
2023 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>;
2025 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>;
2026 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>;
2028 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
2030 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
2033 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>;
2034 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>;
2035 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>;
2036 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>;
2038 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>;
2039 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>;
2040 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>;
2041 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>;
2043 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>;
2044 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>;
2045 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>;
2046 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>;
2048 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>;
2049 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>;
2050 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>;
2051 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>;
2053 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8,
2056 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>;
2057 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>;
2058 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>;
2059 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>;
2061 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128B>;
2063 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", int_mips_pckev_b, MSA128B>;
2064 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", int_mips_pckev_h, MSA128H>;
2065 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", int_mips_pckev_w, MSA128W>;
2066 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", int_mips_pckev_d, MSA128D>;
2068 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", int_mips_pckod_b, MSA128B>;
2069 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", int_mips_pckod_h, MSA128H>;
2070 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", int_mips_pckod_w, MSA128W>;
2071 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", int_mips_pckod_d, MSA128D>;
2073 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>;
2074 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>;
2075 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>;
2076 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>;
2078 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>;
2079 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>;
2080 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>;
2081 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>;
2083 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>;
2084 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>;
2085 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>;
2086 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>;
2088 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128B>;
2089 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128H>;
2090 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128W>;
2092 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>;
2093 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>;
2094 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>;
2095 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>;
2097 class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
2098 class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
2099 class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
2100 class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
2102 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>;
2103 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>;
2104 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>;
2105 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>;
2107 class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3,
2109 class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4,
2111 class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5,
2113 class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6,
2116 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B,
2118 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H,
2120 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W,
2122 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D,
2125 class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b,
2127 class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h,
2129 class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w,
2131 class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d,
2134 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>;
2135 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>;
2136 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>;
2137 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>;
2139 class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3,
2141 class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4,
2143 class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5,
2145 class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6,
2148 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>;
2149 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>;
2150 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>;
2151 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>;
2153 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>;
2154 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>;
2155 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>;
2156 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>;
2158 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>;
2159 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>;
2160 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>;
2161 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>;
2163 class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3,
2165 class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4,
2167 class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5,
2169 class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6,
2172 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>;
2173 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>;
2174 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>;
2175 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>;
2177 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>;
2178 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>;
2179 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>;
2180 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>;
2182 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2183 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2184 ComplexPattern Addr = addrRegImm,
2185 InstrItinClass itin = NoItinerary> {
2186 dag OutOperandList = (outs);
2187 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2188 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2189 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2190 InstrItinClass Itinerary = itin;
2193 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
2194 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
2195 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
2196 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
2198 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2199 ValueType TyNode, RegisterClass RCWD,
2200 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
2201 InstrItinClass itin = NoItinerary> {
2202 dag OutOperandList = (outs);
2203 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2204 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2205 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2206 InstrItinClass Itinerary = itin;
2209 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
2210 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
2211 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
2212 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
2214 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>;
2215 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>;
2216 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>;
2217 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>;
2219 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>;
2220 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>;
2221 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>;
2222 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>;
2224 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2226 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2228 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2230 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2233 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2235 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2237 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2239 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2242 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>;
2243 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>;
2244 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>;
2245 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>;
2247 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, MSA128B>;
2248 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, MSA128H>;
2249 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, MSA128W>;
2250 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, MSA128D>;
2252 class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128B>;
2253 class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128H>;
2254 class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128W>;
2255 class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128D>;
2257 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>;
2258 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>;
2259 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>;
2260 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>;
2262 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, MSA128B>;
2264 // Instruction defs.
2265 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2266 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2267 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2268 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2270 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2271 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2272 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2273 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2275 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2276 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2277 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2278 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2280 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2281 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2282 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2283 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2285 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2286 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2287 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2288 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2290 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2291 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2292 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2293 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2295 def AND_V : AND_V_ENC, AND_V_DESC;
2296 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2297 PseudoInstExpansion<(AND_V MSA128B:$wd,
2298 MSA128B:$ws, MSA128B:$wt)>;
2299 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2300 PseudoInstExpansion<(AND_V MSA128B:$wd,
2301 MSA128B:$ws, MSA128B:$wt)>;
2302 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2303 PseudoInstExpansion<(AND_V MSA128B:$wd,
2304 MSA128B:$ws, MSA128B:$wt)>;
2306 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2308 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2309 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2310 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2311 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2313 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2314 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2315 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2316 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2318 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2319 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2320 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2321 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2323 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2324 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2325 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2326 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2328 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2329 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2330 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2331 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2333 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2334 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2335 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2336 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2338 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2339 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2340 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2341 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2343 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2344 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2345 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2346 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2348 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2349 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2350 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2351 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2353 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2354 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2355 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2356 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2358 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2359 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2360 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2361 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2363 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2364 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2365 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2366 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2368 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2370 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2372 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2374 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2376 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2377 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2378 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2379 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2381 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2382 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2383 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2384 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2386 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2387 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2388 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2389 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2391 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2393 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2395 class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> :
2396 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt),
2397 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>,
2398 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws,
2400 let Constraints = "$wd_in = $wd";
2403 def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>;
2404 def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>;
2405 def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>;
2406 def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>;
2407 def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>;
2409 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2411 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2412 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2413 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2414 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2416 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2417 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2418 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2419 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2421 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2422 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2423 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2424 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2426 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2428 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2429 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2430 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2431 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2433 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2434 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2435 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2436 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2438 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2440 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2441 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2442 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2443 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2445 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2446 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2447 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2448 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2450 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2451 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2452 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2453 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2455 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2456 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2457 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2458 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2460 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2461 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2462 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2463 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2465 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2466 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2467 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2468 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2470 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2471 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2472 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2473 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2475 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2476 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2477 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2478 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2480 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2481 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2482 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2484 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2485 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2486 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2488 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2490 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2491 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2492 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2493 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2495 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2496 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2497 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2498 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2500 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2501 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2502 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2504 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2505 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2506 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2508 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2509 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2510 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2512 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2513 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2514 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2516 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2517 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2518 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2520 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2521 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2522 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2524 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2525 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2527 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2528 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2530 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2531 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2533 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2534 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2536 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2537 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2539 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2540 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2542 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2543 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2545 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2546 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2548 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2549 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2551 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2552 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2554 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2555 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2557 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2558 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2560 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2561 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2563 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2564 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2566 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2567 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2569 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2570 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2572 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2573 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2575 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2576 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2578 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2579 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2581 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2582 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2584 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2585 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2587 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2588 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2590 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2591 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2592 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2594 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2595 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2597 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2598 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2600 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2601 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2603 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2604 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2606 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2607 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2609 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2610 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2612 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2613 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2615 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2616 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2618 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2619 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2621 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2622 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2624 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2625 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2627 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2628 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2630 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2631 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2633 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2634 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2636 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2637 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2639 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2640 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2642 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2643 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2645 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2646 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2648 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2649 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2651 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2652 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2654 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2655 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2657 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2658 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2660 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2661 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2663 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2664 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2666 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2667 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2669 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2670 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2672 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2673 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2675 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2676 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2678 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2679 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2681 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2682 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2683 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2685 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2686 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2687 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2689 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2690 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2691 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2693 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2694 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2695 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2697 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2698 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2699 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2700 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2702 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2703 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2704 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2705 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2707 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2708 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2709 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2710 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2712 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2713 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2714 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2715 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2717 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2718 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2719 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2721 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2722 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2723 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2724 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2726 def LD_B: LD_B_ENC, LD_B_DESC;
2727 def LD_H: LD_H_ENC, LD_H_DESC;
2728 def LD_W: LD_W_ENC, LD_W_DESC;
2729 def LD_D: LD_D_ENC, LD_D_DESC;
2731 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2732 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2733 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2734 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2736 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2737 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2738 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2739 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2741 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2742 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2744 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2745 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2747 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2748 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2749 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2750 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2752 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2753 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2754 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2755 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2757 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2758 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2759 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2760 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2762 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2763 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2764 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2765 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2767 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2768 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2769 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2770 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2772 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2773 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2774 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2775 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2777 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2778 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2779 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2780 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2782 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2783 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2784 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2785 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2787 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2788 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2789 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2790 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2792 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2793 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2794 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2795 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2797 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2798 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2799 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2800 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2802 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2803 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2804 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2805 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2807 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2808 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2809 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2810 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2812 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2814 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2815 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2817 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2818 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2820 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2821 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2822 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2823 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2825 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2826 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2828 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2829 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2831 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2832 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2833 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2834 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2836 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2837 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2838 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2839 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2841 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2842 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2843 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2844 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
2846 def NOR_V : NOR_V_ENC, NOR_V_DESC;
2847 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
2848 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2849 MSA128B:$ws, MSA128B:$wt)>;
2850 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
2851 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2852 MSA128B:$ws, MSA128B:$wt)>;
2853 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
2854 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2855 MSA128B:$ws, MSA128B:$wt)>;
2857 def NORI_B : NORI_B_ENC, NORI_B_DESC;
2859 def OR_V : OR_V_ENC, OR_V_DESC;
2860 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
2861 PseudoInstExpansion<(OR_V MSA128B:$wd,
2862 MSA128B:$ws, MSA128B:$wt)>;
2863 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
2864 PseudoInstExpansion<(OR_V MSA128B:$wd,
2865 MSA128B:$ws, MSA128B:$wt)>;
2866 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
2867 PseudoInstExpansion<(OR_V MSA128B:$wd,
2868 MSA128B:$ws, MSA128B:$wt)>;
2870 def ORI_B : ORI_B_ENC, ORI_B_DESC;
2872 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
2873 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
2874 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
2875 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
2877 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
2878 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
2879 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
2880 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
2882 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
2883 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
2884 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
2885 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
2887 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
2888 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
2889 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
2890 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
2892 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
2893 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
2894 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
2895 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
2897 def SHF_B : SHF_B_ENC, SHF_B_DESC;
2898 def SHF_H : SHF_H_ENC, SHF_H_DESC;
2899 def SHF_W : SHF_W_ENC, SHF_W_DESC;
2901 def SLD_B : SLD_B_ENC, SLD_B_DESC;
2902 def SLD_H : SLD_H_ENC, SLD_H_DESC;
2903 def SLD_W : SLD_W_ENC, SLD_W_DESC;
2904 def SLD_D : SLD_D_ENC, SLD_D_DESC;
2906 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
2907 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
2908 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
2909 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
2911 def SLL_B : SLL_B_ENC, SLL_B_DESC;
2912 def SLL_H : SLL_H_ENC, SLL_H_DESC;
2913 def SLL_W : SLL_W_ENC, SLL_W_DESC;
2914 def SLL_D : SLL_D_ENC, SLL_D_DESC;
2916 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
2917 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
2918 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
2919 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
2921 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
2922 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
2923 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
2924 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
2926 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
2927 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
2928 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
2929 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
2931 def SRA_B : SRA_B_ENC, SRA_B_DESC;
2932 def SRA_H : SRA_H_ENC, SRA_H_DESC;
2933 def SRA_W : SRA_W_ENC, SRA_W_DESC;
2934 def SRA_D : SRA_D_ENC, SRA_D_DESC;
2936 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
2937 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
2938 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
2939 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
2941 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
2942 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
2943 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
2944 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
2946 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
2947 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
2948 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
2949 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
2951 def SRL_B : SRL_B_ENC, SRL_B_DESC;
2952 def SRL_H : SRL_H_ENC, SRL_H_DESC;
2953 def SRL_W : SRL_W_ENC, SRL_W_DESC;
2954 def SRL_D : SRL_D_ENC, SRL_D_DESC;
2956 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
2957 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
2958 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
2959 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
2961 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
2962 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
2963 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
2964 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
2966 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
2967 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
2968 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
2969 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
2971 def ST_B: ST_B_ENC, ST_B_DESC;
2972 def ST_H: ST_H_ENC, ST_H_DESC;
2973 def ST_W: ST_W_ENC, ST_W_DESC;
2974 def ST_D: ST_D_ENC, ST_D_DESC;
2976 def STX_B: STX_B_ENC, STX_B_DESC;
2977 def STX_H: STX_H_ENC, STX_H_DESC;
2978 def STX_W: STX_W_ENC, STX_W_DESC;
2979 def STX_D: STX_D_ENC, STX_D_DESC;
2981 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
2982 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
2983 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
2984 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
2986 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
2987 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
2988 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
2989 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
2991 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
2992 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
2993 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
2994 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
2996 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
2997 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
2998 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
2999 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
3001 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
3002 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
3003 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
3004 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
3006 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
3007 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
3008 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
3009 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
3011 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
3012 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
3013 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
3014 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
3016 def XOR_V : XOR_V_ENC, XOR_V_DESC;
3017 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
3018 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3019 MSA128B:$ws, MSA128B:$wt)>;
3020 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
3021 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3022 MSA128B:$ws, MSA128B:$wt)>;
3023 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
3024 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3025 MSA128B:$ws, MSA128B:$wt)>;
3027 def XORI_B : XORI_B_ENC, XORI_B_DESC;
3030 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
3031 Pat<pattern, result>, Requires<pred>;
3033 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
3034 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
3036 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
3037 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
3038 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
3039 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
3040 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
3041 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
3042 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
3044 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
3045 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
3046 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
3048 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
3049 (ST_B MSA128B:$ws, addr:$addr)>;
3050 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
3051 (ST_H MSA128H:$ws, addr:$addr)>;
3052 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
3053 (ST_W MSA128W:$ws, addr:$addr)>;
3054 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
3055 (ST_D MSA128D:$ws, addr:$addr)>;
3056 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
3057 (ST_H MSA128H:$ws, addr:$addr)>;
3058 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
3059 (ST_W MSA128W:$ws, addr:$addr)>;
3060 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
3061 (ST_D MSA128D:$ws, addr:$addr)>;
3063 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
3064 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
3065 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
3066 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
3067 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
3068 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
3070 class MSA_FABS_PSEUDO_DESC_BASE<RegisterClass RCWD, RegisterClass RCWS = RCWD,
3071 InstrItinClass itin = NoItinerary> :
3072 MipsPseudo<(outs RCWD:$wd),
3074 [(set RCWD:$wd, (fabs RCWS:$ws))]> {
3075 InstrItinClass Itinerary = itin;
3077 def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128W>,
3078 PseudoInstExpansion<(FMAX_A_W MSA128W:$wd, MSA128W:$ws,
3080 def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128D>,
3081 PseudoInstExpansion<(FMAX_A_D MSA128D:$wd, MSA128D:$ws,
3084 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3085 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
3086 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3087 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3089 // These are endian-independant because the element size doesnt change
3090 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
3091 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
3092 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3093 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
3094 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
3095 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
3097 // Little endian bitcasts are always no-ops
3098 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3099 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3100 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3101 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3102 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3103 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3105 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3106 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3107 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3108 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
3109 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
3111 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
3112 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
3113 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
3114 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
3115 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
3117 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
3118 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
3119 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
3120 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
3121 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
3123 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
3124 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
3125 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
3126 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
3127 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
3129 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
3130 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
3131 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
3132 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
3133 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
3135 // Big endian bitcasts expand to shuffle instructions.
3136 // This is because bitcast is defined to be a store/load sequence and the
3137 // vector store/load instructions are mixed-endian with respect to the vector
3138 // as a whole (little endian with respect to element order, but big endian
3141 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
3142 RegisterClass DstRC, MSAInst Insn,
3143 RegisterClass ViaRC> :
3144 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3145 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3149 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
3150 RegisterClass DstRC, MSAInst Insn,
3151 RegisterClass ViaRC> :
3152 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3153 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3157 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3158 RegisterClass DstRC> :
3159 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3161 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3162 RegisterClass DstRC> :
3163 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3165 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3166 RegisterClass DstRC> :
3167 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3171 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3176 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3177 RegisterClass DstRC> :
3178 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3180 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3181 RegisterClass DstRC> :
3182 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3184 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3185 RegisterClass DstRC> :
3186 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3188 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3189 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3190 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3191 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3192 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3193 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3195 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3196 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3197 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3198 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3199 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3201 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3202 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3203 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3204 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3205 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3207 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3208 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3209 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3210 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3211 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3213 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3214 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3215 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3216 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3217 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3219 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3220 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3221 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3222 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3223 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3225 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3226 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3227 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3228 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3229 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3231 // Pseudos used to implement BNZ.df, and BZ.df
3233 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3235 InstrItinClass itin = NoItinerary> :
3236 MipsPseudo<(outs GPR32:$dst),
3238 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3239 bit usesCustomInserter = 1;
3242 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3243 MSA128B, NoItinerary>;
3244 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3245 MSA128H, NoItinerary>;
3246 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3247 MSA128W, NoItinerary>;
3248 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3249 MSA128D, NoItinerary>;
3250 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3251 MSA128B, NoItinerary>;
3253 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3254 MSA128B, NoItinerary>;
3255 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3256 MSA128H, NoItinerary>;
3257 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3258 MSA128W, NoItinerary>;
3259 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3260 MSA128D, NoItinerary>;
3261 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3262 MSA128B, NoItinerary>;