1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 // Instruction encoding.
15 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
16 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
17 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
18 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
19 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
20 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
21 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
22 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
25 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
26 ValueType TyNode, InstrItinClass itin, RegisterClass RCWD,
27 Operand MemOpnd = mem, ComplexPattern Addr = addr> {
28 dag OutOperandList = (outs RCWD:$wd);
29 dag InOperandList = (ins MemOpnd:$addr);
30 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
31 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
32 InstrItinClass Itinerary = itin;
35 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
36 ValueType TyNode, InstrItinClass itin, RegisterClass RCWD,
37 Operand MemOpnd = mem, ComplexPattern Addr = addr> {
38 dag OutOperandList = (outs);
39 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
40 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
41 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
42 InstrItinClass Itinerary = itin;
46 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, NoItinerary, MSA128>;
47 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, NoItinerary, MSA128>;
48 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, NoItinerary, MSA128>;
49 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, NoItinerary, MSA128>;
50 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, NoItinerary, MSA128>;
51 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, NoItinerary, MSA128>;
52 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, NoItinerary, MSA128>;
53 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, NoItinerary, MSA128>;
56 def LD_B: LD_B_ENC, LD_B_DESC, Requires<[HasMSA]>;
57 def LD_H: LD_H_ENC, LD_H_DESC, Requires<[HasMSA]>;
58 def LD_W: LD_W_ENC, LD_W_DESC, Requires<[HasMSA]>;
59 def LD_D: LD_D_ENC, LD_D_DESC, Requires<[HasMSA]>;
61 def ST_B: ST_B_ENC, ST_B_DESC, Requires<[HasMSA]>;
62 def ST_H: ST_H_ENC, ST_H_DESC, Requires<[HasMSA]>;
63 def ST_W: ST_W_ENC, ST_W_DESC, Requires<[HasMSA]>;
64 def ST_D: ST_D_ENC, ST_D_DESC, Requires<[HasMSA]>;
67 class MSAPat<dag pattern, dag result, Predicate pred = HasMSA> :
68 Pat<pattern, result>, Requires<[pred]>;