1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
15 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
18 SDTCisVT<3, OtherVT>]>;
19 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
22 SDTCisVT<3, OtherVT>]>;
23 def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
24 SDTCisInt<1>, SDTCisVec<1>,
25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
26 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
28 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
31 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
32 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
33 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
34 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
35 def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp,
36 [SDNPCommutative, SDNPAssociative]>;
37 def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp,
38 [SDNPCommutative, SDNPAssociative]>;
39 def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp,
40 [SDNPCommutative, SDNPAssociative]>;
41 def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp,
42 [SDNPCommutative, SDNPAssociative]>;
43 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
44 [SDNPCommutative, SDNPAssociative]>;
45 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
46 def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>;
47 def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>;
48 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
49 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
50 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
51 def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>;
52 def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>;
54 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
55 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
57 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
59 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
64 def uimm3 : Operand<i32> {
65 let PrintMethod = "printUnsignedImm";
68 def uimm4 : Operand<i32> {
69 let PrintMethod = "printUnsignedImm";
72 def uimm8 : Operand<i32> {
73 let PrintMethod = "printUnsignedImm";
76 def simm5 : Operand<i32>;
78 def simm10 : Operand<i32>;
80 def vsplat_uimm3 : Operand<vAny> {
81 let PrintMethod = "printUnsignedImm";
84 def vsplat_uimm4 : Operand<vAny> {
85 let PrintMethod = "printUnsignedImm";
88 def vsplat_uimm5 : Operand<vAny> {
89 let PrintMethod = "printUnsignedImm";
92 def vsplat_uimm6 : Operand<vAny> {
93 let PrintMethod = "printUnsignedImm";
96 def vsplat_uimm8 : Operand<vAny> {
97 let PrintMethod = "printUnsignedImm";
100 def vsplat_simm5 : Operand<vAny>;
102 def vsplat_simm10 : Operand<vAny>;
105 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
106 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
107 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
108 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
109 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
110 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
112 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
113 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
114 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
115 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
116 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
117 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
119 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
120 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
121 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
122 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
123 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
124 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
126 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
127 PatFrag<(ops node:$lhs, node:$rhs),
128 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
130 // ISD::SETFALSE cannot occur
131 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
132 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
133 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
134 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
135 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
136 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
137 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
138 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
139 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
140 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
141 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
142 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
143 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
144 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
145 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
146 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
147 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
148 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
149 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
150 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
151 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
152 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
153 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
154 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
155 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
156 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
157 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
158 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
159 // ISD::SETTRUE cannot occur
160 // ISD::SETFALSE2 cannot occur
161 // ISD::SETTRUE2 cannot occur
163 class vsetcc_type<ValueType ResTy, CondCode CC> :
164 PatFrag<(ops node:$lhs, node:$rhs),
165 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
167 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
168 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
169 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
170 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
171 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
172 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
173 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
174 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
175 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
176 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
177 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
178 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
179 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
180 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
181 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
182 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
183 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
184 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
185 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
186 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
188 def vsplati8 : PatFrag<(ops node:$e0),
189 (v16i8 (build_vector node:$e0, node:$e0,
196 node:$e0, node:$e0))>;
197 def vsplati16 : PatFrag<(ops node:$e0),
198 (v8i16 (build_vector node:$e0, node:$e0,
201 node:$e0, node:$e0))>;
202 def vsplati32 : PatFrag<(ops node:$e0),
203 (v4i32 (build_vector node:$e0, node:$e0,
204 node:$e0, node:$e0))>;
205 def vsplati64 : PatFrag<(ops node:$e0),
206 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>;
208 class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}],
209 SDNodeXForm xform = NOOP_SDNodeXForm>
210 : PatLeaf<frag, pred, xform> {
211 Operand OpClass = opclass;
214 class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn,
215 list<SDNode> roots = [],
216 list<SDNodeProperty> props = []> :
217 ComplexPattern<ty, numops, fn, roots, props> {
218 Operand OpClass = opclass;
221 def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1,
223 [build_vector, bitconvert]>;
225 def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1,
227 [build_vector, bitconvert]>;
229 def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1,
231 [build_vector, bitconvert]>;
233 def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1,
235 [build_vector, bitconvert]>;
237 def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1,
239 [build_vector, bitconvert]>;
241 def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1,
243 [build_vector, bitconvert]>;
245 def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1,
247 [build_vector, bitconvert]>;
249 def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1,
251 [build_vector, bitconvert]>;
253 def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1,
255 [build_vector, bitconvert]>;
257 def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1,
259 [build_vector, bitconvert]>;
261 def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1,
263 [build_vector, bitconvert]>;
265 def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1,
267 [build_vector, bitconvert]>;
269 // Any build_vector that is a constant splat with a value that is an exact
271 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
272 [build_vector, bitconvert]>;
275 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
276 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
278 // Instruction encoding.
279 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
280 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
281 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
282 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
284 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
285 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
286 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
287 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
289 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
290 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
291 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
292 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
294 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
295 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
296 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
297 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
299 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
300 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
301 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
302 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
304 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
305 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
306 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
307 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
309 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
311 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
313 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
314 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
315 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
316 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
318 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
319 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
320 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
321 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
323 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
324 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
325 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
326 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
328 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
329 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
330 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
331 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
333 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
334 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
335 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
336 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
338 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
339 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
340 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
341 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
343 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
344 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
345 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
346 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
348 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
349 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
350 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
351 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
353 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
354 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
355 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
356 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
358 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
359 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
360 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
361 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
363 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
364 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
365 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
366 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
368 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
369 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
370 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
371 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
373 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
375 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
377 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
379 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
381 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
382 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
383 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
384 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
386 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
387 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
388 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
389 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
391 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
392 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
393 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
394 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
396 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
398 class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>;
400 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
402 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
403 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
404 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
405 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
407 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
408 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
409 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
410 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
412 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
413 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
414 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
415 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
417 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
419 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
420 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
421 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
422 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
424 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
425 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
426 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
427 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
429 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
431 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
432 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
433 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
434 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
436 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
437 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
438 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
439 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
441 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
442 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
443 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
444 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
446 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
447 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
448 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
449 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
451 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
452 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
453 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
454 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
456 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
457 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
458 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
459 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
461 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
462 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
463 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
464 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
466 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
467 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
468 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
469 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
471 class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
472 class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
473 class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
475 class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
476 class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
477 class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
479 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
481 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
482 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
483 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
484 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
486 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
487 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
488 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
489 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
491 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
492 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
493 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
495 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
496 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
497 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
499 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
500 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
501 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
503 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
504 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
505 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
507 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
508 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
509 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
511 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
512 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
513 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
515 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
516 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
518 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
519 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
521 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
522 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
524 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
525 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
527 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
528 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
530 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
531 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
533 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
534 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
536 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
537 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
539 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
540 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
542 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
543 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
545 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
546 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
548 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
549 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
551 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
552 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
554 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
555 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
557 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
558 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
560 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
561 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
563 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
564 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
566 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
567 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
569 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
570 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
572 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
573 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
575 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
576 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
578 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
579 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
581 class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>;
582 class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>;
583 class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>;
585 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
586 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
588 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
589 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
591 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
592 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
594 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
595 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
597 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
598 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
600 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
601 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
603 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
604 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
606 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
607 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
609 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
610 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
612 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
613 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
615 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
616 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
618 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
619 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
621 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
622 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
624 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
625 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
627 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
628 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
630 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
631 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
633 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
634 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
636 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
637 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
639 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
640 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
642 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
643 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
645 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
646 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
648 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
649 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
651 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
652 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
654 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
655 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
657 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>;
658 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>;
660 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>;
661 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>;
663 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
664 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
666 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
667 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
669 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
670 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
672 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
673 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
674 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
676 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
677 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
678 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
680 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
681 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
682 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
684 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
685 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
686 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
688 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
689 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
690 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
691 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
693 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
694 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
695 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
696 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
698 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
699 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
700 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
701 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
703 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
704 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
705 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
706 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
708 class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>;
709 class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>;
710 class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>;
712 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
713 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
714 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
715 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
717 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
718 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
719 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
720 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
722 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
723 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
724 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
725 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
727 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
728 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
729 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
730 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
732 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
733 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
735 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
736 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
738 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
739 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
740 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
741 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
743 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
744 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
745 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
746 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
748 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
749 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
750 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
751 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
753 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
754 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
755 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
756 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
758 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
759 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
760 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
761 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
763 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
764 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
765 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
766 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
768 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
769 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
770 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
771 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
773 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
774 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
775 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
776 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
778 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
779 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
780 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
781 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
783 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
784 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
785 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
786 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
788 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
789 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
790 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
791 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
793 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
794 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
795 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
796 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
798 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
799 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
800 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
801 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
803 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
805 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
806 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
808 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
809 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
811 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
812 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
813 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
814 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
816 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011100>;
817 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011100>;
819 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
820 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
822 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
823 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
824 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
825 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
827 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
828 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
829 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
830 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
832 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
833 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
834 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
835 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
837 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
839 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
841 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
843 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
845 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
846 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
847 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
848 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
850 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
851 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
852 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
853 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
855 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
856 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
857 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
858 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
860 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
861 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
862 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
863 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
865 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
866 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
867 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
868 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
870 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
871 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
872 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
874 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
875 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
876 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
877 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
879 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
880 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
881 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
882 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
884 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
885 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
886 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
887 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
889 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
890 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
891 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
892 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
894 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
895 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
896 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
897 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
899 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
900 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
901 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
902 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
904 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
905 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
906 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
907 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
909 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
910 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
911 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
912 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
914 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
915 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
916 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
917 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
919 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
920 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
921 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
922 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
924 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
925 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
926 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
927 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
929 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
930 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
931 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
932 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
934 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
935 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
936 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
937 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
939 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
940 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
941 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
942 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
944 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
945 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
946 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
947 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
949 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
950 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
951 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
952 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
954 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
955 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
956 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
957 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
959 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
960 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
961 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
962 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
964 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
965 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
966 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
967 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
969 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
970 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
971 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
972 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
974 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
975 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
976 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
977 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
979 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
980 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
981 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
982 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
984 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
985 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
986 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
987 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
989 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
991 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
994 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
995 RegisterClass RCWD, RegisterClass RCWS = RCWD,
996 InstrItinClass itin = NoItinerary> {
997 dag OutOperandList = (outs RCWD:$wd);
998 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
999 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
1000 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))];
1001 InstrItinClass Itinerary = itin;
1004 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1005 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1006 InstrItinClass itin = NoItinerary> {
1007 dag OutOperandList = (outs RCWD:$wd);
1008 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
1009 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
1010 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))];
1011 InstrItinClass Itinerary = itin;
1014 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1015 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1016 InstrItinClass itin = NoItinerary> {
1017 dag OutOperandList = (outs RCWD:$wd);
1018 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
1019 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
1020 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
1021 InstrItinClass Itinerary = itin;
1024 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1025 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1026 InstrItinClass itin = NoItinerary> {
1027 dag OutOperandList = (outs RCWD:$wd);
1028 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
1029 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
1030 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))];
1031 InstrItinClass Itinerary = itin;
1034 class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1035 SplatComplexPattern SplatImm, RegisterClass RCWD,
1036 RegisterClass RCWS = RCWD,
1037 InstrItinClass itin = NoItinerary> {
1038 dag OutOperandList = (outs RCWD:$wd);
1039 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u);
1040 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u");
1041 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))];
1042 InstrItinClass Itinerary = itin;
1045 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1046 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS,
1047 InstrItinClass itin = NoItinerary> {
1048 dag OutOperandList = (outs RCD:$rd);
1049 dag InOperandList = (ins RCWS:$ws, uimm4:$n);
1050 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
1051 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))];
1052 InstrItinClass Itinerary = itin;
1055 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1056 SplatComplexPattern SplatImm, RegisterClass RCWD,
1057 RegisterClass RCWS = RCWD,
1058 InstrItinClass itin = NoItinerary> {
1059 dag OutOperandList = (outs RCWD:$wd);
1060 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$imm);
1061 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm");
1062 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$imm))];
1063 InstrItinClass Itinerary = itin;
1066 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1067 SplatComplexPattern SplatImm, RegisterClass RCWD,
1068 RegisterClass RCWS = RCWD,
1069 InstrItinClass itin = NoItinerary> {
1070 dag OutOperandList = (outs RCWD:$wd);
1071 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u8);
1072 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1073 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u8))];
1074 InstrItinClass Itinerary = itin;
1077 // This class is deprecated and will be removed in the next few patches
1078 class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1079 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1080 InstrItinClass itin = NoItinerary> {
1081 dag OutOperandList = (outs RCWD:$wd);
1082 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
1083 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1084 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))];
1085 InstrItinClass Itinerary = itin;
1088 class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterClass RCWD,
1089 RegisterClass RCWS = RCWD,
1090 InstrItinClass itin = NoItinerary> {
1091 dag OutOperandList = (outs RCWD:$wd);
1092 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
1093 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1094 list<dag> Pattern = [(set RCWD:$wd, (MipsSHF immZExt8:$u8, RCWS:$ws))];
1095 InstrItinClass Itinerary = itin;
1098 class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD,
1099 InstrItinClass itin = NoItinerary> {
1100 dag OutOperandList = (outs RCWD:$wd);
1101 dag InOperandList = (ins vsplat_simm10:$i10);
1102 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
1103 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp
1104 list<dag> Pattern = [];
1105 bit hasSideEffects = 0;
1106 InstrItinClass Itinerary = itin;
1109 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1110 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1111 InstrItinClass itin = NoItinerary> {
1112 dag OutOperandList = (outs RCWD:$wd);
1113 dag InOperandList = (ins RCWS:$ws);
1114 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1115 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))];
1116 InstrItinClass Itinerary = itin;
1119 class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT,
1120 SDPatternOperator OpNode, RegisterClass RCWD,
1121 RegisterClass RCWS = RCWD,
1122 InstrItinClass itin = NoItinerary> {
1123 dag OutOperandList = (outs RCWD:$wd);
1124 dag InOperandList = (ins RCWS:$ws);
1125 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1126 list<dag> Pattern = [(set RCWD:$wd, (VT (OpNode RCWS:$ws)))];
1127 InstrItinClass Itinerary = itin;
1130 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1131 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1132 InstrItinClass itin = NoItinerary> :
1133 MSA_2R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, itin>;
1135 class MSA_2RF_RO_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1136 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1137 InstrItinClass itin = NoItinerary> {
1138 dag OutOperandList = (outs ROWD:$wd);
1139 dag InOperandList = (ins ROWS:$ws);
1140 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1141 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1142 InstrItinClass Itinerary = itin;
1145 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1146 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1147 RegisterClass RCWT = RCWD,
1148 InstrItinClass itin = NoItinerary> {
1149 dag OutOperandList = (outs RCWD:$wd);
1150 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
1151 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1152 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
1153 InstrItinClass Itinerary = itin;
1156 class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterClass RCWD,
1157 RegisterClass RCWS = RCWD,
1158 RegisterClass RCWT = RCWD,
1159 InstrItinClass itin = NoItinerary> {
1160 dag OutOperandList = (outs RCWD:$wd);
1161 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
1162 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1163 list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF RCWD:$wd_in, RCWS:$ws,
1165 string Constraints = "$wd = $wd_in";
1166 InstrItinClass Itinerary = itin;
1169 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1170 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1171 RegisterClass RCWT = RCWD,
1172 InstrItinClass itin = NoItinerary> {
1173 dag OutOperandList = (outs RCWD:$wd);
1174 dag InOperandList = (ins RCWD:$wd_in, RCWS:$ws, RCWT:$wt);
1175 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1176 list<dag> Pattern = [(set RCWD:$wd,
1177 (OpNode RCWD:$wd_in, RCWS:$ws, RCWT:$wt))];
1178 InstrItinClass Itinerary = itin;
1179 string Constraints = "$wd = $wd_in";
1182 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1183 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1184 RegisterClass RCWT = RCWD,
1185 InstrItinClass itin = NoItinerary> :
1186 MSA_3R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
1188 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1189 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1190 RegisterClass RCWT = RCWD,
1191 InstrItinClass itin = NoItinerary> :
1192 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, RCWD, RCWS, RCWT, itin>;
1194 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
1195 dag OutOperandList = (outs);
1196 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
1197 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
1198 list<dag> Pattern = [];
1199 InstrItinClass Itinerary = IIBranch;
1201 bit isTerminator = 1;
1202 bit hasDelaySlot = 1;
1203 list<Register> Defs = [AT];
1206 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1207 RegisterClass RCD, RegisterClass RCWS,
1208 InstrItinClass itin = NoItinerary> {
1209 dag OutOperandList = (outs RCD:$wd);
1210 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n);
1211 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1212 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in,
1215 InstrItinClass Itinerary = itin;
1216 string Constraints = "$wd = $wd_in";
1219 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1220 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1221 InstrItinClass itin = NoItinerary> {
1222 dag OutOperandList = (outs RCWD:$wd);
1223 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
1224 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1225 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
1228 InstrItinClass Itinerary = itin;
1229 string Constraints = "$wd = $wd_in";
1232 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1233 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1234 RegisterClass RCWT = RCWD,
1235 InstrItinClass itin = NoItinerary> {
1236 dag OutOperandList = (outs RCWD:$wd);
1237 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
1238 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1239 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
1240 InstrItinClass Itinerary = itin;
1243 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD,
1244 RegisterClass RCWS = RCWD,
1245 RegisterClass RCWT = RCWD> :
1246 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt),
1247 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>;
1249 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128B>,
1251 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128H>,
1253 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128W>,
1255 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128D>,
1258 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b, MSA128B>,
1260 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h, MSA128H>,
1262 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w, MSA128W>,
1264 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d, MSA128D>,
1267 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b, MSA128B>,
1269 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h, MSA128H>,
1271 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w, MSA128W>,
1273 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d, MSA128D>,
1276 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b, MSA128B>,
1278 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h, MSA128H>,
1280 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w, MSA128W>,
1282 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d, MSA128D>,
1285 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128B>, IsCommutable;
1286 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128H>, IsCommutable;
1287 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128W>, IsCommutable;
1288 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128D>, IsCommutable;
1290 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, MSA128B>;
1291 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, MSA128H>;
1292 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, MSA128W>;
1293 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, MSA128D>;
1295 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>;
1296 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>;
1297 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>;
1298 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>;
1300 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, MSA128B>;
1302 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b, MSA128B>;
1303 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h, MSA128H>;
1304 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w, MSA128W>;
1305 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d, MSA128D>;
1307 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b, MSA128B>;
1308 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h, MSA128H>;
1309 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w, MSA128W>;
1310 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d, MSA128D>;
1312 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128B>,
1314 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128H>,
1316 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128W>,
1318 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128D>,
1321 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128B>,
1323 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128H>,
1325 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128W>,
1327 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128D>,
1330 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b, MSA128B>,
1332 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h, MSA128H>,
1334 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w, MSA128W>,
1336 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d, MSA128D>,
1339 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b, MSA128B>,
1341 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h, MSA128H>,
1343 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w, MSA128W>,
1345 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d, MSA128D>,
1348 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128B>;
1349 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128H>;
1350 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128W>;
1351 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128D>;
1353 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>;
1354 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>;
1355 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>;
1356 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>;
1358 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128B>;
1359 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128H>;
1360 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128W>;
1361 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128D>;
1363 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1365 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1367 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1369 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1372 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128B>;
1373 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128H>;
1374 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128W>;
1375 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128D>;
1377 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1379 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1381 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1383 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1386 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>;
1388 class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>;
1390 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>;
1392 class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>;
1394 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128B>;
1395 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128H>;
1396 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128W>;
1397 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128D>;
1399 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>;
1400 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>;
1401 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>;
1402 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>;
1404 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1405 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1406 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1407 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1409 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1412 dag OutOperandList = (outs MSA128B:$wd);
1413 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt);
1414 string AsmString = "bsel.v\t$wd, $ws, $wt";
1415 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws,
1417 InstrItinClass Itinerary = NoItinerary;
1418 string Constraints = "$wd = $wd_in";
1421 class BSELI_B_DESC {
1422 dag OutOperandList = (outs MSA128B:$wd);
1423 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, vsplat_uimm8:$u8);
1424 string AsmString = "bseli.b\t$wd, $ws, $u8";
1425 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in,
1427 vsplati8_uimm8:$u8))];
1428 InstrItinClass Itinerary = NoItinerary;
1429 string Constraints = "$wd = $wd_in";
1432 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128B>;
1433 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128H>;
1434 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128W>;
1435 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128D>;
1437 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>;
1438 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>;
1439 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>;
1440 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>;
1442 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1443 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1444 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1445 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1447 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1449 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128B>,
1451 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128H>,
1453 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128W>,
1455 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128D>,
1458 class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5,
1460 class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5,
1462 class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5,
1464 class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5,
1468 dag OutOperandList = (outs GPR32:$rd);
1469 dag InOperandList = (ins MSACtrl:$cs);
1470 string AsmString = "cfcmsa\t$rd, $cs";
1471 InstrItinClass Itinerary = NoItinerary;
1472 bit hasSideEffects = 1;
1475 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128B>;
1476 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128H>;
1477 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128W>;
1478 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128D>;
1480 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128B>;
1481 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128H>;
1482 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128W>;
1483 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128D>;
1485 class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8,
1486 vsplati8_simm5, MSA128B>;
1487 class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16,
1488 vsplati16_simm5, MSA128H>;
1489 class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32,
1490 vsplati32_simm5, MSA128W>;
1491 class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64,
1492 vsplati64_simm5, MSA128D>;
1494 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8,
1495 vsplati8_uimm5, MSA128B>;
1496 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16,
1497 vsplati16_uimm5, MSA128H>;
1498 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32,
1499 vsplati32_uimm5, MSA128W>;
1500 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64,
1501 vsplati64_uimm5, MSA128D>;
1503 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128B>;
1504 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128H>;
1505 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128W>;
1506 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128D>;
1508 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128B>;
1509 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128H>;
1510 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128W>;
1511 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128D>;
1513 class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8,
1514 vsplati8_simm5, MSA128B>;
1515 class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16,
1516 vsplati16_simm5, MSA128H>;
1517 class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32,
1518 vsplati32_simm5, MSA128W>;
1519 class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64,
1520 vsplati64_simm5, MSA128D>;
1522 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8,
1523 vsplati8_uimm5, MSA128B>;
1524 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16,
1525 vsplati16_uimm5, MSA128H>;
1526 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32,
1527 vsplati32_uimm5, MSA128W>;
1528 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
1529 vsplati64_uimm5, MSA128D>;
1531 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1533 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1535 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1538 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1540 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1542 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1546 dag OutOperandList = (outs);
1547 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1548 string AsmString = "ctcmsa\t$cd, $rs";
1549 InstrItinClass Itinerary = NoItinerary;
1550 bit hasSideEffects = 1;
1553 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128B>;
1554 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128H>;
1555 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128W>;
1556 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128D>;
1558 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128B>;
1559 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128H>;
1560 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128W>;
1561 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128D>;
1563 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h, MSA128H,
1564 MSA128B, MSA128B>, IsCommutable;
1565 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w, MSA128W,
1566 MSA128H, MSA128H>, IsCommutable;
1567 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d, MSA128D,
1568 MSA128W, MSA128W>, IsCommutable;
1570 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h, MSA128H,
1571 MSA128B, MSA128B>, IsCommutable;
1572 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w, MSA128W,
1573 MSA128H, MSA128H>, IsCommutable;
1574 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d, MSA128D,
1575 MSA128W, MSA128W>, IsCommutable;
1577 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1578 MSA128H, MSA128B, MSA128B>,
1580 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1581 MSA128W, MSA128H, MSA128H>,
1583 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1584 MSA128D, MSA128W, MSA128W>,
1587 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1588 MSA128H, MSA128B, MSA128B>,
1590 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1591 MSA128W, MSA128H, MSA128H>,
1593 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1594 MSA128D, MSA128W, MSA128W>,
1597 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1598 MSA128H, MSA128B, MSA128B>;
1599 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1600 MSA128W, MSA128H, MSA128H>;
1601 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1602 MSA128D, MSA128W, MSA128W>;
1604 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1605 MSA128H, MSA128B, MSA128B>;
1606 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1607 MSA128W, MSA128H, MSA128H>;
1608 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1609 MSA128D, MSA128W, MSA128W>;
1611 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128W>, IsCommutable;
1612 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128D>, IsCommutable;
1614 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128W>,
1616 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128D>,
1619 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128W>,
1621 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128D>,
1624 class FCLASS_W_DESC : MSA_2RF_RO_DESC_BASE<"fclass.w", int_mips_fclass_w,
1626 class FCLASS_D_DESC : MSA_2RF_RO_DESC_BASE<"fclass.d", int_mips_fclass_d,
1629 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128W>;
1630 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128D>;
1632 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128W>;
1633 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128D>;
1635 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128W>,
1637 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128D>,
1640 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128W>,
1642 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128D>,
1645 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128W>,
1647 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128D>,
1650 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128W>,
1652 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128D>,
1655 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128W>,
1657 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128D>,
1660 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128W>,
1662 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128D>,
1665 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128W>,
1667 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128D>,
1670 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128W>;
1671 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128D>;
1673 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1674 MSA128H, MSA128W, MSA128W>;
1675 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1676 MSA128W, MSA128D, MSA128D>;
1678 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w, MSA128W>;
1679 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d, MSA128D>;
1681 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1683 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1686 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1688 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1691 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
1693 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
1696 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
1698 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
1701 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1703 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1706 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1708 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1711 class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, MSA128B,
1713 class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, MSA128H,
1715 class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, MSA128W,
1718 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128W>;
1719 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128D>;
1721 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
1723 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
1726 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128W>;
1727 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128D>;
1729 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1731 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1734 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128W>;
1735 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128D>;
1737 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1739 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1742 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
1744 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
1747 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128W>;
1748 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128D>;
1750 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128W>;
1751 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128D>;
1753 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128W>;
1754 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128D>;
1756 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1758 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1761 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128W>;
1762 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128D>;
1764 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128W>;
1765 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128D>;
1767 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128W>;
1768 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128D>;
1770 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128W>;
1771 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128D>;
1773 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128W>;
1774 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128D>;
1776 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128W>;
1777 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128D>;
1779 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128W>;
1780 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128D>;
1782 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128W>;
1783 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128D>;
1785 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w, MSA128W>;
1786 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d, MSA128D>;
1788 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w, MSA128W>;
1789 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d, MSA128D>;
1791 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w, MSA128W>;
1792 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d, MSA128D>;
1794 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w, MSA128W>;
1795 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d, MSA128D>;
1797 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w, MSA128W>;
1798 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d, MSA128D>;
1800 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w,
1802 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d,
1805 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w,
1807 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d,
1810 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1812 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1815 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1817 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1820 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1821 MSA128H, MSA128W, MSA128W>;
1822 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1823 MSA128W, MSA128D, MSA128D>;
1825 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h, MSA128H,
1827 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w, MSA128W,
1829 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d, MSA128D,
1832 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h, MSA128H,
1834 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w, MSA128W,
1836 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d, MSA128D,
1839 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h, MSA128H,
1841 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w, MSA128W,
1843 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d, MSA128D,
1846 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h, MSA128H,
1848 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w, MSA128W,
1850 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d, MSA128D,
1853 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128B>;
1854 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128H>;
1855 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128W>;
1856 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128D>;
1858 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128B>;
1859 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128H>;
1860 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128W>;
1861 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128D>;
1863 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128B>;
1864 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128H>;
1865 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128W>;
1866 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128D>;
1868 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128B>;
1869 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128H>;
1870 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128W>;
1871 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128D>;
1873 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B,
1875 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H,
1877 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W,
1880 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
1881 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
1882 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
1883 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
1885 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1886 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
1887 ComplexPattern Addr = addrRegImm,
1888 InstrItinClass itin = NoItinerary> {
1889 dag OutOperandList = (outs RCWD:$wd);
1890 dag InOperandList = (ins MemOpnd:$addr);
1891 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1892 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1893 InstrItinClass Itinerary = itin;
1896 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
1897 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
1898 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
1899 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
1901 class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>;
1902 class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>;
1903 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>;
1904 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>;
1906 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1907 ValueType TyNode, RegisterClass RCWD,
1908 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1909 InstrItinClass itin = NoItinerary> {
1910 dag OutOperandList = (outs RCWD:$wd);
1911 dag InOperandList = (ins MemOpnd:$addr);
1912 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1913 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1914 InstrItinClass Itinerary = itin;
1917 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
1918 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
1919 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
1920 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
1922 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
1924 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
1927 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
1929 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
1932 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b, MSA128B>;
1933 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h, MSA128H>;
1934 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w, MSA128W>;
1935 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d, MSA128D>;
1937 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128B>;
1938 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128H>;
1939 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128W>;
1940 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128D>;
1942 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128B>;
1943 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128H>;
1944 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128W>;
1945 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128D>;
1947 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128B>;
1948 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128H>;
1949 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128W>;
1950 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128D>;
1952 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5,
1954 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5,
1956 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5,
1958 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5,
1961 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5,
1963 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5,
1965 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5,
1967 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5,
1970 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128B>;
1971 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128H>;
1972 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128W>;
1973 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128D>;
1975 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128B>;
1976 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128H>;
1977 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128W>;
1978 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128D>;
1980 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128B>;
1981 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128H>;
1982 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128W>;
1983 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128D>;
1985 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5,
1987 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5,
1989 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5,
1991 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5,
1994 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5,
1996 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5,
1998 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5,
2000 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5,
2003 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128B>;
2004 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128H>;
2005 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128W>;
2006 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128D>;
2008 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128B>;
2009 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128H>;
2010 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128W>;
2011 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128D>;
2014 dag OutOperandList = (outs MSA128B:$wd);
2015 dag InOperandList = (ins MSA128B:$ws);
2016 string AsmString = "move.v\t$wd, $ws";
2017 list<dag> Pattern = [];
2018 InstrItinClass Itinerary = NoItinerary;
2021 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
2023 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
2026 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
2028 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
2031 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b, MSA128B>;
2032 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h, MSA128H>;
2033 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w, MSA128W>;
2034 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d, MSA128D>;
2036 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h, MSA128H>;
2037 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w, MSA128W>;
2039 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
2041 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
2044 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128B>;
2045 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128H>;
2046 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128W>;
2047 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128D>;
2049 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>;
2050 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>;
2051 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>;
2052 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>;
2054 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>;
2055 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>;
2056 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>;
2057 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>;
2059 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>;
2060 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>;
2061 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>;
2062 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>;
2064 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8,
2067 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>;
2068 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>;
2069 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>;
2070 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>;
2072 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128B>;
2074 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128B>;
2075 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128H>;
2076 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128W>;
2077 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128D>;
2079 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128B>;
2080 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128H>;
2081 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128W>;
2082 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128D>;
2084 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>;
2085 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>;
2086 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>;
2087 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>;
2089 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>;
2090 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>;
2091 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>;
2092 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>;
2094 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>;
2095 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>;
2096 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>;
2097 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>;
2099 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128B>;
2100 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128H>;
2101 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128W>;
2103 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128B>;
2104 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128H>;
2105 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128W>;
2106 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128D>;
2108 class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
2109 class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
2110 class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
2111 class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
2113 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128B>;
2114 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128H>;
2115 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128W>;
2116 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128D>;
2118 class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3,
2120 class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4,
2122 class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5,
2124 class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6,
2127 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128B,
2129 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128H,
2131 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128W,
2133 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128D,
2136 class SPLATI_B_DESC : MSA_BIT_B_DESC_BASE<"splati.b", int_mips_splati_b,
2138 class SPLATI_H_DESC : MSA_BIT_H_DESC_BASE<"splati.h", int_mips_splati_h,
2140 class SPLATI_W_DESC : MSA_BIT_W_DESC_BASE<"splati.w", int_mips_splati_w,
2142 class SPLATI_D_DESC : MSA_BIT_D_DESC_BASE<"splati.d", int_mips_splati_d,
2145 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128B>;
2146 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128H>;
2147 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128W>;
2148 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128D>;
2150 class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3,
2152 class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4,
2154 class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5,
2156 class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6,
2159 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128B>;
2160 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128H>;
2161 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128W>;
2162 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128D>;
2164 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>;
2165 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>;
2166 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>;
2167 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>;
2169 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128B>;
2170 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128H>;
2171 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128W>;
2172 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128D>;
2174 class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3,
2176 class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4,
2178 class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5,
2180 class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6,
2183 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128B>;
2184 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128H>;
2185 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128W>;
2186 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128D>;
2188 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>;
2189 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>;
2190 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>;
2191 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>;
2193 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2194 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2195 ComplexPattern Addr = addrRegImm,
2196 InstrItinClass itin = NoItinerary> {
2197 dag OutOperandList = (outs);
2198 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2199 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2200 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2201 InstrItinClass Itinerary = itin;
2204 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
2205 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
2206 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
2207 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
2209 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2210 ValueType TyNode, RegisterClass RCWD,
2211 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
2212 InstrItinClass itin = NoItinerary> {
2213 dag OutOperandList = (outs);
2214 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2215 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2216 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2217 InstrItinClass Itinerary = itin;
2220 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
2221 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
2222 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
2223 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
2225 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b, MSA128B>;
2226 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h, MSA128H>;
2227 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w, MSA128W>;
2228 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d, MSA128D>;
2230 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b, MSA128B>;
2231 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h, MSA128H>;
2232 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w, MSA128W>;
2233 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d, MSA128D>;
2235 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2237 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2239 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2241 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2244 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2246 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2248 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2250 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2253 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128B>;
2254 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128H>;
2255 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128W>;
2256 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128D>;
2258 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, MSA128B>;
2259 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, MSA128H>;
2260 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, MSA128W>;
2261 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, MSA128D>;
2263 class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128B>;
2264 class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128H>;
2265 class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128W>;
2266 class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128D>;
2268 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>;
2269 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>;
2270 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>;
2271 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>;
2273 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, MSA128B>;
2275 // Instruction defs.
2276 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2277 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2278 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2279 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2281 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2282 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2283 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2284 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2286 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2287 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2288 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2289 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2291 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2292 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2293 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2294 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2296 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2297 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2298 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2299 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2301 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2302 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2303 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2304 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2306 def AND_V : AND_V_ENC, AND_V_DESC;
2307 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2308 PseudoInstExpansion<(AND_V MSA128B:$wd,
2309 MSA128B:$ws, MSA128B:$wt)>;
2310 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2311 PseudoInstExpansion<(AND_V MSA128B:$wd,
2312 MSA128B:$ws, MSA128B:$wt)>;
2313 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2314 PseudoInstExpansion<(AND_V MSA128B:$wd,
2315 MSA128B:$ws, MSA128B:$wt)>;
2317 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2319 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2320 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2321 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2322 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2324 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2325 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2326 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2327 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2329 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2330 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2331 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2332 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2334 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2335 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2336 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2337 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2339 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2340 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2341 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2342 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2344 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2345 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2346 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2347 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2349 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2350 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2351 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2352 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2354 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2355 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2356 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2357 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2359 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2360 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2361 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2362 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2364 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2365 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2366 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2367 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2369 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2370 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2371 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2372 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2374 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2375 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2376 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2377 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2379 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2381 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2383 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2385 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2387 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2388 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2389 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2390 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2392 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2393 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2394 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2395 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2397 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2398 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2399 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2400 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2402 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2404 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2406 class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> :
2407 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt),
2408 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>,
2409 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws,
2411 let Constraints = "$wd_in = $wd";
2414 def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>;
2415 def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>;
2416 def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>;
2417 def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>;
2418 def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>;
2420 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2422 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2423 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2424 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2425 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2427 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2428 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2429 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2430 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2432 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2433 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2434 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2435 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2437 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2439 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2440 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2441 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2442 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2444 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2445 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2446 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2447 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2449 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2451 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2452 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2453 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2454 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2456 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2457 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2458 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2459 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2461 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2462 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2463 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2464 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2466 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2467 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2468 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2469 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2471 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2472 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2473 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2474 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2476 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2477 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2478 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2479 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2481 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2482 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2483 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2484 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2486 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2487 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2488 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2489 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2491 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2492 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2493 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2495 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2496 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2497 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2499 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2501 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2502 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2503 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2504 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2506 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2507 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2508 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2509 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2511 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2512 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2513 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2515 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2516 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2517 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2519 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2520 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2521 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2523 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2524 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2525 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2527 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2528 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2529 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2531 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2532 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2533 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2535 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2536 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2538 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2539 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2541 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2542 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2544 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2545 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2547 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2548 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2550 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2551 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2553 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2554 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2556 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2557 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2559 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2560 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2562 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2563 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2565 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2566 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2568 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2569 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2571 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2572 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2574 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2575 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2577 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2578 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2580 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2581 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2583 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2584 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2586 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2587 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2589 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2590 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2592 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2593 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2595 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2596 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2598 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2599 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2601 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2602 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2603 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2605 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2606 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2608 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2609 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2611 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2612 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2614 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2615 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2617 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2618 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2620 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2621 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2623 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2624 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2626 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2627 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2629 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2630 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2632 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2633 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2635 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2636 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2638 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2639 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2641 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2642 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2644 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2645 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2647 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2648 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2650 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2651 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2653 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2654 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2656 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2657 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2659 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2660 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2662 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2663 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2665 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2666 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2668 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2669 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2671 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2672 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2674 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2675 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2677 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2678 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2680 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2681 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2683 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2684 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2686 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2687 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2689 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2690 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2692 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2693 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2694 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2696 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2697 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2698 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2700 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2701 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2702 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2704 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2705 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2706 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2708 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2709 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2710 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2711 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2713 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2714 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2715 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2716 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2718 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2719 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2720 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2721 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2723 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2724 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2725 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2726 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2728 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2729 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2730 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2732 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2733 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2734 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2735 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2737 def LD_B: LD_B_ENC, LD_B_DESC;
2738 def LD_H: LD_H_ENC, LD_H_DESC;
2739 def LD_W: LD_W_ENC, LD_W_DESC;
2740 def LD_D: LD_D_ENC, LD_D_DESC;
2742 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2743 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2744 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2745 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2747 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2748 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2749 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2750 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2752 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2753 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2755 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2756 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2758 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2759 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2760 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2761 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2763 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2764 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2765 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2766 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2768 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2769 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2770 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2771 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2773 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2774 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2775 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2776 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2778 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2779 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2780 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2781 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2783 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2784 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2785 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2786 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2788 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2789 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2790 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2791 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2793 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2794 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2795 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2796 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2798 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2799 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2800 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2801 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2803 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2804 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2805 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2806 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2808 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2809 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2810 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2811 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2813 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2814 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2815 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2816 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2818 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2819 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2820 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2821 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2823 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2825 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2826 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2828 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2829 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2831 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2832 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2833 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2834 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2836 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2837 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2839 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2840 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2842 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2843 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2844 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2845 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2847 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2848 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2849 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2850 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2852 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2853 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2854 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2855 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
2857 def NOR_V : NOR_V_ENC, NOR_V_DESC;
2858 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
2859 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2860 MSA128B:$ws, MSA128B:$wt)>;
2861 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
2862 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2863 MSA128B:$ws, MSA128B:$wt)>;
2864 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
2865 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2866 MSA128B:$ws, MSA128B:$wt)>;
2868 def NORI_B : NORI_B_ENC, NORI_B_DESC;
2870 def OR_V : OR_V_ENC, OR_V_DESC;
2871 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
2872 PseudoInstExpansion<(OR_V MSA128B:$wd,
2873 MSA128B:$ws, MSA128B:$wt)>;
2874 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
2875 PseudoInstExpansion<(OR_V MSA128B:$wd,
2876 MSA128B:$ws, MSA128B:$wt)>;
2877 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
2878 PseudoInstExpansion<(OR_V MSA128B:$wd,
2879 MSA128B:$ws, MSA128B:$wt)>;
2881 def ORI_B : ORI_B_ENC, ORI_B_DESC;
2883 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
2884 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
2885 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
2886 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
2888 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
2889 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
2890 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
2891 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
2893 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
2894 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
2895 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
2896 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
2898 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
2899 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
2900 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
2901 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
2903 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
2904 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
2905 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
2906 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
2908 def SHF_B : SHF_B_ENC, SHF_B_DESC;
2909 def SHF_H : SHF_H_ENC, SHF_H_DESC;
2910 def SHF_W : SHF_W_ENC, SHF_W_DESC;
2912 def SLD_B : SLD_B_ENC, SLD_B_DESC;
2913 def SLD_H : SLD_H_ENC, SLD_H_DESC;
2914 def SLD_W : SLD_W_ENC, SLD_W_DESC;
2915 def SLD_D : SLD_D_ENC, SLD_D_DESC;
2917 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
2918 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
2919 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
2920 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
2922 def SLL_B : SLL_B_ENC, SLL_B_DESC;
2923 def SLL_H : SLL_H_ENC, SLL_H_DESC;
2924 def SLL_W : SLL_W_ENC, SLL_W_DESC;
2925 def SLL_D : SLL_D_ENC, SLL_D_DESC;
2927 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
2928 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
2929 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
2930 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
2932 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
2933 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
2934 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
2935 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
2937 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
2938 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
2939 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
2940 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
2942 def SRA_B : SRA_B_ENC, SRA_B_DESC;
2943 def SRA_H : SRA_H_ENC, SRA_H_DESC;
2944 def SRA_W : SRA_W_ENC, SRA_W_DESC;
2945 def SRA_D : SRA_D_ENC, SRA_D_DESC;
2947 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
2948 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
2949 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
2950 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
2952 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
2953 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
2954 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
2955 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
2957 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
2958 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
2959 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
2960 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
2962 def SRL_B : SRL_B_ENC, SRL_B_DESC;
2963 def SRL_H : SRL_H_ENC, SRL_H_DESC;
2964 def SRL_W : SRL_W_ENC, SRL_W_DESC;
2965 def SRL_D : SRL_D_ENC, SRL_D_DESC;
2967 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
2968 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
2969 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
2970 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
2972 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
2973 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
2974 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
2975 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
2977 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
2978 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
2979 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
2980 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
2982 def ST_B: ST_B_ENC, ST_B_DESC;
2983 def ST_H: ST_H_ENC, ST_H_DESC;
2984 def ST_W: ST_W_ENC, ST_W_DESC;
2985 def ST_D: ST_D_ENC, ST_D_DESC;
2987 def STX_B: STX_B_ENC, STX_B_DESC;
2988 def STX_H: STX_H_ENC, STX_H_DESC;
2989 def STX_W: STX_W_ENC, STX_W_DESC;
2990 def STX_D: STX_D_ENC, STX_D_DESC;
2992 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
2993 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
2994 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
2995 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
2997 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
2998 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
2999 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
3000 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
3002 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
3003 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
3004 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
3005 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
3007 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
3008 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
3009 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
3010 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
3012 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
3013 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
3014 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
3015 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
3017 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
3018 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
3019 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
3020 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
3022 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
3023 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
3024 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
3025 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
3027 def XOR_V : XOR_V_ENC, XOR_V_DESC;
3028 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
3029 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3030 MSA128B:$ws, MSA128B:$wt)>;
3031 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
3032 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3033 MSA128B:$ws, MSA128B:$wt)>;
3034 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
3035 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3036 MSA128B:$ws, MSA128B:$wt)>;
3038 def XORI_B : XORI_B_ENC, XORI_B_DESC;
3041 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
3042 Pat<pattern, result>, Requires<pred>;
3044 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
3045 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
3047 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
3048 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
3049 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
3050 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
3051 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
3052 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
3053 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
3055 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
3056 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
3057 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
3059 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
3060 (ST_B MSA128B:$ws, addr:$addr)>;
3061 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
3062 (ST_H MSA128H:$ws, addr:$addr)>;
3063 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
3064 (ST_W MSA128W:$ws, addr:$addr)>;
3065 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
3066 (ST_D MSA128D:$ws, addr:$addr)>;
3067 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
3068 (ST_H MSA128H:$ws, addr:$addr)>;
3069 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
3070 (ST_W MSA128W:$ws, addr:$addr)>;
3071 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
3072 (ST_D MSA128D:$ws, addr:$addr)>;
3074 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
3075 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
3076 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
3077 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
3078 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
3079 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
3081 class MSA_FABS_PSEUDO_DESC_BASE<RegisterClass RCWD, RegisterClass RCWS = RCWD,
3082 InstrItinClass itin = NoItinerary> :
3083 MipsPseudo<(outs RCWD:$wd),
3085 [(set RCWD:$wd, (fabs RCWS:$ws))]> {
3086 InstrItinClass Itinerary = itin;
3088 def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128W>,
3089 PseudoInstExpansion<(FMAX_A_W MSA128W:$wd, MSA128W:$ws,
3091 def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128D>,
3092 PseudoInstExpansion<(FMAX_A_D MSA128D:$wd, MSA128D:$ws,
3095 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3096 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
3097 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3098 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3100 // These are endian-independant because the element size doesnt change
3101 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
3102 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
3103 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3104 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
3105 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
3106 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
3108 // Little endian bitcasts are always no-ops
3109 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3110 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3111 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3112 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3113 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3114 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3116 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3117 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3118 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3119 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
3120 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
3122 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
3123 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
3124 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
3125 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
3126 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
3128 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
3129 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
3130 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
3131 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
3132 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
3134 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
3135 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
3136 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
3137 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
3138 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
3140 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
3141 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
3142 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
3143 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
3144 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
3146 // Big endian bitcasts expand to shuffle instructions.
3147 // This is because bitcast is defined to be a store/load sequence and the
3148 // vector store/load instructions are mixed-endian with respect to the vector
3149 // as a whole (little endian with respect to element order, but big endian
3152 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
3153 RegisterClass DstRC, MSAInst Insn,
3154 RegisterClass ViaRC> :
3155 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3156 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3160 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
3161 RegisterClass DstRC, MSAInst Insn,
3162 RegisterClass ViaRC> :
3163 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3164 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3168 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3169 RegisterClass DstRC> :
3170 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3172 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3173 RegisterClass DstRC> :
3174 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3176 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3177 RegisterClass DstRC> :
3178 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3182 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3187 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3188 RegisterClass DstRC> :
3189 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3191 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3192 RegisterClass DstRC> :
3193 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3195 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3196 RegisterClass DstRC> :
3197 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3199 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3200 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3201 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3202 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3203 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3204 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3206 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3207 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3208 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3209 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3210 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3212 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3213 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3214 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3215 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3216 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3218 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3219 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3220 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3221 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3222 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3224 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3225 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3226 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3227 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3228 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3230 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3231 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3232 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3233 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3234 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3236 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3237 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3238 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3239 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3240 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3242 // Pseudos used to implement BNZ.df, and BZ.df
3244 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3246 InstrItinClass itin = NoItinerary> :
3247 MipsPseudo<(outs GPR32:$dst),
3249 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3250 bit usesCustomInserter = 1;
3253 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3254 MSA128B, NoItinerary>;
3255 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3256 MSA128H, NoItinerary>;
3257 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3258 MSA128W, NoItinerary>;
3259 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3260 MSA128D, NoItinerary>;
3261 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3262 MSA128B, NoItinerary>;
3264 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3265 MSA128B, NoItinerary>;
3266 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3267 MSA128H, NoItinerary>;
3268 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3269 MSA128W, NoItinerary>;
3270 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3271 MSA128D, NoItinerary>;
3272 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3273 MSA128B, NoItinerary>;