1 //===- MipsMSAInstrInfo.td - MSA ASE instructions -*- tablegen ------------*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes Mips MSA ASE instructions.
12 //===----------------------------------------------------------------------===//
14 def SDT_MipsVecCond : SDTypeProfile<1, 1, [SDTCisInt<0>, SDTCisVec<1>]>;
15 def SDT_VSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
18 SDTCisVT<3, OtherVT>]>;
19 def SDT_VFSetCC : SDTypeProfile<1, 3, [SDTCisInt<0>,
22 SDTCisVT<3, OtherVT>]>;
23 def SDT_VSHF : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisVec<0>,
24 SDTCisInt<1>, SDTCisVec<1>,
25 SDTCisSameAs<0, 2>, SDTCisSameAs<2, 3>]>;
26 def SDT_SHF : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
27 SDTCisVT<1, i32>, SDTCisSameAs<0, 2>]>;
28 def SDT_ILV : SDTypeProfile<1, 2, [SDTCisInt<0>, SDTCisVec<0>,
29 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>]>;
31 def MipsVAllNonZero : SDNode<"MipsISD::VALL_NONZERO", SDT_MipsVecCond>;
32 def MipsVAnyNonZero : SDNode<"MipsISD::VANY_NONZERO", SDT_MipsVecCond>;
33 def MipsVAllZero : SDNode<"MipsISD::VALL_ZERO", SDT_MipsVecCond>;
34 def MipsVAnyZero : SDNode<"MipsISD::VANY_ZERO", SDT_MipsVecCond>;
35 def MipsVSMax : SDNode<"MipsISD::VSMAX", SDTIntBinOp,
36 [SDNPCommutative, SDNPAssociative]>;
37 def MipsVSMin : SDNode<"MipsISD::VSMIN", SDTIntBinOp,
38 [SDNPCommutative, SDNPAssociative]>;
39 def MipsVUMax : SDNode<"MipsISD::VUMAX", SDTIntBinOp,
40 [SDNPCommutative, SDNPAssociative]>;
41 def MipsVUMin : SDNode<"MipsISD::VUMIN", SDTIntBinOp,
42 [SDNPCommutative, SDNPAssociative]>;
43 def MipsVNOR : SDNode<"MipsISD::VNOR", SDTIntBinOp,
44 [SDNPCommutative, SDNPAssociative]>;
45 def MipsVSHF : SDNode<"MipsISD::VSHF", SDT_VSHF>;
46 def MipsSHF : SDNode<"MipsISD::SHF", SDT_SHF>;
47 def MipsILVEV : SDNode<"MipsISD::ILVEV", SDT_ILV>;
48 def MipsILVOD : SDNode<"MipsISD::ILVOD", SDT_ILV>;
49 def MipsILVL : SDNode<"MipsISD::ILVL", SDT_ILV>;
50 def MipsILVR : SDNode<"MipsISD::ILVR", SDT_ILV>;
51 def MipsPCKEV : SDNode<"MipsISD::PCKEV", SDT_ILV>;
52 def MipsPCKOD : SDNode<"MipsISD::PCKOD", SDT_ILV>;
54 def vsetcc : SDNode<"ISD::SETCC", SDT_VSetCC>;
55 def vfsetcc : SDNode<"ISD::SETCC", SDT_VFSetCC>;
57 def MipsVExtractSExt : SDNode<"MipsISD::VEXTRACT_SEXT_ELT",
58 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
59 def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
60 SDTypeProfile<1, 3, [SDTCisPtrTy<2>]>, []>;
64 def uimm3 : Operand<i32> {
65 let PrintMethod = "printUnsignedImm";
68 def uimm4 : Operand<i32> {
69 let PrintMethod = "printUnsignedImm";
72 def uimm8 : Operand<i32> {
73 let PrintMethod = "printUnsignedImm";
76 def simm5 : Operand<i32>;
78 def simm10 : Operand<i32>;
80 def vsplat_uimm1 : Operand<vAny> {
81 let PrintMethod = "printUnsignedImm8";
84 def vsplat_uimm2 : Operand<vAny> {
85 let PrintMethod = "printUnsignedImm8";
88 def vsplat_uimm3 : Operand<vAny> {
89 let PrintMethod = "printUnsignedImm";
92 def vsplat_uimm4 : Operand<vAny> {
93 let PrintMethod = "printUnsignedImm";
96 def vsplat_uimm5 : Operand<vAny> {
97 let PrintMethod = "printUnsignedImm";
100 def vsplat_uimm6 : Operand<vAny> {
101 let PrintMethod = "printUnsignedImm";
104 def vsplat_uimm8 : Operand<vAny> {
105 let PrintMethod = "printUnsignedImm";
108 def vsplat_simm5 : Operand<vAny>;
110 def vsplat_simm10 : Operand<vAny>;
113 def vextract_sext_i8 : PatFrag<(ops node:$vec, node:$idx),
114 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
115 def vextract_sext_i16 : PatFrag<(ops node:$vec, node:$idx),
116 (MipsVExtractSExt node:$vec, node:$idx, i16)>;
117 def vextract_sext_i32 : PatFrag<(ops node:$vec, node:$idx),
118 (MipsVExtractSExt node:$vec, node:$idx, i32)>;
120 def vextract_zext_i8 : PatFrag<(ops node:$vec, node:$idx),
121 (MipsVExtractZExt node:$vec, node:$idx, i8)>;
122 def vextract_zext_i16 : PatFrag<(ops node:$vec, node:$idx),
123 (MipsVExtractZExt node:$vec, node:$idx, i16)>;
124 def vextract_zext_i32 : PatFrag<(ops node:$vec, node:$idx),
125 (MipsVExtractZExt node:$vec, node:$idx, i32)>;
127 def vinsert_v16i8 : PatFrag<(ops node:$vec, node:$val, node:$idx),
128 (v16i8 (vector_insert node:$vec, node:$val, node:$idx))>;
129 def vinsert_v8i16 : PatFrag<(ops node:$vec, node:$val, node:$idx),
130 (v8i16 (vector_insert node:$vec, node:$val, node:$idx))>;
131 def vinsert_v4i32 : PatFrag<(ops node:$vec, node:$val, node:$idx),
132 (v4i32 (vector_insert node:$vec, node:$val, node:$idx))>;
134 class vfsetcc_type<ValueType ResTy, ValueType OpTy, CondCode CC> :
135 PatFrag<(ops node:$lhs, node:$rhs),
136 (ResTy (vfsetcc (OpTy node:$lhs), (OpTy node:$rhs), CC))>;
138 // ISD::SETFALSE cannot occur
139 def vfsetoeq_v4f32 : vfsetcc_type<v4i32, v4f32, SETOEQ>;
140 def vfsetoeq_v2f64 : vfsetcc_type<v2i64, v2f64, SETOEQ>;
141 def vfsetoge_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGE>;
142 def vfsetoge_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGE>;
143 def vfsetogt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOGT>;
144 def vfsetogt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOGT>;
145 def vfsetole_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLE>;
146 def vfsetole_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLE>;
147 def vfsetolt_v4f32 : vfsetcc_type<v4i32, v4f32, SETOLT>;
148 def vfsetolt_v2f64 : vfsetcc_type<v2i64, v2f64, SETOLT>;
149 def vfsetone_v4f32 : vfsetcc_type<v4i32, v4f32, SETONE>;
150 def vfsetone_v2f64 : vfsetcc_type<v2i64, v2f64, SETONE>;
151 def vfsetord_v4f32 : vfsetcc_type<v4i32, v4f32, SETO>;
152 def vfsetord_v2f64 : vfsetcc_type<v2i64, v2f64, SETO>;
153 def vfsetun_v4f32 : vfsetcc_type<v4i32, v4f32, SETUO>;
154 def vfsetun_v2f64 : vfsetcc_type<v2i64, v2f64, SETUO>;
155 def vfsetueq_v4f32 : vfsetcc_type<v4i32, v4f32, SETUEQ>;
156 def vfsetueq_v2f64 : vfsetcc_type<v2i64, v2f64, SETUEQ>;
157 def vfsetuge_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGE>;
158 def vfsetuge_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGE>;
159 def vfsetugt_v4f32 : vfsetcc_type<v4i32, v4f32, SETUGT>;
160 def vfsetugt_v2f64 : vfsetcc_type<v2i64, v2f64, SETUGT>;
161 def vfsetule_v4f32 : vfsetcc_type<v4i32, v4f32, SETULE>;
162 def vfsetule_v2f64 : vfsetcc_type<v2i64, v2f64, SETULE>;
163 def vfsetult_v4f32 : vfsetcc_type<v4i32, v4f32, SETULT>;
164 def vfsetult_v2f64 : vfsetcc_type<v2i64, v2f64, SETULT>;
165 def vfsetune_v4f32 : vfsetcc_type<v4i32, v4f32, SETUNE>;
166 def vfsetune_v2f64 : vfsetcc_type<v2i64, v2f64, SETUNE>;
167 // ISD::SETTRUE cannot occur
168 // ISD::SETFALSE2 cannot occur
169 // ISD::SETTRUE2 cannot occur
171 class vsetcc_type<ValueType ResTy, CondCode CC> :
172 PatFrag<(ops node:$lhs, node:$rhs),
173 (ResTy (vsetcc node:$lhs, node:$rhs, CC))>;
175 def vseteq_v16i8 : vsetcc_type<v16i8, SETEQ>;
176 def vseteq_v8i16 : vsetcc_type<v8i16, SETEQ>;
177 def vseteq_v4i32 : vsetcc_type<v4i32, SETEQ>;
178 def vseteq_v2i64 : vsetcc_type<v2i64, SETEQ>;
179 def vsetle_v16i8 : vsetcc_type<v16i8, SETLE>;
180 def vsetle_v8i16 : vsetcc_type<v8i16, SETLE>;
181 def vsetle_v4i32 : vsetcc_type<v4i32, SETLE>;
182 def vsetle_v2i64 : vsetcc_type<v2i64, SETLE>;
183 def vsetlt_v16i8 : vsetcc_type<v16i8, SETLT>;
184 def vsetlt_v8i16 : vsetcc_type<v8i16, SETLT>;
185 def vsetlt_v4i32 : vsetcc_type<v4i32, SETLT>;
186 def vsetlt_v2i64 : vsetcc_type<v2i64, SETLT>;
187 def vsetule_v16i8 : vsetcc_type<v16i8, SETULE>;
188 def vsetule_v8i16 : vsetcc_type<v8i16, SETULE>;
189 def vsetule_v4i32 : vsetcc_type<v4i32, SETULE>;
190 def vsetule_v2i64 : vsetcc_type<v2i64, SETULE>;
191 def vsetult_v16i8 : vsetcc_type<v16i8, SETULT>;
192 def vsetult_v8i16 : vsetcc_type<v8i16, SETULT>;
193 def vsetult_v4i32 : vsetcc_type<v4i32, SETULT>;
194 def vsetult_v2i64 : vsetcc_type<v2i64, SETULT>;
196 def vsplati8 : PatFrag<(ops node:$e0),
197 (v16i8 (build_vector node:$e0, node:$e0,
204 node:$e0, node:$e0))>;
205 def vsplati16 : PatFrag<(ops node:$e0),
206 (v8i16 (build_vector node:$e0, node:$e0,
209 node:$e0, node:$e0))>;
210 def vsplati32 : PatFrag<(ops node:$e0),
211 (v4i32 (build_vector node:$e0, node:$e0,
212 node:$e0, node:$e0))>;
213 def vsplati64 : PatFrag<(ops node:$e0),
214 (v2i64 (build_vector:$v0 node:$e0, node:$e0))>;
216 class SplatPatLeaf<Operand opclass, dag frag, code pred = [{}],
217 SDNodeXForm xform = NOOP_SDNodeXForm>
218 : PatLeaf<frag, pred, xform> {
219 Operand OpClass = opclass;
222 class SplatComplexPattern<Operand opclass, ValueType ty, int numops, string fn,
223 list<SDNode> roots = [],
224 list<SDNodeProperty> props = []> :
225 ComplexPattern<ty, numops, fn, roots, props> {
226 Operand OpClass = opclass;
229 def vsplati8_uimm3 : SplatComplexPattern<vsplat_uimm3, v16i8, 1,
231 [build_vector, bitconvert]>;
233 def vsplati8_uimm4 : SplatComplexPattern<vsplat_uimm4, v16i8, 1,
235 [build_vector, bitconvert]>;
237 def vsplati8_uimm5 : SplatComplexPattern<vsplat_uimm5, v16i8, 1,
239 [build_vector, bitconvert]>;
241 def vsplati8_uimm8 : SplatComplexPattern<vsplat_uimm8, v16i8, 1,
243 [build_vector, bitconvert]>;
245 def vsplati8_simm5 : SplatComplexPattern<vsplat_simm5, v16i8, 1,
247 [build_vector, bitconvert]>;
249 def vsplati16_uimm3 : SplatComplexPattern<vsplat_uimm3, v8i16, 1,
251 [build_vector, bitconvert]>;
253 def vsplati16_uimm4 : SplatComplexPattern<vsplat_uimm4, v8i16, 1,
255 [build_vector, bitconvert]>;
257 def vsplati16_uimm5 : SplatComplexPattern<vsplat_uimm5, v8i16, 1,
259 [build_vector, bitconvert]>;
261 def vsplati16_simm5 : SplatComplexPattern<vsplat_simm5, v8i16, 1,
263 [build_vector, bitconvert]>;
265 def vsplati32_uimm2 : SplatComplexPattern<vsplat_uimm2, v4i32, 1,
267 [build_vector, bitconvert]>;
269 def vsplati32_uimm5 : SplatComplexPattern<vsplat_uimm5, v4i32, 1,
271 [build_vector, bitconvert]>;
273 def vsplati32_simm5 : SplatComplexPattern<vsplat_simm5, v4i32, 1,
275 [build_vector, bitconvert]>;
277 def vsplati64_uimm1 : SplatComplexPattern<vsplat_uimm1, v2i64, 1,
279 [build_vector, bitconvert]>;
281 def vsplati64_uimm5 : SplatComplexPattern<vsplat_uimm5, v2i64, 1,
283 [build_vector, bitconvert]>;
285 def vsplati64_uimm6 : SplatComplexPattern<vsplat_uimm6, v2i64, 1,
287 [build_vector, bitconvert]>;
289 def vsplati64_simm5 : SplatComplexPattern<vsplat_simm5, v2i64, 1,
291 [build_vector, bitconvert]>;
293 // Any build_vector that is a constant splat with a value that is an exact
295 def vsplat_uimm_pow2 : ComplexPattern<vAny, 1, "selectVSplatUimmPow2",
296 [build_vector, bitconvert]>;
299 def immSExt5 : ImmLeaf<i32, [{return isInt<5>(Imm);}]>;
300 def immSExt10: ImmLeaf<i32, [{return isInt<10>(Imm);}]>;
302 // Instruction encoding.
303 class ADD_A_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010000>;
304 class ADD_A_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010000>;
305 class ADD_A_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010000>;
306 class ADD_A_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010000>;
308 class ADDS_A_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010000>;
309 class ADDS_A_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010000>;
310 class ADDS_A_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010000>;
311 class ADDS_A_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010000>;
313 class ADDS_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010000>;
314 class ADDS_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010000>;
315 class ADDS_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010000>;
316 class ADDS_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010000>;
318 class ADDS_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010000>;
319 class ADDS_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010000>;
320 class ADDS_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010000>;
321 class ADDS_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010000>;
323 class ADDV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001110>;
324 class ADDV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001110>;
325 class ADDV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001110>;
326 class ADDV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001110>;
328 class ADDVI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000110>;
329 class ADDVI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000110>;
330 class ADDVI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000110>;
331 class ADDVI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000110>;
333 class AND_V_ENC : MSA_VEC_FMT<0b00000, 0b011110>;
335 class ANDI_B_ENC : MSA_I8_FMT<0b00, 0b000000>;
337 class ASUB_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010001>;
338 class ASUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010001>;
339 class ASUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010001>;
340 class ASUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010001>;
342 class ASUB_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010001>;
343 class ASUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010001>;
344 class ASUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010001>;
345 class ASUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010001>;
347 class AVE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010000>;
348 class AVE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010000>;
349 class AVE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010000>;
350 class AVE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010000>;
352 class AVE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010000>;
353 class AVE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010000>;
354 class AVE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010000>;
355 class AVE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010000>;
357 class AVER_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010000>;
358 class AVER_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010000>;
359 class AVER_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010000>;
360 class AVER_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010000>;
362 class AVER_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010000>;
363 class AVER_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010000>;
364 class AVER_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010000>;
365 class AVER_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010000>;
367 class BCLR_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001101>;
368 class BCLR_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001101>;
369 class BCLR_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001101>;
370 class BCLR_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001101>;
372 class BCLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001001>;
373 class BCLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001001>;
374 class BCLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001001>;
375 class BCLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001001>;
377 class BINSL_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001101>;
378 class BINSL_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001101>;
379 class BINSL_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001101>;
380 class BINSL_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001101>;
382 class BINSLI_B_ENC : MSA_BIT_B_FMT<0b110, 0b001001>;
383 class BINSLI_H_ENC : MSA_BIT_H_FMT<0b110, 0b001001>;
384 class BINSLI_W_ENC : MSA_BIT_W_FMT<0b110, 0b001001>;
385 class BINSLI_D_ENC : MSA_BIT_D_FMT<0b110, 0b001001>;
387 class BINSR_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001101>;
388 class BINSR_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001101>;
389 class BINSR_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001101>;
390 class BINSR_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001101>;
392 class BINSRI_B_ENC : MSA_BIT_B_FMT<0b111, 0b001001>;
393 class BINSRI_H_ENC : MSA_BIT_H_FMT<0b111, 0b001001>;
394 class BINSRI_W_ENC : MSA_BIT_W_FMT<0b111, 0b001001>;
395 class BINSRI_D_ENC : MSA_BIT_D_FMT<0b111, 0b001001>;
397 class BMNZ_V_ENC : MSA_VEC_FMT<0b00100, 0b011110>;
399 class BMNZI_B_ENC : MSA_I8_FMT<0b00, 0b000001>;
401 class BMZ_V_ENC : MSA_VEC_FMT<0b00101, 0b011110>;
403 class BMZI_B_ENC : MSA_I8_FMT<0b01, 0b000001>;
405 class BNEG_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001101>;
406 class BNEG_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001101>;
407 class BNEG_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001101>;
408 class BNEG_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001101>;
410 class BNEGI_B_ENC : MSA_BIT_B_FMT<0b101, 0b001001>;
411 class BNEGI_H_ENC : MSA_BIT_H_FMT<0b101, 0b001001>;
412 class BNEGI_W_ENC : MSA_BIT_W_FMT<0b101, 0b001001>;
413 class BNEGI_D_ENC : MSA_BIT_D_FMT<0b101, 0b001001>;
415 class BNZ_B_ENC : MSA_I10_FMT<0b000, 0b00, 0b001100>;
416 class BNZ_H_ENC : MSA_I10_FMT<0b000, 0b01, 0b001100>;
417 class BNZ_W_ENC : MSA_I10_FMT<0b000, 0b10, 0b001100>;
418 class BNZ_D_ENC : MSA_I10_FMT<0b000, 0b11, 0b001100>;
420 class BNZ_V_ENC : MSA_VEC_FMT<0b01000, 0b011110>;
422 class BSEL_V_ENC : MSA_VECS10_FMT<0b00110, 0b011110>;
424 class BSELI_B_ENC : MSA_I8_FMT<0b10, 0b000001>;
426 class BSET_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001101>;
427 class BSET_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001101>;
428 class BSET_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001101>;
429 class BSET_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001101>;
431 class BSETI_B_ENC : MSA_BIT_B_FMT<0b100, 0b001001>;
432 class BSETI_H_ENC : MSA_BIT_H_FMT<0b100, 0b001001>;
433 class BSETI_W_ENC : MSA_BIT_W_FMT<0b100, 0b001001>;
434 class BSETI_D_ENC : MSA_BIT_D_FMT<0b100, 0b001001>;
436 class BZ_B_ENC : MSA_I10_FMT<0b001, 0b00, 0b001100>;
437 class BZ_H_ENC : MSA_I10_FMT<0b001, 0b01, 0b001100>;
438 class BZ_W_ENC : MSA_I10_FMT<0b001, 0b10, 0b001100>;
439 class BZ_D_ENC : MSA_I10_FMT<0b001, 0b11, 0b001100>;
441 class BZ_V_ENC : MSA_VECS10_FMT<0b01001, 0b011110>;
443 class CEQ_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001111>;
444 class CEQ_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001111>;
445 class CEQ_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001111>;
446 class CEQ_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001111>;
448 class CEQI_B_ENC : MSA_I5_FMT<0b000, 0b00, 0b000111>;
449 class CEQI_H_ENC : MSA_I5_FMT<0b000, 0b01, 0b000111>;
450 class CEQI_W_ENC : MSA_I5_FMT<0b000, 0b10, 0b000111>;
451 class CEQI_D_ENC : MSA_I5_FMT<0b000, 0b11, 0b000111>;
453 class CFCMSA_ENC : MSA_ELM_FMT<0b0001111110, 0b011001>;
455 class CLE_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001111>;
456 class CLE_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001111>;
457 class CLE_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001111>;
458 class CLE_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001111>;
460 class CLE_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001111>;
461 class CLE_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001111>;
462 class CLE_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001111>;
463 class CLE_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001111>;
465 class CLEI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000111>;
466 class CLEI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000111>;
467 class CLEI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000111>;
468 class CLEI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000111>;
470 class CLEI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000111>;
471 class CLEI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000111>;
472 class CLEI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000111>;
473 class CLEI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000111>;
475 class CLT_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001111>;
476 class CLT_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001111>;
477 class CLT_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001111>;
478 class CLT_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001111>;
480 class CLT_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001111>;
481 class CLT_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001111>;
482 class CLT_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001111>;
483 class CLT_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001111>;
485 class CLTI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000111>;
486 class CLTI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000111>;
487 class CLTI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000111>;
488 class CLTI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000111>;
490 class CLTI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000111>;
491 class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>;
492 class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>;
493 class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>;
495 class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>;
496 class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>;
497 class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>;
499 class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>;
500 class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>;
501 class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>;
503 class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>;
505 class DIV_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010010>;
506 class DIV_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010010>;
507 class DIV_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010010>;
508 class DIV_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010010>;
510 class DIV_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010010>;
511 class DIV_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010010>;
512 class DIV_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010010>;
513 class DIV_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010010>;
515 class DOTP_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010011>;
516 class DOTP_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010011>;
517 class DOTP_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010011>;
519 class DOTP_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010011>;
520 class DOTP_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010011>;
521 class DOTP_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010011>;
523 class DPADD_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010011>;
524 class DPADD_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010011>;
525 class DPADD_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010011>;
527 class DPADD_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010011>;
528 class DPADD_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010011>;
529 class DPADD_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010011>;
531 class DPSUB_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010011>;
532 class DPSUB_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010011>;
533 class DPSUB_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010011>;
535 class DPSUB_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010011>;
536 class DPSUB_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010011>;
537 class DPSUB_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010011>;
539 class FADD_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011011>;
540 class FADD_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011011>;
542 class FCAF_W_ENC : MSA_3RF_FMT<0b0000, 0b0, 0b011010>;
543 class FCAF_D_ENC : MSA_3RF_FMT<0b0000, 0b1, 0b011010>;
545 class FCEQ_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011010>;
546 class FCEQ_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011010>;
548 class FCLASS_W_ENC : MSA_2RF_FMT<0b110010000, 0b0, 0b011110>;
549 class FCLASS_D_ENC : MSA_2RF_FMT<0b110010000, 0b1, 0b011110>;
551 class FCLE_W_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011010>;
552 class FCLE_D_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011010>;
554 class FCLT_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011010>;
555 class FCLT_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011010>;
557 class FCNE_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011100>;
558 class FCNE_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011100>;
560 class FCOR_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011100>;
561 class FCOR_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011100>;
563 class FCUEQ_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011010>;
564 class FCUEQ_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011010>;
566 class FCULE_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011010>;
567 class FCULE_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011010>;
569 class FCULT_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011010>;
570 class FCULT_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011010>;
572 class FCUN_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011010>;
573 class FCUN_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011010>;
575 class FCUNE_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011100>;
576 class FCUNE_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011100>;
578 class FDIV_W_ENC : MSA_3RF_FMT<0b0011, 0b0, 0b011011>;
579 class FDIV_D_ENC : MSA_3RF_FMT<0b0011, 0b1, 0b011011>;
581 class FEXDO_H_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011011>;
582 class FEXDO_W_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011011>;
584 class FEXP2_W_ENC : MSA_3RF_FMT<0b0111, 0b0, 0b011011>;
585 class FEXP2_D_ENC : MSA_3RF_FMT<0b0111, 0b1, 0b011011>;
587 class FEXUPL_W_ENC : MSA_2RF_FMT<0b110011000, 0b0, 0b011110>;
588 class FEXUPL_D_ENC : MSA_2RF_FMT<0b110011000, 0b1, 0b011110>;
590 class FEXUPR_W_ENC : MSA_2RF_FMT<0b110011001, 0b0, 0b011110>;
591 class FEXUPR_D_ENC : MSA_2RF_FMT<0b110011001, 0b1, 0b011110>;
593 class FFINT_S_W_ENC : MSA_2RF_FMT<0b110011110, 0b0, 0b011110>;
594 class FFINT_S_D_ENC : MSA_2RF_FMT<0b110011110, 0b1, 0b011110>;
596 class FFINT_U_W_ENC : MSA_2RF_FMT<0b110011111, 0b0, 0b011110>;
597 class FFINT_U_D_ENC : MSA_2RF_FMT<0b110011111, 0b1, 0b011110>;
599 class FFQL_W_ENC : MSA_2RF_FMT<0b110011010, 0b0, 0b011110>;
600 class FFQL_D_ENC : MSA_2RF_FMT<0b110011010, 0b1, 0b011110>;
602 class FFQR_W_ENC : MSA_2RF_FMT<0b110011011, 0b0, 0b011110>;
603 class FFQR_D_ENC : MSA_2RF_FMT<0b110011011, 0b1, 0b011110>;
605 class FILL_B_ENC : MSA_2R_FMT<0b11000000, 0b00, 0b011110>;
606 class FILL_H_ENC : MSA_2R_FMT<0b11000000, 0b01, 0b011110>;
607 class FILL_W_ENC : MSA_2R_FMT<0b11000000, 0b10, 0b011110>;
609 class FLOG2_W_ENC : MSA_2RF_FMT<0b110010111, 0b0, 0b011110>;
610 class FLOG2_D_ENC : MSA_2RF_FMT<0b110010111, 0b1, 0b011110>;
612 class FMADD_W_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011011>;
613 class FMADD_D_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011011>;
615 class FMAX_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011011>;
616 class FMAX_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011011>;
618 class FMAX_A_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011011>;
619 class FMAX_A_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011011>;
621 class FMIN_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011011>;
622 class FMIN_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011011>;
624 class FMIN_A_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011011>;
625 class FMIN_A_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011011>;
627 class FMSUB_W_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011011>;
628 class FMSUB_D_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011011>;
630 class FMUL_W_ENC : MSA_3RF_FMT<0b0010, 0b0, 0b011011>;
631 class FMUL_D_ENC : MSA_3RF_FMT<0b0010, 0b1, 0b011011>;
633 class FRINT_W_ENC : MSA_2RF_FMT<0b110010110, 0b0, 0b011110>;
634 class FRINT_D_ENC : MSA_2RF_FMT<0b110010110, 0b1, 0b011110>;
636 class FRCP_W_ENC : MSA_2RF_FMT<0b110010101, 0b0, 0b011110>;
637 class FRCP_D_ENC : MSA_2RF_FMT<0b110010101, 0b1, 0b011110>;
639 class FRSQRT_W_ENC : MSA_2RF_FMT<0b110010100, 0b0, 0b011110>;
640 class FRSQRT_D_ENC : MSA_2RF_FMT<0b110010100, 0b1, 0b011110>;
642 class FSAF_W_ENC : MSA_3RF_FMT<0b1000, 0b0, 0b011010>;
643 class FSAF_D_ENC : MSA_3RF_FMT<0b1000, 0b1, 0b011010>;
645 class FSEQ_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011010>;
646 class FSEQ_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011010>;
648 class FSLE_W_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011010>;
649 class FSLE_D_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011010>;
651 class FSLT_W_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011010>;
652 class FSLT_D_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011010>;
654 class FSNE_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011100>;
655 class FSNE_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011100>;
657 class FSOR_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011100>;
658 class FSOR_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011100>;
660 class FSQRT_W_ENC : MSA_2RF_FMT<0b110010011, 0b0, 0b011110>;
661 class FSQRT_D_ENC : MSA_2RF_FMT<0b110010011, 0b1, 0b011110>;
663 class FSUB_W_ENC : MSA_3RF_FMT<0b0001, 0b0, 0b011011>;
664 class FSUB_D_ENC : MSA_3RF_FMT<0b0001, 0b1, 0b011011>;
666 class FSUEQ_W_ENC : MSA_3RF_FMT<0b1011, 0b0, 0b011010>;
667 class FSUEQ_D_ENC : MSA_3RF_FMT<0b1011, 0b1, 0b011010>;
669 class FSULE_W_ENC : MSA_3RF_FMT<0b1111, 0b0, 0b011010>;
670 class FSULE_D_ENC : MSA_3RF_FMT<0b1111, 0b1, 0b011010>;
672 class FSULT_W_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011010>;
673 class FSULT_D_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011010>;
675 class FSUN_W_ENC : MSA_3RF_FMT<0b1001, 0b0, 0b011010>;
676 class FSUN_D_ENC : MSA_3RF_FMT<0b1001, 0b1, 0b011010>;
678 class FSUNE_W_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011100>;
679 class FSUNE_D_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011100>;
681 class FTRUNC_S_W_ENC : MSA_2RF_FMT<0b110010001, 0b0, 0b011110>;
682 class FTRUNC_S_D_ENC : MSA_2RF_FMT<0b110010001, 0b1, 0b011110>;
684 class FTRUNC_U_W_ENC : MSA_2RF_FMT<0b110010010, 0b0, 0b011110>;
685 class FTRUNC_U_D_ENC : MSA_2RF_FMT<0b110010010, 0b1, 0b011110>;
687 class FTINT_S_W_ENC : MSA_2RF_FMT<0b110011100, 0b0, 0b011110>;
688 class FTINT_S_D_ENC : MSA_2RF_FMT<0b110011100, 0b1, 0b011110>;
690 class FTINT_U_W_ENC : MSA_2RF_FMT<0b110011101, 0b0, 0b011110>;
691 class FTINT_U_D_ENC : MSA_2RF_FMT<0b110011101, 0b1, 0b011110>;
693 class FTQ_H_ENC : MSA_3RF_FMT<0b1010, 0b0, 0b011011>;
694 class FTQ_W_ENC : MSA_3RF_FMT<0b1010, 0b1, 0b011011>;
696 class HADD_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010101>;
697 class HADD_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010101>;
698 class HADD_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010101>;
700 class HADD_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010101>;
701 class HADD_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010101>;
702 class HADD_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010101>;
704 class HSUB_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010101>;
705 class HSUB_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010101>;
706 class HSUB_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010101>;
708 class HSUB_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010101>;
709 class HSUB_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010101>;
710 class HSUB_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010101>;
712 class ILVEV_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010100>;
713 class ILVEV_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010100>;
714 class ILVEV_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010100>;
715 class ILVEV_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010100>;
717 class ILVL_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b010100>;
718 class ILVL_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b010100>;
719 class ILVL_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b010100>;
720 class ILVL_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b010100>;
722 class ILVOD_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010100>;
723 class ILVOD_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010100>;
724 class ILVOD_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010100>;
725 class ILVOD_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010100>;
727 class ILVR_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b010100>;
728 class ILVR_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b010100>;
729 class ILVR_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b010100>;
730 class ILVR_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b010100>;
732 class INSERT_B_ENC : MSA_ELM_B_FMT<0b0100, 0b011001>;
733 class INSERT_H_ENC : MSA_ELM_H_FMT<0b0100, 0b011001>;
734 class INSERT_W_ENC : MSA_ELM_W_FMT<0b0100, 0b011001>;
736 class INSVE_B_ENC : MSA_ELM_B_FMT<0b0101, 0b011001>;
737 class INSVE_H_ENC : MSA_ELM_H_FMT<0b0101, 0b011001>;
738 class INSVE_W_ENC : MSA_ELM_W_FMT<0b0101, 0b011001>;
739 class INSVE_D_ENC : MSA_ELM_D_FMT<0b0101, 0b011001>;
741 class LD_B_ENC : MSA_I5_FMT<0b110, 0b00, 0b000111>;
742 class LD_H_ENC : MSA_I5_FMT<0b110, 0b01, 0b000111>;
743 class LD_W_ENC : MSA_I5_FMT<0b110, 0b10, 0b000111>;
744 class LD_D_ENC : MSA_I5_FMT<0b110, 0b11, 0b000111>;
746 class LDI_B_ENC : MSA_I10_FMT<0b010, 0b00, 0b001100>;
747 class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>;
748 class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>;
749 class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>;
751 class LDX_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001111>;
752 class LDX_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001111>;
753 class LDX_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001111>;
754 class LDX_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001111>;
756 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
757 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
759 class MADDR_Q_H_ENC : MSA_3RF_FMT<0b1101, 0b0, 0b011100>;
760 class MADDR_Q_W_ENC : MSA_3RF_FMT<0b1101, 0b1, 0b011100>;
762 class MADDV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010010>;
763 class MADDV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010010>;
764 class MADDV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010010>;
765 class MADDV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010010>;
767 class MAX_A_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b001110>;
768 class MAX_A_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b001110>;
769 class MAX_A_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b001110>;
770 class MAX_A_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b001110>;
772 class MAX_S_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001110>;
773 class MAX_S_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001110>;
774 class MAX_S_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001110>;
775 class MAX_S_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001110>;
777 class MAX_U_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b001110>;
778 class MAX_U_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b001110>;
779 class MAX_U_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b001110>;
780 class MAX_U_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b001110>;
782 class MAXI_S_B_ENC : MSA_I5_FMT<0b010, 0b00, 0b000110>;
783 class MAXI_S_H_ENC : MSA_I5_FMT<0b010, 0b01, 0b000110>;
784 class MAXI_S_W_ENC : MSA_I5_FMT<0b010, 0b10, 0b000110>;
785 class MAXI_S_D_ENC : MSA_I5_FMT<0b010, 0b11, 0b000110>;
787 class MAXI_U_B_ENC : MSA_I5_FMT<0b011, 0b00, 0b000110>;
788 class MAXI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000110>;
789 class MAXI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000110>;
790 class MAXI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000110>;
792 class MIN_A_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001110>;
793 class MIN_A_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001110>;
794 class MIN_A_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001110>;
795 class MIN_A_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001110>;
797 class MIN_S_B_ENC : MSA_3R_FMT<0b100, 0b00, 0b001110>;
798 class MIN_S_H_ENC : MSA_3R_FMT<0b100, 0b01, 0b001110>;
799 class MIN_S_W_ENC : MSA_3R_FMT<0b100, 0b10, 0b001110>;
800 class MIN_S_D_ENC : MSA_3R_FMT<0b100, 0b11, 0b001110>;
802 class MIN_U_B_ENC : MSA_3R_FMT<0b101, 0b00, 0b001110>;
803 class MIN_U_H_ENC : MSA_3R_FMT<0b101, 0b01, 0b001110>;
804 class MIN_U_W_ENC : MSA_3R_FMT<0b101, 0b10, 0b001110>;
805 class MIN_U_D_ENC : MSA_3R_FMT<0b101, 0b11, 0b001110>;
807 class MINI_S_B_ENC : MSA_I5_FMT<0b100, 0b00, 0b000110>;
808 class MINI_S_H_ENC : MSA_I5_FMT<0b100, 0b01, 0b000110>;
809 class MINI_S_W_ENC : MSA_I5_FMT<0b100, 0b10, 0b000110>;
810 class MINI_S_D_ENC : MSA_I5_FMT<0b100, 0b11, 0b000110>;
812 class MINI_U_B_ENC : MSA_I5_FMT<0b101, 0b00, 0b000110>;
813 class MINI_U_H_ENC : MSA_I5_FMT<0b101, 0b01, 0b000110>;
814 class MINI_U_W_ENC : MSA_I5_FMT<0b101, 0b10, 0b000110>;
815 class MINI_U_D_ENC : MSA_I5_FMT<0b101, 0b11, 0b000110>;
817 class MOD_S_B_ENC : MSA_3R_FMT<0b110, 0b00, 0b010010>;
818 class MOD_S_H_ENC : MSA_3R_FMT<0b110, 0b01, 0b010010>;
819 class MOD_S_W_ENC : MSA_3R_FMT<0b110, 0b10, 0b010010>;
820 class MOD_S_D_ENC : MSA_3R_FMT<0b110, 0b11, 0b010010>;
822 class MOD_U_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b010010>;
823 class MOD_U_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b010010>;
824 class MOD_U_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b010010>;
825 class MOD_U_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b010010>;
827 class MOVE_V_ENC : MSA_ELM_FMT<0b0010111110, 0b011001>;
829 class MSUB_Q_H_ENC : MSA_3RF_FMT<0b0110, 0b0, 0b011100>;
830 class MSUB_Q_W_ENC : MSA_3RF_FMT<0b0110, 0b1, 0b011100>;
832 class MSUBR_Q_H_ENC : MSA_3RF_FMT<0b1110, 0b0, 0b011100>;
833 class MSUBR_Q_W_ENC : MSA_3RF_FMT<0b1110, 0b1, 0b011100>;
835 class MSUBV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010010>;
836 class MSUBV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010010>;
837 class MSUBV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010010>;
838 class MSUBV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010010>;
840 class MUL_Q_H_ENC : MSA_3RF_FMT<0b0100, 0b0, 0b011100>;
841 class MUL_Q_W_ENC : MSA_3RF_FMT<0b0100, 0b1, 0b011100>;
843 class MULR_Q_H_ENC : MSA_3RF_FMT<0b1100, 0b0, 0b011100>;
844 class MULR_Q_W_ENC : MSA_3RF_FMT<0b1100, 0b1, 0b011100>;
846 class MULV_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010010>;
847 class MULV_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010010>;
848 class MULV_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010010>;
849 class MULV_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010010>;
851 class NLOC_B_ENC : MSA_2R_FMT<0b11000010, 0b00, 0b011110>;
852 class NLOC_H_ENC : MSA_2R_FMT<0b11000010, 0b01, 0b011110>;
853 class NLOC_W_ENC : MSA_2R_FMT<0b11000010, 0b10, 0b011110>;
854 class NLOC_D_ENC : MSA_2R_FMT<0b11000010, 0b11, 0b011110>;
856 class NLZC_B_ENC : MSA_2R_FMT<0b11000011, 0b00, 0b011110>;
857 class NLZC_H_ENC : MSA_2R_FMT<0b11000011, 0b01, 0b011110>;
858 class NLZC_W_ENC : MSA_2R_FMT<0b11000011, 0b10, 0b011110>;
859 class NLZC_D_ENC : MSA_2R_FMT<0b11000011, 0b11, 0b011110>;
861 class NOR_V_ENC : MSA_VEC_FMT<0b00010, 0b011110>;
863 class NORI_B_ENC : MSA_I8_FMT<0b10, 0b000000>;
865 class OR_V_ENC : MSA_VEC_FMT<0b00001, 0b011110>;
867 class ORI_B_ENC : MSA_I8_FMT<0b01, 0b000000>;
869 class PCKEV_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010100>;
870 class PCKEV_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010100>;
871 class PCKEV_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010100>;
872 class PCKEV_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010100>;
874 class PCKOD_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010100>;
875 class PCKOD_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010100>;
876 class PCKOD_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010100>;
877 class PCKOD_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010100>;
879 class PCNT_B_ENC : MSA_2R_FMT<0b11000001, 0b00, 0b011110>;
880 class PCNT_H_ENC : MSA_2R_FMT<0b11000001, 0b01, 0b011110>;
881 class PCNT_W_ENC : MSA_2R_FMT<0b11000001, 0b10, 0b011110>;
882 class PCNT_D_ENC : MSA_2R_FMT<0b11000001, 0b11, 0b011110>;
884 class SAT_S_B_ENC : MSA_BIT_B_FMT<0b000, 0b001010>;
885 class SAT_S_H_ENC : MSA_BIT_H_FMT<0b000, 0b001010>;
886 class SAT_S_W_ENC : MSA_BIT_W_FMT<0b000, 0b001010>;
887 class SAT_S_D_ENC : MSA_BIT_D_FMT<0b000, 0b001010>;
889 class SAT_U_B_ENC : MSA_BIT_B_FMT<0b001, 0b001010>;
890 class SAT_U_H_ENC : MSA_BIT_H_FMT<0b001, 0b001010>;
891 class SAT_U_W_ENC : MSA_BIT_W_FMT<0b001, 0b001010>;
892 class SAT_U_D_ENC : MSA_BIT_D_FMT<0b001, 0b001010>;
894 class SHF_B_ENC : MSA_I8_FMT<0b00, 0b000010>;
895 class SHF_H_ENC : MSA_I8_FMT<0b01, 0b000010>;
896 class SHF_W_ENC : MSA_I8_FMT<0b10, 0b000010>;
898 class SLD_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010100>;
899 class SLD_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010100>;
900 class SLD_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010100>;
901 class SLD_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010100>;
903 class SLDI_B_ENC : MSA_ELM_B_FMT<0b0000, 0b011001>;
904 class SLDI_H_ENC : MSA_ELM_H_FMT<0b0000, 0b011001>;
905 class SLDI_W_ENC : MSA_ELM_W_FMT<0b0000, 0b011001>;
906 class SLDI_D_ENC : MSA_ELM_D_FMT<0b0000, 0b011001>;
908 class SLL_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b001101>;
909 class SLL_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b001101>;
910 class SLL_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b001101>;
911 class SLL_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b001101>;
913 class SLLI_B_ENC : MSA_BIT_B_FMT<0b000, 0b001001>;
914 class SLLI_H_ENC : MSA_BIT_H_FMT<0b000, 0b001001>;
915 class SLLI_W_ENC : MSA_BIT_W_FMT<0b000, 0b001001>;
916 class SLLI_D_ENC : MSA_BIT_D_FMT<0b000, 0b001001>;
918 class SPLAT_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010100>;
919 class SPLAT_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010100>;
920 class SPLAT_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010100>;
921 class SPLAT_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010100>;
923 class SPLATI_B_ENC : MSA_ELM_B_FMT<0b0001, 0b011001>;
924 class SPLATI_H_ENC : MSA_ELM_H_FMT<0b0001, 0b011001>;
925 class SPLATI_W_ENC : MSA_ELM_W_FMT<0b0001, 0b011001>;
926 class SPLATI_D_ENC : MSA_ELM_D_FMT<0b0001, 0b011001>;
928 class SRA_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001101>;
929 class SRA_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001101>;
930 class SRA_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001101>;
931 class SRA_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001101>;
933 class SRAI_B_ENC : MSA_BIT_B_FMT<0b001, 0b001001>;
934 class SRAI_H_ENC : MSA_BIT_H_FMT<0b001, 0b001001>;
935 class SRAI_W_ENC : MSA_BIT_W_FMT<0b001, 0b001001>;
936 class SRAI_D_ENC : MSA_BIT_D_FMT<0b001, 0b001001>;
938 class SRAR_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010101>;
939 class SRAR_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010101>;
940 class SRAR_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010101>;
941 class SRAR_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010101>;
943 class SRARI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001010>;
944 class SRARI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001010>;
945 class SRARI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001010>;
946 class SRARI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001010>;
948 class SRL_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b001101>;
949 class SRL_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b001101>;
950 class SRL_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b001101>;
951 class SRL_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b001101>;
953 class SRLI_B_ENC : MSA_BIT_B_FMT<0b010, 0b001001>;
954 class SRLI_H_ENC : MSA_BIT_H_FMT<0b010, 0b001001>;
955 class SRLI_W_ENC : MSA_BIT_W_FMT<0b010, 0b001001>;
956 class SRLI_D_ENC : MSA_BIT_D_FMT<0b010, 0b001001>;
958 class SRLR_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010101>;
959 class SRLR_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010101>;
960 class SRLR_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010101>;
961 class SRLR_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010101>;
963 class SRLRI_B_ENC : MSA_BIT_B_FMT<0b011, 0b001010>;
964 class SRLRI_H_ENC : MSA_BIT_H_FMT<0b011, 0b001010>;
965 class SRLRI_W_ENC : MSA_BIT_W_FMT<0b011, 0b001010>;
966 class SRLRI_D_ENC : MSA_BIT_D_FMT<0b011, 0b001010>;
968 class ST_B_ENC : MSA_I5_FMT<0b111, 0b00, 0b000111>;
969 class ST_H_ENC : MSA_I5_FMT<0b111, 0b01, 0b000111>;
970 class ST_W_ENC : MSA_I5_FMT<0b111, 0b10, 0b000111>;
971 class ST_D_ENC : MSA_I5_FMT<0b111, 0b11, 0b000111>;
973 class STX_B_ENC : MSA_3R_FMT<0b111, 0b00, 0b001111>;
974 class STX_H_ENC : MSA_3R_FMT<0b111, 0b01, 0b001111>;
975 class STX_W_ENC : MSA_3R_FMT<0b111, 0b10, 0b001111>;
976 class STX_D_ENC : MSA_3R_FMT<0b111, 0b11, 0b001111>;
978 class SUBS_S_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010001>;
979 class SUBS_S_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010001>;
980 class SUBS_S_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010001>;
981 class SUBS_S_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010001>;
983 class SUBS_U_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b010001>;
984 class SUBS_U_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b010001>;
985 class SUBS_U_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b010001>;
986 class SUBS_U_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b010001>;
988 class SUBSUS_U_B_ENC : MSA_3R_FMT<0b010, 0b00, 0b010001>;
989 class SUBSUS_U_H_ENC : MSA_3R_FMT<0b010, 0b01, 0b010001>;
990 class SUBSUS_U_W_ENC : MSA_3R_FMT<0b010, 0b10, 0b010001>;
991 class SUBSUS_U_D_ENC : MSA_3R_FMT<0b010, 0b11, 0b010001>;
993 class SUBSUU_S_B_ENC : MSA_3R_FMT<0b011, 0b00, 0b010001>;
994 class SUBSUU_S_H_ENC : MSA_3R_FMT<0b011, 0b01, 0b010001>;
995 class SUBSUU_S_W_ENC : MSA_3R_FMT<0b011, 0b10, 0b010001>;
996 class SUBSUU_S_D_ENC : MSA_3R_FMT<0b011, 0b11, 0b010001>;
998 class SUBV_B_ENC : MSA_3R_FMT<0b001, 0b00, 0b001110>;
999 class SUBV_H_ENC : MSA_3R_FMT<0b001, 0b01, 0b001110>;
1000 class SUBV_W_ENC : MSA_3R_FMT<0b001, 0b10, 0b001110>;
1001 class SUBV_D_ENC : MSA_3R_FMT<0b001, 0b11, 0b001110>;
1003 class SUBVI_B_ENC : MSA_I5_FMT<0b001, 0b00, 0b000110>;
1004 class SUBVI_H_ENC : MSA_I5_FMT<0b001, 0b01, 0b000110>;
1005 class SUBVI_W_ENC : MSA_I5_FMT<0b001, 0b10, 0b000110>;
1006 class SUBVI_D_ENC : MSA_I5_FMT<0b001, 0b11, 0b000110>;
1008 class VSHF_B_ENC : MSA_3R_FMT<0b000, 0b00, 0b010101>;
1009 class VSHF_H_ENC : MSA_3R_FMT<0b000, 0b01, 0b010101>;
1010 class VSHF_W_ENC : MSA_3R_FMT<0b000, 0b10, 0b010101>;
1011 class VSHF_D_ENC : MSA_3R_FMT<0b000, 0b11, 0b010101>;
1013 class XOR_V_ENC : MSA_VEC_FMT<0b00011, 0b011110>;
1015 class XORI_B_ENC : MSA_I8_FMT<0b11, 0b000000>;
1017 // Instruction desc.
1018 class MSA_BIT_B_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1019 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1020 InstrItinClass itin = NoItinerary> {
1021 dag OutOperandList = (outs RCWD:$wd);
1022 dag InOperandList = (ins RCWS:$ws, uimm3:$u3);
1023 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u3");
1024 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt3:$u3))];
1025 InstrItinClass Itinerary = itin;
1028 class MSA_BIT_H_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1029 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1030 InstrItinClass itin = NoItinerary> {
1031 dag OutOperandList = (outs RCWD:$wd);
1032 dag InOperandList = (ins RCWS:$ws, uimm4:$u4);
1033 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u4");
1034 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt4:$u4))];
1035 InstrItinClass Itinerary = itin;
1038 class MSA_BIT_W_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1039 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1040 InstrItinClass itin = NoItinerary> {
1041 dag OutOperandList = (outs RCWD:$wd);
1042 dag InOperandList = (ins RCWS:$ws, uimm5:$u5);
1043 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u5");
1044 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt5:$u5))];
1045 InstrItinClass Itinerary = itin;
1048 class MSA_BIT_D_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1049 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1050 InstrItinClass itin = NoItinerary> {
1051 dag OutOperandList = (outs RCWD:$wd);
1052 dag InOperandList = (ins RCWS:$ws, uimm6:$u6);
1053 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u6");
1054 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt6:$u6))];
1055 InstrItinClass Itinerary = itin;
1058 class MSA_BIT_SPLAT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1059 SplatComplexPattern SplatImm, RegisterClass RCWD,
1060 RegisterClass RCWS = RCWD,
1061 InstrItinClass itin = NoItinerary> {
1062 dag OutOperandList = (outs RCWD:$wd);
1063 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u);
1064 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u");
1065 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u))];
1066 InstrItinClass Itinerary = itin;
1069 class MSA_COPY_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1070 ValueType VecTy, RegisterClass RCD, RegisterClass RCWS,
1071 InstrItinClass itin = NoItinerary> {
1072 dag OutOperandList = (outs RCD:$rd);
1073 dag InOperandList = (ins RCWS:$ws, uimm4:$n);
1074 string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]");
1075 list<dag> Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))];
1076 InstrItinClass Itinerary = itin;
1079 class MSA_COPY_PSEUDO_BASE<SDPatternOperator OpNode, ValueType VecTy,
1080 RegisterClass RCD, RegisterClass RCWS> :
1081 MipsPseudo<(outs RCD:$wd), (ins RCWS:$ws, uimm4:$n),
1082 [(set RCD:$wd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]> {
1083 bit usesCustomInserter = 1;
1086 class MSA_I5_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1087 SplatComplexPattern SplatImm, RegisterClass RCWD,
1088 RegisterClass RCWS = RCWD,
1089 InstrItinClass itin = NoItinerary> {
1090 dag OutOperandList = (outs RCWD:$wd);
1091 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$imm);
1092 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $imm");
1093 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$imm))];
1094 InstrItinClass Itinerary = itin;
1097 class MSA_I8_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1098 SplatComplexPattern SplatImm, RegisterClass RCWD,
1099 RegisterClass RCWS = RCWD,
1100 InstrItinClass itin = NoItinerary> {
1101 dag OutOperandList = (outs RCWD:$wd);
1102 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u8);
1103 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1104 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, SplatImm:$u8))];
1105 InstrItinClass Itinerary = itin;
1108 // This class is deprecated and will be removed in the next few patches
1109 class MSA_I8_X_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1110 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1111 InstrItinClass itin = NoItinerary> {
1112 dag OutOperandList = (outs RCWD:$wd);
1113 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
1114 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1115 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, immZExt8:$u8))];
1116 InstrItinClass Itinerary = itin;
1119 class MSA_I8_SHF_DESC_BASE<string instr_asm, RegisterClass RCWD,
1120 RegisterClass RCWS = RCWD,
1121 InstrItinClass itin = NoItinerary> {
1122 dag OutOperandList = (outs RCWD:$wd);
1123 dag InOperandList = (ins RCWS:$ws, uimm8:$u8);
1124 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $u8");
1125 list<dag> Pattern = [(set RCWD:$wd, (MipsSHF immZExt8:$u8, RCWS:$ws))];
1126 InstrItinClass Itinerary = itin;
1129 class MSA_I10_LDI_DESC_BASE<string instr_asm, RegisterClass RCWD,
1130 InstrItinClass itin = NoItinerary> {
1131 dag OutOperandList = (outs RCWD:$wd);
1132 dag InOperandList = (ins vsplat_simm10:$i10);
1133 string AsmString = !strconcat(instr_asm, "\t$wd, $i10");
1134 // LDI is matched using custom matching code in MipsSEISelDAGToDAG.cpp
1135 list<dag> Pattern = [];
1136 bit hasSideEffects = 0;
1137 InstrItinClass Itinerary = itin;
1140 class MSA_2R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1141 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1142 InstrItinClass itin = NoItinerary> {
1143 dag OutOperandList = (outs RCWD:$wd);
1144 dag InOperandList = (ins RCWS:$ws);
1145 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1146 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws))];
1147 InstrItinClass Itinerary = itin;
1150 class MSA_2R_FILL_DESC_BASE<string instr_asm, ValueType VT,
1151 SDPatternOperator OpNode, RegisterClass RCWD,
1152 RegisterClass RCWS = RCWD,
1153 InstrItinClass itin = NoItinerary> {
1154 dag OutOperandList = (outs RCWD:$wd);
1155 dag InOperandList = (ins RCWS:$ws);
1156 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1157 list<dag> Pattern = [(set RCWD:$wd, (VT (OpNode RCWS:$ws)))];
1158 InstrItinClass Itinerary = itin;
1161 class MSA_2RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1162 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1163 InstrItinClass itin = NoItinerary> {
1164 dag OutOperandList = (outs ROWD:$wd);
1165 dag InOperandList = (ins ROWS:$ws);
1166 string AsmString = !strconcat(instr_asm, "\t$wd, $ws");
1167 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws))];
1168 InstrItinClass Itinerary = itin;
1171 class MSA_3R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1172 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1173 RegisterOperand ROWT = ROWD,
1174 InstrItinClass itin = NoItinerary> {
1175 dag OutOperandList = (outs ROWD:$wd);
1176 dag InOperandList = (ins ROWS:$ws, ROWT:$wt);
1177 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1178 list<dag> Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, ROWT:$wt))];
1179 InstrItinClass Itinerary = itin;
1182 class MSA_3R_VSHF_DESC_BASE<string instr_asm, RegisterOperand ROWD,
1183 RegisterOperand ROWS = ROWD,
1184 RegisterOperand ROWT = ROWD,
1185 InstrItinClass itin = NoItinerary> {
1186 dag OutOperandList = (outs ROWD:$wd);
1187 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1188 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1189 list<dag> Pattern = [(set ROWD:$wd, (MipsVSHF ROWD:$wd_in, ROWS:$ws,
1191 string Constraints = "$wd = $wd_in";
1192 InstrItinClass Itinerary = itin;
1195 class MSA_3R_4R_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1196 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1197 RegisterOperand ROWT = ROWD,
1198 InstrItinClass itin = NoItinerary> {
1199 dag OutOperandList = (outs ROWD:$wd);
1200 dag InOperandList = (ins ROWD:$wd_in, ROWS:$ws, ROWT:$wt);
1201 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1202 list<dag> Pattern = [(set ROWD:$wd,
1203 (OpNode ROWD:$wd_in, ROWS:$ws, ROWT:$wt))];
1204 InstrItinClass Itinerary = itin;
1205 string Constraints = "$wd = $wd_in";
1208 class MSA_3RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1209 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1210 RegisterOperand ROWT = ROWD,
1211 InstrItinClass itin = NoItinerary> :
1212 MSA_3R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1214 class MSA_3RF_4RF_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1215 RegisterOperand ROWD, RegisterOperand ROWS = ROWD,
1216 RegisterOperand ROWT = ROWD,
1217 InstrItinClass itin = NoItinerary> :
1218 MSA_3R_4R_DESC_BASE<instr_asm, OpNode, ROWD, ROWS, ROWT, itin>;
1220 class MSA_CBRANCH_DESC_BASE<string instr_asm, RegisterClass RCWD> {
1221 dag OutOperandList = (outs);
1222 dag InOperandList = (ins RCWD:$wd, brtarget:$offset);
1223 string AsmString = !strconcat(instr_asm, "\t$wd, $offset");
1224 list<dag> Pattern = [];
1225 InstrItinClass Itinerary = IIBranch;
1227 bit isTerminator = 1;
1228 bit hasDelaySlot = 1;
1229 list<Register> Defs = [AT];
1232 class MSA_INSERT_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1233 RegisterClass RCD, RegisterClass RCWS,
1234 InstrItinClass itin = NoItinerary> {
1235 dag OutOperandList = (outs RCD:$wd);
1236 dag InOperandList = (ins RCD:$wd_in, RCWS:$rs, uimm6:$n);
1237 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $rs");
1238 list<dag> Pattern = [(set RCD:$wd, (OpNode RCD:$wd_in,
1241 InstrItinClass Itinerary = itin;
1242 string Constraints = "$wd = $wd_in";
1245 class MSA_INSVE_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1246 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1247 InstrItinClass itin = NoItinerary> {
1248 dag OutOperandList = (outs RCWD:$wd);
1249 dag InOperandList = (ins RCWD:$wd_in, uimm6:$n, RCWS:$ws);
1250 string AsmString = !strconcat(instr_asm, "\t$wd[$n], $ws[0]");
1251 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWD:$wd_in,
1254 InstrItinClass Itinerary = itin;
1255 string Constraints = "$wd = $wd_in";
1258 class MSA_VEC_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1259 RegisterClass RCWD, RegisterClass RCWS = RCWD,
1260 RegisterClass RCWT = RCWD,
1261 InstrItinClass itin = NoItinerary> {
1262 dag OutOperandList = (outs RCWD:$wd);
1263 dag InOperandList = (ins RCWS:$ws, RCWT:$wt);
1264 string AsmString = !strconcat(instr_asm, "\t$wd, $ws, $wt");
1265 list<dag> Pattern = [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))];
1266 InstrItinClass Itinerary = itin;
1269 class MSA_ELM_SPLAT_DESC_BASE<string instr_asm, SplatComplexPattern SplatImm,
1271 RegisterClass RCWS = RCWD,
1272 InstrItinClass itin = NoItinerary> {
1273 dag OutOperandList = (outs RCWD:$wd);
1274 dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u3);
1275 string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$u3]");
1276 list<dag> Pattern = [(set RCWD:$wd, (MipsVSHF SplatImm:$u3, RCWS:$ws,
1278 InstrItinClass Itinerary = itin;
1281 class MSA_VEC_PSEUDO_BASE<SDPatternOperator OpNode, RegisterClass RCWD,
1282 RegisterClass RCWS = RCWD,
1283 RegisterClass RCWT = RCWD> :
1284 MipsPseudo<(outs RCWD:$wd), (ins RCWS:$ws, RCWT:$wt),
1285 [(set RCWD:$wd, (OpNode RCWS:$ws, RCWT:$wt))]>;
1287 class ADD_A_B_DESC : MSA_3R_DESC_BASE<"add_a.b", int_mips_add_a_b, MSA128BOpnd>,
1289 class ADD_A_H_DESC : MSA_3R_DESC_BASE<"add_a.h", int_mips_add_a_h, MSA128HOpnd>,
1291 class ADD_A_W_DESC : MSA_3R_DESC_BASE<"add_a.w", int_mips_add_a_w, MSA128WOpnd>,
1293 class ADD_A_D_DESC : MSA_3R_DESC_BASE<"add_a.d", int_mips_add_a_d, MSA128DOpnd>,
1296 class ADDS_A_B_DESC : MSA_3R_DESC_BASE<"adds_a.b", int_mips_adds_a_b,
1297 MSA128BOpnd>, IsCommutable;
1298 class ADDS_A_H_DESC : MSA_3R_DESC_BASE<"adds_a.h", int_mips_adds_a_h,
1299 MSA128HOpnd>, IsCommutable;
1300 class ADDS_A_W_DESC : MSA_3R_DESC_BASE<"adds_a.w", int_mips_adds_a_w,
1301 MSA128WOpnd>, IsCommutable;
1302 class ADDS_A_D_DESC : MSA_3R_DESC_BASE<"adds_a.d", int_mips_adds_a_d,
1303 MSA128DOpnd>, IsCommutable;
1305 class ADDS_S_B_DESC : MSA_3R_DESC_BASE<"adds_s.b", int_mips_adds_s_b,
1306 MSA128BOpnd>, IsCommutable;
1307 class ADDS_S_H_DESC : MSA_3R_DESC_BASE<"adds_s.h", int_mips_adds_s_h,
1308 MSA128HOpnd>, IsCommutable;
1309 class ADDS_S_W_DESC : MSA_3R_DESC_BASE<"adds_s.w", int_mips_adds_s_w,
1310 MSA128WOpnd>, IsCommutable;
1311 class ADDS_S_D_DESC : MSA_3R_DESC_BASE<"adds_s.d", int_mips_adds_s_d,
1312 MSA128DOpnd>, IsCommutable;
1314 class ADDS_U_B_DESC : MSA_3R_DESC_BASE<"adds_u.b", int_mips_adds_u_b,
1315 MSA128BOpnd>, IsCommutable;
1316 class ADDS_U_H_DESC : MSA_3R_DESC_BASE<"adds_u.h", int_mips_adds_u_h,
1317 MSA128HOpnd>, IsCommutable;
1318 class ADDS_U_W_DESC : MSA_3R_DESC_BASE<"adds_u.w", int_mips_adds_u_w,
1319 MSA128WOpnd>, IsCommutable;
1320 class ADDS_U_D_DESC : MSA_3R_DESC_BASE<"adds_u.d", int_mips_adds_u_d,
1321 MSA128DOpnd>, IsCommutable;
1323 class ADDV_B_DESC : MSA_3R_DESC_BASE<"addv.b", add, MSA128BOpnd>, IsCommutable;
1324 class ADDV_H_DESC : MSA_3R_DESC_BASE<"addv.h", add, MSA128HOpnd>, IsCommutable;
1325 class ADDV_W_DESC : MSA_3R_DESC_BASE<"addv.w", add, MSA128WOpnd>, IsCommutable;
1326 class ADDV_D_DESC : MSA_3R_DESC_BASE<"addv.d", add, MSA128DOpnd>, IsCommutable;
1328 class ADDVI_B_DESC : MSA_I5_DESC_BASE<"addvi.b", add, vsplati8_uimm5, MSA128B>;
1329 class ADDVI_H_DESC : MSA_I5_DESC_BASE<"addvi.h", add, vsplati16_uimm5, MSA128H>;
1330 class ADDVI_W_DESC : MSA_I5_DESC_BASE<"addvi.w", add, vsplati32_uimm5, MSA128W>;
1331 class ADDVI_D_DESC : MSA_I5_DESC_BASE<"addvi.d", add, vsplati64_uimm5, MSA128D>;
1333 class AND_V_DESC : MSA_VEC_DESC_BASE<"and.v", and, MSA128B>;
1334 class AND_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128H>;
1335 class AND_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128W>;
1336 class AND_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<and, MSA128D>;
1338 class ANDI_B_DESC : MSA_I8_DESC_BASE<"andi.b", and, vsplati8_uimm8, MSA128B>;
1340 class ASUB_S_B_DESC : MSA_3R_DESC_BASE<"asub_s.b", int_mips_asub_s_b,
1342 class ASUB_S_H_DESC : MSA_3R_DESC_BASE<"asub_s.h", int_mips_asub_s_h,
1344 class ASUB_S_W_DESC : MSA_3R_DESC_BASE<"asub_s.w", int_mips_asub_s_w,
1346 class ASUB_S_D_DESC : MSA_3R_DESC_BASE<"asub_s.d", int_mips_asub_s_d,
1349 class ASUB_U_B_DESC : MSA_3R_DESC_BASE<"asub_u.b", int_mips_asub_u_b,
1351 class ASUB_U_H_DESC : MSA_3R_DESC_BASE<"asub_u.h", int_mips_asub_u_h,
1353 class ASUB_U_W_DESC : MSA_3R_DESC_BASE<"asub_u.w", int_mips_asub_u_w,
1355 class ASUB_U_D_DESC : MSA_3R_DESC_BASE<"asub_u.d", int_mips_asub_u_d,
1358 class AVE_S_B_DESC : MSA_3R_DESC_BASE<"ave_s.b", int_mips_ave_s_b, MSA128BOpnd>,
1360 class AVE_S_H_DESC : MSA_3R_DESC_BASE<"ave_s.h", int_mips_ave_s_h, MSA128HOpnd>,
1362 class AVE_S_W_DESC : MSA_3R_DESC_BASE<"ave_s.w", int_mips_ave_s_w, MSA128WOpnd>,
1364 class AVE_S_D_DESC : MSA_3R_DESC_BASE<"ave_s.d", int_mips_ave_s_d, MSA128DOpnd>,
1367 class AVE_U_B_DESC : MSA_3R_DESC_BASE<"ave_u.b", int_mips_ave_u_b, MSA128BOpnd>,
1369 class AVE_U_H_DESC : MSA_3R_DESC_BASE<"ave_u.h", int_mips_ave_u_h, MSA128HOpnd>,
1371 class AVE_U_W_DESC : MSA_3R_DESC_BASE<"ave_u.w", int_mips_ave_u_w, MSA128WOpnd>,
1373 class AVE_U_D_DESC : MSA_3R_DESC_BASE<"ave_u.d", int_mips_ave_u_d, MSA128DOpnd>,
1376 class AVER_S_B_DESC : MSA_3R_DESC_BASE<"aver_s.b", int_mips_aver_s_b,
1377 MSA128BOpnd>, IsCommutable;
1378 class AVER_S_H_DESC : MSA_3R_DESC_BASE<"aver_s.h", int_mips_aver_s_h,
1379 MSA128HOpnd>, IsCommutable;
1380 class AVER_S_W_DESC : MSA_3R_DESC_BASE<"aver_s.w", int_mips_aver_s_w,
1381 MSA128WOpnd>, IsCommutable;
1382 class AVER_S_D_DESC : MSA_3R_DESC_BASE<"aver_s.d", int_mips_aver_s_d,
1383 MSA128DOpnd>, IsCommutable;
1385 class AVER_U_B_DESC : MSA_3R_DESC_BASE<"aver_u.b", int_mips_aver_u_b,
1386 MSA128BOpnd>, IsCommutable;
1387 class AVER_U_H_DESC : MSA_3R_DESC_BASE<"aver_u.h", int_mips_aver_u_h,
1388 MSA128HOpnd>, IsCommutable;
1389 class AVER_U_W_DESC : MSA_3R_DESC_BASE<"aver_u.w", int_mips_aver_u_w,
1390 MSA128WOpnd>, IsCommutable;
1391 class AVER_U_D_DESC : MSA_3R_DESC_BASE<"aver_u.d", int_mips_aver_u_d,
1392 MSA128DOpnd>, IsCommutable;
1394 class BCLR_B_DESC : MSA_3R_DESC_BASE<"bclr.b", int_mips_bclr_b, MSA128BOpnd>;
1395 class BCLR_H_DESC : MSA_3R_DESC_BASE<"bclr.h", int_mips_bclr_h, MSA128HOpnd>;
1396 class BCLR_W_DESC : MSA_3R_DESC_BASE<"bclr.w", int_mips_bclr_w, MSA128WOpnd>;
1397 class BCLR_D_DESC : MSA_3R_DESC_BASE<"bclr.d", int_mips_bclr_d, MSA128DOpnd>;
1399 class BCLRI_B_DESC : MSA_BIT_B_DESC_BASE<"bclri.b", int_mips_bclri_b, MSA128B>;
1400 class BCLRI_H_DESC : MSA_BIT_H_DESC_BASE<"bclri.h", int_mips_bclri_h, MSA128H>;
1401 class BCLRI_W_DESC : MSA_BIT_W_DESC_BASE<"bclri.w", int_mips_bclri_w, MSA128W>;
1402 class BCLRI_D_DESC : MSA_BIT_D_DESC_BASE<"bclri.d", int_mips_bclri_d, MSA128D>;
1404 class BINSL_B_DESC : MSA_3R_DESC_BASE<"binsl.b", int_mips_binsl_b, MSA128BOpnd>;
1405 class BINSL_H_DESC : MSA_3R_DESC_BASE<"binsl.h", int_mips_binsl_h, MSA128HOpnd>;
1406 class BINSL_W_DESC : MSA_3R_DESC_BASE<"binsl.w", int_mips_binsl_w, MSA128WOpnd>;
1407 class BINSL_D_DESC : MSA_3R_DESC_BASE<"binsl.d", int_mips_binsl_d, MSA128DOpnd>;
1409 class BINSLI_B_DESC : MSA_BIT_B_DESC_BASE<"binsli.b", int_mips_binsli_b,
1411 class BINSLI_H_DESC : MSA_BIT_H_DESC_BASE<"binsli.h", int_mips_binsli_h,
1413 class BINSLI_W_DESC : MSA_BIT_W_DESC_BASE<"binsli.w", int_mips_binsli_w,
1415 class BINSLI_D_DESC : MSA_BIT_D_DESC_BASE<"binsli.d", int_mips_binsli_d,
1418 class BINSR_B_DESC : MSA_3R_DESC_BASE<"binsr.b", int_mips_binsr_b, MSA128BOpnd>;
1419 class BINSR_H_DESC : MSA_3R_DESC_BASE<"binsr.h", int_mips_binsr_h, MSA128HOpnd>;
1420 class BINSR_W_DESC : MSA_3R_DESC_BASE<"binsr.w", int_mips_binsr_w, MSA128WOpnd>;
1421 class BINSR_D_DESC : MSA_3R_DESC_BASE<"binsr.d", int_mips_binsr_d, MSA128DOpnd>;
1423 class BINSRI_B_DESC : MSA_BIT_B_DESC_BASE<"binsri.b", int_mips_binsri_b,
1425 class BINSRI_H_DESC : MSA_BIT_H_DESC_BASE<"binsri.h", int_mips_binsri_h,
1427 class BINSRI_W_DESC : MSA_BIT_W_DESC_BASE<"binsri.w", int_mips_binsri_w,
1429 class BINSRI_D_DESC : MSA_BIT_D_DESC_BASE<"binsri.d", int_mips_binsri_d,
1432 class BMNZ_V_DESC : MSA_VEC_DESC_BASE<"bmnz.v", int_mips_bmnz_v, MSA128B>;
1434 class BMNZI_B_DESC : MSA_I8_X_DESC_BASE<"bmnzi.b", int_mips_bmnzi_b, MSA128B>;
1436 class BMZ_V_DESC : MSA_VEC_DESC_BASE<"bmz.v", int_mips_bmz_v, MSA128B>;
1438 class BMZI_B_DESC : MSA_I8_X_DESC_BASE<"bmzi.b", int_mips_bmzi_b, MSA128B>;
1440 class BNEG_B_DESC : MSA_3R_DESC_BASE<"bneg.b", int_mips_bneg_b, MSA128BOpnd>;
1441 class BNEG_H_DESC : MSA_3R_DESC_BASE<"bneg.h", int_mips_bneg_h, MSA128HOpnd>;
1442 class BNEG_W_DESC : MSA_3R_DESC_BASE<"bneg.w", int_mips_bneg_w, MSA128WOpnd>;
1443 class BNEG_D_DESC : MSA_3R_DESC_BASE<"bneg.d", int_mips_bneg_d, MSA128DOpnd>;
1445 class BNEGI_B_DESC : MSA_BIT_B_DESC_BASE<"bnegi.b", int_mips_bnegi_b, MSA128B>;
1446 class BNEGI_H_DESC : MSA_BIT_H_DESC_BASE<"bnegi.h", int_mips_bnegi_h, MSA128H>;
1447 class BNEGI_W_DESC : MSA_BIT_W_DESC_BASE<"bnegi.w", int_mips_bnegi_w, MSA128W>;
1448 class BNEGI_D_DESC : MSA_BIT_D_DESC_BASE<"bnegi.d", int_mips_bnegi_d, MSA128D>;
1450 class BNZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bnz.b", MSA128B>;
1451 class BNZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bnz.h", MSA128H>;
1452 class BNZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bnz.w", MSA128W>;
1453 class BNZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bnz.d", MSA128D>;
1455 class BNZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bnz.v", MSA128B>;
1458 dag OutOperandList = (outs MSA128B:$wd);
1459 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, MSA128B:$wt);
1460 string AsmString = "bsel.v\t$wd, $ws, $wt";
1461 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in, MSA128B:$ws,
1463 InstrItinClass Itinerary = NoItinerary;
1464 string Constraints = "$wd = $wd_in";
1467 class BSELI_B_DESC {
1468 dag OutOperandList = (outs MSA128B:$wd);
1469 dag InOperandList = (ins MSA128B:$wd_in, MSA128B:$ws, vsplat_uimm8:$u8);
1470 string AsmString = "bseli.b\t$wd, $ws, $u8";
1471 list<dag> Pattern = [(set MSA128B:$wd, (vselect MSA128B:$wd_in,
1473 vsplati8_uimm8:$u8))];
1474 InstrItinClass Itinerary = NoItinerary;
1475 string Constraints = "$wd = $wd_in";
1478 class BSET_B_DESC : MSA_3R_DESC_BASE<"bset.b", int_mips_bset_b, MSA128BOpnd>;
1479 class BSET_H_DESC : MSA_3R_DESC_BASE<"bset.h", int_mips_bset_h, MSA128HOpnd>;
1480 class BSET_W_DESC : MSA_3R_DESC_BASE<"bset.w", int_mips_bset_w, MSA128WOpnd>;
1481 class BSET_D_DESC : MSA_3R_DESC_BASE<"bset.d", int_mips_bset_d, MSA128DOpnd>;
1483 class BSETI_B_DESC : MSA_BIT_B_DESC_BASE<"bseti.b", int_mips_bseti_b, MSA128B>;
1484 class BSETI_H_DESC : MSA_BIT_H_DESC_BASE<"bseti.h", int_mips_bseti_h, MSA128H>;
1485 class BSETI_W_DESC : MSA_BIT_W_DESC_BASE<"bseti.w", int_mips_bseti_w, MSA128W>;
1486 class BSETI_D_DESC : MSA_BIT_D_DESC_BASE<"bseti.d", int_mips_bseti_d, MSA128D>;
1488 class BZ_B_DESC : MSA_CBRANCH_DESC_BASE<"bz.b", MSA128B>;
1489 class BZ_H_DESC : MSA_CBRANCH_DESC_BASE<"bz.h", MSA128H>;
1490 class BZ_W_DESC : MSA_CBRANCH_DESC_BASE<"bz.w", MSA128W>;
1491 class BZ_D_DESC : MSA_CBRANCH_DESC_BASE<"bz.d", MSA128D>;
1493 class BZ_V_DESC : MSA_CBRANCH_DESC_BASE<"bz.v", MSA128B>;
1495 class CEQ_B_DESC : MSA_3R_DESC_BASE<"ceq.b", vseteq_v16i8, MSA128BOpnd>,
1497 class CEQ_H_DESC : MSA_3R_DESC_BASE<"ceq.h", vseteq_v8i16, MSA128HOpnd>,
1499 class CEQ_W_DESC : MSA_3R_DESC_BASE<"ceq.w", vseteq_v4i32, MSA128WOpnd>,
1501 class CEQ_D_DESC : MSA_3R_DESC_BASE<"ceq.d", vseteq_v2i64, MSA128DOpnd>,
1504 class CEQI_B_DESC : MSA_I5_DESC_BASE<"ceqi.b", vseteq_v16i8, vsplati8_simm5,
1506 class CEQI_H_DESC : MSA_I5_DESC_BASE<"ceqi.h", vseteq_v8i16, vsplati16_simm5,
1508 class CEQI_W_DESC : MSA_I5_DESC_BASE<"ceqi.w", vseteq_v4i32, vsplati32_simm5,
1510 class CEQI_D_DESC : MSA_I5_DESC_BASE<"ceqi.d", vseteq_v2i64, vsplati64_simm5,
1514 dag OutOperandList = (outs GPR32:$rd);
1515 dag InOperandList = (ins MSACtrl:$cs);
1516 string AsmString = "cfcmsa\t$rd, $cs";
1517 InstrItinClass Itinerary = NoItinerary;
1518 bit hasSideEffects = 1;
1521 class CLE_S_B_DESC : MSA_3R_DESC_BASE<"cle_s.b", vsetle_v16i8, MSA128BOpnd>;
1522 class CLE_S_H_DESC : MSA_3R_DESC_BASE<"cle_s.h", vsetle_v8i16, MSA128HOpnd>;
1523 class CLE_S_W_DESC : MSA_3R_DESC_BASE<"cle_s.w", vsetle_v4i32, MSA128WOpnd>;
1524 class CLE_S_D_DESC : MSA_3R_DESC_BASE<"cle_s.d", vsetle_v2i64, MSA128DOpnd>;
1526 class CLE_U_B_DESC : MSA_3R_DESC_BASE<"cle_u.b", vsetule_v16i8, MSA128BOpnd>;
1527 class CLE_U_H_DESC : MSA_3R_DESC_BASE<"cle_u.h", vsetule_v8i16, MSA128HOpnd>;
1528 class CLE_U_W_DESC : MSA_3R_DESC_BASE<"cle_u.w", vsetule_v4i32, MSA128WOpnd>;
1529 class CLE_U_D_DESC : MSA_3R_DESC_BASE<"cle_u.d", vsetule_v2i64, MSA128DOpnd>;
1531 class CLEI_S_B_DESC : MSA_I5_DESC_BASE<"clei_s.b", vsetle_v16i8,
1532 vsplati8_simm5, MSA128B>;
1533 class CLEI_S_H_DESC : MSA_I5_DESC_BASE<"clei_s.h", vsetle_v8i16,
1534 vsplati16_simm5, MSA128H>;
1535 class CLEI_S_W_DESC : MSA_I5_DESC_BASE<"clei_s.w", vsetle_v4i32,
1536 vsplati32_simm5, MSA128W>;
1537 class CLEI_S_D_DESC : MSA_I5_DESC_BASE<"clei_s.d", vsetle_v2i64,
1538 vsplati64_simm5, MSA128D>;
1540 class CLEI_U_B_DESC : MSA_I5_DESC_BASE<"clei_u.b", vsetule_v16i8,
1541 vsplati8_uimm5, MSA128B>;
1542 class CLEI_U_H_DESC : MSA_I5_DESC_BASE<"clei_u.h", vsetule_v8i16,
1543 vsplati16_uimm5, MSA128H>;
1544 class CLEI_U_W_DESC : MSA_I5_DESC_BASE<"clei_u.w", vsetule_v4i32,
1545 vsplati32_uimm5, MSA128W>;
1546 class CLEI_U_D_DESC : MSA_I5_DESC_BASE<"clei_u.d", vsetule_v2i64,
1547 vsplati64_uimm5, MSA128D>;
1549 class CLT_S_B_DESC : MSA_3R_DESC_BASE<"clt_s.b", vsetlt_v16i8, MSA128BOpnd>;
1550 class CLT_S_H_DESC : MSA_3R_DESC_BASE<"clt_s.h", vsetlt_v8i16, MSA128HOpnd>;
1551 class CLT_S_W_DESC : MSA_3R_DESC_BASE<"clt_s.w", vsetlt_v4i32, MSA128WOpnd>;
1552 class CLT_S_D_DESC : MSA_3R_DESC_BASE<"clt_s.d", vsetlt_v2i64, MSA128DOpnd>;
1554 class CLT_U_B_DESC : MSA_3R_DESC_BASE<"clt_u.b", vsetult_v16i8, MSA128BOpnd>;
1555 class CLT_U_H_DESC : MSA_3R_DESC_BASE<"clt_u.h", vsetult_v8i16, MSA128HOpnd>;
1556 class CLT_U_W_DESC : MSA_3R_DESC_BASE<"clt_u.w", vsetult_v4i32, MSA128WOpnd>;
1557 class CLT_U_D_DESC : MSA_3R_DESC_BASE<"clt_u.d", vsetult_v2i64, MSA128DOpnd>;
1559 class CLTI_S_B_DESC : MSA_I5_DESC_BASE<"clti_s.b", vsetlt_v16i8,
1560 vsplati8_simm5, MSA128B>;
1561 class CLTI_S_H_DESC : MSA_I5_DESC_BASE<"clti_s.h", vsetlt_v8i16,
1562 vsplati16_simm5, MSA128H>;
1563 class CLTI_S_W_DESC : MSA_I5_DESC_BASE<"clti_s.w", vsetlt_v4i32,
1564 vsplati32_simm5, MSA128W>;
1565 class CLTI_S_D_DESC : MSA_I5_DESC_BASE<"clti_s.d", vsetlt_v2i64,
1566 vsplati64_simm5, MSA128D>;
1568 class CLTI_U_B_DESC : MSA_I5_DESC_BASE<"clti_u.b", vsetult_v16i8,
1569 vsplati8_uimm5, MSA128B>;
1570 class CLTI_U_H_DESC : MSA_I5_DESC_BASE<"clti_u.h", vsetult_v8i16,
1571 vsplati16_uimm5, MSA128H>;
1572 class CLTI_U_W_DESC : MSA_I5_DESC_BASE<"clti_u.w", vsetult_v4i32,
1573 vsplati32_uimm5, MSA128W>;
1574 class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64,
1575 vsplati64_uimm5, MSA128D>;
1577 class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8,
1579 class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16,
1581 class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32,
1584 class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8,
1586 class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16,
1588 class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32,
1591 class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v4f32, FGR32,
1593 class COPY_FD_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE<vector_extract, v2f64, FGR64,
1597 dag OutOperandList = (outs);
1598 dag InOperandList = (ins MSACtrl:$cd, GPR32:$rs);
1599 string AsmString = "ctcmsa\t$cd, $rs";
1600 InstrItinClass Itinerary = NoItinerary;
1601 bit hasSideEffects = 1;
1604 class DIV_S_B_DESC : MSA_3R_DESC_BASE<"div_s.b", sdiv, MSA128BOpnd>;
1605 class DIV_S_H_DESC : MSA_3R_DESC_BASE<"div_s.h", sdiv, MSA128HOpnd>;
1606 class DIV_S_W_DESC : MSA_3R_DESC_BASE<"div_s.w", sdiv, MSA128WOpnd>;
1607 class DIV_S_D_DESC : MSA_3R_DESC_BASE<"div_s.d", sdiv, MSA128DOpnd>;
1609 class DIV_U_B_DESC : MSA_3R_DESC_BASE<"div_u.b", udiv, MSA128BOpnd>;
1610 class DIV_U_H_DESC : MSA_3R_DESC_BASE<"div_u.h", udiv, MSA128HOpnd>;
1611 class DIV_U_W_DESC : MSA_3R_DESC_BASE<"div_u.w", udiv, MSA128WOpnd>;
1612 class DIV_U_D_DESC : MSA_3R_DESC_BASE<"div_u.d", udiv, MSA128DOpnd>;
1614 class DOTP_S_H_DESC : MSA_3R_DESC_BASE<"dotp_s.h", int_mips_dotp_s_h,
1615 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1617 class DOTP_S_W_DESC : MSA_3R_DESC_BASE<"dotp_s.w", int_mips_dotp_s_w,
1618 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1620 class DOTP_S_D_DESC : MSA_3R_DESC_BASE<"dotp_s.d", int_mips_dotp_s_d,
1621 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1624 class DOTP_U_H_DESC : MSA_3R_DESC_BASE<"dotp_u.h", int_mips_dotp_u_h,
1625 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>,
1627 class DOTP_U_W_DESC : MSA_3R_DESC_BASE<"dotp_u.w", int_mips_dotp_u_w,
1628 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>,
1630 class DOTP_U_D_DESC : MSA_3R_DESC_BASE<"dotp_u.d", int_mips_dotp_u_d,
1631 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>,
1634 class DPADD_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.h", int_mips_dpadd_s_h,
1635 MSA128HOpnd, MSA128BOpnd,
1636 MSA128BOpnd>, IsCommutable;
1637 class DPADD_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.w", int_mips_dpadd_s_w,
1638 MSA128WOpnd, MSA128HOpnd,
1639 MSA128HOpnd>, IsCommutable;
1640 class DPADD_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_s.d", int_mips_dpadd_s_d,
1641 MSA128DOpnd, MSA128WOpnd,
1642 MSA128WOpnd>, IsCommutable;
1644 class DPADD_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.h", int_mips_dpadd_u_h,
1645 MSA128HOpnd, MSA128BOpnd,
1646 MSA128BOpnd>, IsCommutable;
1647 class DPADD_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.w", int_mips_dpadd_u_w,
1648 MSA128WOpnd, MSA128HOpnd,
1649 MSA128HOpnd>, IsCommutable;
1650 class DPADD_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpadd_u.d", int_mips_dpadd_u_d,
1651 MSA128DOpnd, MSA128WOpnd,
1652 MSA128WOpnd>, IsCommutable;
1654 class DPSUB_S_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.h", int_mips_dpsub_s_h,
1655 MSA128HOpnd, MSA128BOpnd,
1657 class DPSUB_S_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.w", int_mips_dpsub_s_w,
1658 MSA128WOpnd, MSA128HOpnd,
1660 class DPSUB_S_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_s.d", int_mips_dpsub_s_d,
1661 MSA128DOpnd, MSA128WOpnd,
1664 class DPSUB_U_H_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.h", int_mips_dpsub_u_h,
1665 MSA128HOpnd, MSA128BOpnd,
1667 class DPSUB_U_W_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.w", int_mips_dpsub_u_w,
1668 MSA128WOpnd, MSA128HOpnd,
1670 class DPSUB_U_D_DESC : MSA_3R_4R_DESC_BASE<"dpsub_u.d", int_mips_dpsub_u_d,
1671 MSA128DOpnd, MSA128WOpnd,
1674 class FADD_W_DESC : MSA_3RF_DESC_BASE<"fadd.w", fadd, MSA128WOpnd>,
1676 class FADD_D_DESC : MSA_3RF_DESC_BASE<"fadd.d", fadd, MSA128DOpnd>,
1679 class FCAF_W_DESC : MSA_3RF_DESC_BASE<"fcaf.w", int_mips_fcaf_w, MSA128WOpnd>,
1681 class FCAF_D_DESC : MSA_3RF_DESC_BASE<"fcaf.d", int_mips_fcaf_d, MSA128DOpnd>,
1684 class FCEQ_W_DESC : MSA_3RF_DESC_BASE<"fceq.w", vfsetoeq_v4f32, MSA128WOpnd>,
1686 class FCEQ_D_DESC : MSA_3RF_DESC_BASE<"fceq.d", vfsetoeq_v2f64, MSA128DOpnd>,
1689 class FCLASS_W_DESC : MSA_2RF_DESC_BASE<"fclass.w", int_mips_fclass_w,
1691 class FCLASS_D_DESC : MSA_2RF_DESC_BASE<"fclass.d", int_mips_fclass_d,
1694 class FCLE_W_DESC : MSA_3RF_DESC_BASE<"fcle.w", vfsetole_v4f32, MSA128WOpnd>;
1695 class FCLE_D_DESC : MSA_3RF_DESC_BASE<"fcle.d", vfsetole_v2f64, MSA128DOpnd>;
1697 class FCLT_W_DESC : MSA_3RF_DESC_BASE<"fclt.w", vfsetolt_v4f32, MSA128WOpnd>;
1698 class FCLT_D_DESC : MSA_3RF_DESC_BASE<"fclt.d", vfsetolt_v2f64, MSA128DOpnd>;
1700 class FCNE_W_DESC : MSA_3RF_DESC_BASE<"fcne.w", vfsetone_v4f32, MSA128WOpnd>,
1702 class FCNE_D_DESC : MSA_3RF_DESC_BASE<"fcne.d", vfsetone_v2f64, MSA128DOpnd>,
1705 class FCOR_W_DESC : MSA_3RF_DESC_BASE<"fcor.w", vfsetord_v4f32, MSA128WOpnd>,
1707 class FCOR_D_DESC : MSA_3RF_DESC_BASE<"fcor.d", vfsetord_v2f64, MSA128DOpnd>,
1710 class FCUEQ_W_DESC : MSA_3RF_DESC_BASE<"fcueq.w", vfsetueq_v4f32, MSA128WOpnd>,
1712 class FCUEQ_D_DESC : MSA_3RF_DESC_BASE<"fcueq.d", vfsetueq_v2f64, MSA128DOpnd>,
1715 class FCULE_W_DESC : MSA_3RF_DESC_BASE<"fcule.w", vfsetule_v4f32, MSA128WOpnd>,
1717 class FCULE_D_DESC : MSA_3RF_DESC_BASE<"fcule.d", vfsetule_v2f64, MSA128DOpnd>,
1720 class FCULT_W_DESC : MSA_3RF_DESC_BASE<"fcult.w", vfsetult_v4f32, MSA128WOpnd>,
1722 class FCULT_D_DESC : MSA_3RF_DESC_BASE<"fcult.d", vfsetult_v2f64, MSA128DOpnd>,
1725 class FCUN_W_DESC : MSA_3RF_DESC_BASE<"fcun.w", vfsetun_v4f32, MSA128WOpnd>,
1727 class FCUN_D_DESC : MSA_3RF_DESC_BASE<"fcun.d", vfsetun_v2f64, MSA128DOpnd>,
1730 class FCUNE_W_DESC : MSA_3RF_DESC_BASE<"fcune.w", vfsetune_v4f32, MSA128WOpnd>,
1732 class FCUNE_D_DESC : MSA_3RF_DESC_BASE<"fcune.d", vfsetune_v2f64, MSA128DOpnd>,
1735 class FDIV_W_DESC : MSA_3RF_DESC_BASE<"fdiv.w", fdiv, MSA128WOpnd>;
1736 class FDIV_D_DESC : MSA_3RF_DESC_BASE<"fdiv.d", fdiv, MSA128DOpnd>;
1738 class FEXDO_H_DESC : MSA_3RF_DESC_BASE<"fexdo.h", int_mips_fexdo_h,
1739 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1740 class FEXDO_W_DESC : MSA_3RF_DESC_BASE<"fexdo.w", int_mips_fexdo_w,
1741 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1743 class FEXP2_W_DESC : MSA_3RF_DESC_BASE<"fexp2.w", int_mips_fexp2_w,
1745 class FEXP2_D_DESC : MSA_3RF_DESC_BASE<"fexp2.d", int_mips_fexp2_d,
1748 class FEXUPL_W_DESC : MSA_2RF_DESC_BASE<"fexupl.w", int_mips_fexupl_w,
1749 MSA128WOpnd, MSA128HOpnd>;
1750 class FEXUPL_D_DESC : MSA_2RF_DESC_BASE<"fexupl.d", int_mips_fexupl_d,
1751 MSA128DOpnd, MSA128WOpnd>;
1753 class FEXUPR_W_DESC : MSA_2RF_DESC_BASE<"fexupr.w", int_mips_fexupr_w,
1754 MSA128WOpnd, MSA128HOpnd>;
1755 class FEXUPR_D_DESC : MSA_2RF_DESC_BASE<"fexupr.d", int_mips_fexupr_d,
1756 MSA128DOpnd, MSA128WOpnd>;
1758 class FFINT_S_W_DESC : MSA_2RF_DESC_BASE<"ffint_s.w", int_mips_ffint_s_w,
1760 class FFINT_S_D_DESC : MSA_2RF_DESC_BASE<"ffint_s.d", int_mips_ffint_s_d,
1763 class FFINT_U_W_DESC : MSA_2RF_DESC_BASE<"ffint_u.w", int_mips_ffint_u_w,
1765 class FFINT_U_D_DESC : MSA_2RF_DESC_BASE<"ffint_u.d", int_mips_ffint_u_d,
1768 class FFQL_W_DESC : MSA_2RF_DESC_BASE<"ffql.w", int_mips_ffql_w,
1769 MSA128WOpnd, MSA128HOpnd>;
1770 class FFQL_D_DESC : MSA_2RF_DESC_BASE<"ffql.d", int_mips_ffql_d,
1771 MSA128DOpnd, MSA128WOpnd>;
1773 class FFQR_W_DESC : MSA_2RF_DESC_BASE<"ffqr.w", int_mips_ffqr_w,
1774 MSA128WOpnd, MSA128HOpnd>;
1775 class FFQR_D_DESC : MSA_2RF_DESC_BASE<"ffqr.d", int_mips_ffqr_d,
1776 MSA128DOpnd, MSA128WOpnd>;
1778 class FILL_B_DESC : MSA_2R_FILL_DESC_BASE<"fill.b", v16i8, vsplati8, MSA128B,
1780 class FILL_H_DESC : MSA_2R_FILL_DESC_BASE<"fill.h", v8i16, vsplati16, MSA128H,
1782 class FILL_W_DESC : MSA_2R_FILL_DESC_BASE<"fill.w", v4i32, vsplati32, MSA128W,
1785 class FLOG2_W_DESC : MSA_2RF_DESC_BASE<"flog2.w", flog2, MSA128WOpnd>;
1786 class FLOG2_D_DESC : MSA_2RF_DESC_BASE<"flog2.d", flog2, MSA128DOpnd>;
1788 class FMADD_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.w", int_mips_fmadd_w,
1790 class FMADD_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmadd.d", int_mips_fmadd_d,
1793 class FMAX_W_DESC : MSA_3RF_DESC_BASE<"fmax.w", int_mips_fmax_w, MSA128WOpnd>;
1794 class FMAX_D_DESC : MSA_3RF_DESC_BASE<"fmax.d", int_mips_fmax_d, MSA128DOpnd>;
1796 class FMAX_A_W_DESC : MSA_3RF_DESC_BASE<"fmax_a.w", int_mips_fmax_a_w,
1798 class FMAX_A_D_DESC : MSA_3RF_DESC_BASE<"fmax_a.d", int_mips_fmax_a_d,
1801 class FMIN_W_DESC : MSA_3RF_DESC_BASE<"fmin.w", int_mips_fmin_w, MSA128WOpnd>;
1802 class FMIN_D_DESC : MSA_3RF_DESC_BASE<"fmin.d", int_mips_fmin_d, MSA128DOpnd>;
1804 class FMIN_A_W_DESC : MSA_3RF_DESC_BASE<"fmin_a.w", int_mips_fmin_a_w,
1806 class FMIN_A_D_DESC : MSA_3RF_DESC_BASE<"fmin_a.d", int_mips_fmin_a_d,
1809 class FMSUB_W_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.w", int_mips_fmsub_w,
1811 class FMSUB_D_DESC : MSA_3RF_4RF_DESC_BASE<"fmsub.d", int_mips_fmsub_d,
1814 class FMUL_W_DESC : MSA_3RF_DESC_BASE<"fmul.w", fmul, MSA128WOpnd>;
1815 class FMUL_D_DESC : MSA_3RF_DESC_BASE<"fmul.d", fmul, MSA128DOpnd>;
1817 class FRINT_W_DESC : MSA_2RF_DESC_BASE<"frint.w", frint, MSA128WOpnd>;
1818 class FRINT_D_DESC : MSA_2RF_DESC_BASE<"frint.d", frint, MSA128DOpnd>;
1820 class FRCP_W_DESC : MSA_2RF_DESC_BASE<"frcp.w", int_mips_frcp_w, MSA128WOpnd>;
1821 class FRCP_D_DESC : MSA_2RF_DESC_BASE<"frcp.d", int_mips_frcp_d, MSA128DOpnd>;
1823 class FRSQRT_W_DESC : MSA_2RF_DESC_BASE<"frsqrt.w", int_mips_frsqrt_w,
1825 class FRSQRT_D_DESC : MSA_2RF_DESC_BASE<"frsqrt.d", int_mips_frsqrt_d,
1828 class FSAF_W_DESC : MSA_3RF_DESC_BASE<"fsaf.w", int_mips_fsaf_w, MSA128WOpnd>;
1829 class FSAF_D_DESC : MSA_3RF_DESC_BASE<"fsaf.d", int_mips_fsaf_d, MSA128DOpnd>;
1831 class FSEQ_W_DESC : MSA_3RF_DESC_BASE<"fseq.w", int_mips_fseq_w, MSA128WOpnd>;
1832 class FSEQ_D_DESC : MSA_3RF_DESC_BASE<"fseq.d", int_mips_fseq_d, MSA128DOpnd>;
1834 class FSLE_W_DESC : MSA_3RF_DESC_BASE<"fsle.w", int_mips_fsle_w, MSA128WOpnd>;
1835 class FSLE_D_DESC : MSA_3RF_DESC_BASE<"fsle.d", int_mips_fsle_d, MSA128DOpnd>;
1837 class FSLT_W_DESC : MSA_3RF_DESC_BASE<"fslt.w", int_mips_fslt_w, MSA128WOpnd>;
1838 class FSLT_D_DESC : MSA_3RF_DESC_BASE<"fslt.d", int_mips_fslt_d, MSA128DOpnd>;
1840 class FSNE_W_DESC : MSA_3RF_DESC_BASE<"fsne.w", int_mips_fsne_w, MSA128WOpnd>;
1841 class FSNE_D_DESC : MSA_3RF_DESC_BASE<"fsne.d", int_mips_fsne_d, MSA128DOpnd>;
1843 class FSOR_W_DESC : MSA_3RF_DESC_BASE<"fsor.w", int_mips_fsor_w, MSA128WOpnd>;
1844 class FSOR_D_DESC : MSA_3RF_DESC_BASE<"fsor.d", int_mips_fsor_d, MSA128DOpnd>;
1846 class FSQRT_W_DESC : MSA_2RF_DESC_BASE<"fsqrt.w", fsqrt, MSA128WOpnd>;
1847 class FSQRT_D_DESC : MSA_2RF_DESC_BASE<"fsqrt.d", fsqrt, MSA128DOpnd>;
1849 class FSUB_W_DESC : MSA_3RF_DESC_BASE<"fsub.w", fsub, MSA128WOpnd>;
1850 class FSUB_D_DESC : MSA_3RF_DESC_BASE<"fsub.d", fsub, MSA128DOpnd>;
1852 class FSUEQ_W_DESC : MSA_3RF_DESC_BASE<"fsueq.w", int_mips_fsueq_w,
1854 class FSUEQ_D_DESC : MSA_3RF_DESC_BASE<"fsueq.d", int_mips_fsueq_d,
1857 class FSULE_W_DESC : MSA_3RF_DESC_BASE<"fsule.w", int_mips_fsule_w,
1859 class FSULE_D_DESC : MSA_3RF_DESC_BASE<"fsule.d", int_mips_fsule_d,
1862 class FSULT_W_DESC : MSA_3RF_DESC_BASE<"fsult.w", int_mips_fsult_w,
1864 class FSULT_D_DESC : MSA_3RF_DESC_BASE<"fsult.d", int_mips_fsult_d,
1867 class FSUN_W_DESC : MSA_3RF_DESC_BASE<"fsun.w", int_mips_fsun_w,
1869 class FSUN_D_DESC : MSA_3RF_DESC_BASE<"fsun.d", int_mips_fsun_d,
1872 class FSUNE_W_DESC : MSA_3RF_DESC_BASE<"fsune.w", int_mips_fsune_w,
1874 class FSUNE_D_DESC : MSA_3RF_DESC_BASE<"fsune.d", int_mips_fsune_d,
1877 class FTRUNC_S_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.w", int_mips_ftrunc_s_w,
1879 class FTRUNC_S_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_s.d", int_mips_ftrunc_s_d,
1882 class FTRUNC_U_W_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.w", int_mips_ftrunc_u_w,
1884 class FTRUNC_U_D_DESC : MSA_2RF_DESC_BASE<"ftrunc_u.d", int_mips_ftrunc_u_d,
1887 class FTINT_S_W_DESC : MSA_2RF_DESC_BASE<"ftint_s.w", int_mips_ftint_s_w,
1889 class FTINT_S_D_DESC : MSA_2RF_DESC_BASE<"ftint_s.d", int_mips_ftint_s_d,
1892 class FTINT_U_W_DESC : MSA_2RF_DESC_BASE<"ftint_u.w", int_mips_ftint_u_w,
1894 class FTINT_U_D_DESC : MSA_2RF_DESC_BASE<"ftint_u.d", int_mips_ftint_u_d,
1897 class FTQ_H_DESC : MSA_3RF_DESC_BASE<"ftq.h", int_mips_ftq_h,
1898 MSA128HOpnd, MSA128WOpnd, MSA128WOpnd>;
1899 class FTQ_W_DESC : MSA_3RF_DESC_BASE<"ftq.w", int_mips_ftq_w,
1900 MSA128WOpnd, MSA128DOpnd, MSA128DOpnd>;
1902 class HADD_S_H_DESC : MSA_3R_DESC_BASE<"hadd_s.h", int_mips_hadd_s_h,
1903 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1904 class HADD_S_W_DESC : MSA_3R_DESC_BASE<"hadd_s.w", int_mips_hadd_s_w,
1905 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1906 class HADD_S_D_DESC : MSA_3R_DESC_BASE<"hadd_s.d", int_mips_hadd_s_d,
1907 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1909 class HADD_U_H_DESC : MSA_3R_DESC_BASE<"hadd_u.h", int_mips_hadd_u_h,
1910 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1911 class HADD_U_W_DESC : MSA_3R_DESC_BASE<"hadd_u.w", int_mips_hadd_u_w,
1912 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1913 class HADD_U_D_DESC : MSA_3R_DESC_BASE<"hadd_u.d", int_mips_hadd_u_d,
1914 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1916 class HSUB_S_H_DESC : MSA_3R_DESC_BASE<"hsub_s.h", int_mips_hsub_s_h,
1917 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1918 class HSUB_S_W_DESC : MSA_3R_DESC_BASE<"hsub_s.w", int_mips_hsub_s_w,
1919 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1920 class HSUB_S_D_DESC : MSA_3R_DESC_BASE<"hsub_s.d", int_mips_hsub_s_d,
1921 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1923 class HSUB_U_H_DESC : MSA_3R_DESC_BASE<"hsub_u.h", int_mips_hsub_u_h,
1924 MSA128HOpnd, MSA128BOpnd, MSA128BOpnd>;
1925 class HSUB_U_W_DESC : MSA_3R_DESC_BASE<"hsub_u.w", int_mips_hsub_u_w,
1926 MSA128WOpnd, MSA128HOpnd, MSA128HOpnd>;
1927 class HSUB_U_D_DESC : MSA_3R_DESC_BASE<"hsub_u.d", int_mips_hsub_u_d,
1928 MSA128DOpnd, MSA128WOpnd, MSA128WOpnd>;
1930 class ILVEV_B_DESC : MSA_3R_DESC_BASE<"ilvev.b", MipsILVEV, MSA128BOpnd>;
1931 class ILVEV_H_DESC : MSA_3R_DESC_BASE<"ilvev.h", MipsILVEV, MSA128HOpnd>;
1932 class ILVEV_W_DESC : MSA_3R_DESC_BASE<"ilvev.w", MipsILVEV, MSA128WOpnd>;
1933 class ILVEV_D_DESC : MSA_3R_DESC_BASE<"ilvev.d", MipsILVEV, MSA128DOpnd>;
1935 class ILVL_B_DESC : MSA_3R_DESC_BASE<"ilvl.b", MipsILVL, MSA128BOpnd>;
1936 class ILVL_H_DESC : MSA_3R_DESC_BASE<"ilvl.h", MipsILVL, MSA128HOpnd>;
1937 class ILVL_W_DESC : MSA_3R_DESC_BASE<"ilvl.w", MipsILVL, MSA128WOpnd>;
1938 class ILVL_D_DESC : MSA_3R_DESC_BASE<"ilvl.d", MipsILVL, MSA128DOpnd>;
1940 class ILVOD_B_DESC : MSA_3R_DESC_BASE<"ilvod.b", MipsILVOD, MSA128BOpnd>;
1941 class ILVOD_H_DESC : MSA_3R_DESC_BASE<"ilvod.h", MipsILVOD, MSA128HOpnd>;
1942 class ILVOD_W_DESC : MSA_3R_DESC_BASE<"ilvod.w", MipsILVOD, MSA128WOpnd>;
1943 class ILVOD_D_DESC : MSA_3R_DESC_BASE<"ilvod.d", MipsILVOD, MSA128DOpnd>;
1945 class ILVR_B_DESC : MSA_3R_DESC_BASE<"ilvr.b", MipsILVR, MSA128BOpnd>;
1946 class ILVR_H_DESC : MSA_3R_DESC_BASE<"ilvr.h", MipsILVR, MSA128HOpnd>;
1947 class ILVR_W_DESC : MSA_3R_DESC_BASE<"ilvr.w", MipsILVR, MSA128WOpnd>;
1948 class ILVR_D_DESC : MSA_3R_DESC_BASE<"ilvr.d", MipsILVR, MSA128DOpnd>;
1950 class INSERT_B_DESC : MSA_INSERT_DESC_BASE<"insert.b", vinsert_v16i8, MSA128B,
1952 class INSERT_H_DESC : MSA_INSERT_DESC_BASE<"insert.h", vinsert_v8i16, MSA128H,
1954 class INSERT_W_DESC : MSA_INSERT_DESC_BASE<"insert.w", vinsert_v4i32, MSA128W,
1957 class INSVE_B_DESC : MSA_INSVE_DESC_BASE<"insve.b", int_mips_insve_b, MSA128B>;
1958 class INSVE_H_DESC : MSA_INSVE_DESC_BASE<"insve.h", int_mips_insve_h, MSA128H>;
1959 class INSVE_W_DESC : MSA_INSVE_DESC_BASE<"insve.w", int_mips_insve_w, MSA128W>;
1960 class INSVE_D_DESC : MSA_INSVE_DESC_BASE<"insve.d", int_mips_insve_d, MSA128D>;
1962 class LD_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1963 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
1964 ComplexPattern Addr = addrRegImm,
1965 InstrItinClass itin = NoItinerary> {
1966 dag OutOperandList = (outs RCWD:$wd);
1967 dag InOperandList = (ins MemOpnd:$addr);
1968 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1969 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1970 InstrItinClass Itinerary = itin;
1973 class LD_B_DESC : LD_DESC_BASE<"ld.b", load, v16i8, MSA128B>;
1974 class LD_H_DESC : LD_DESC_BASE<"ld.h", load, v8i16, MSA128H>;
1975 class LD_W_DESC : LD_DESC_BASE<"ld.w", load, v4i32, MSA128W>;
1976 class LD_D_DESC : LD_DESC_BASE<"ld.d", load, v2i64, MSA128D>;
1978 class LDI_B_DESC : MSA_I10_LDI_DESC_BASE<"ldi.b", MSA128B>;
1979 class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>;
1980 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>;
1981 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>;
1983 class LDX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
1984 ValueType TyNode, RegisterClass RCWD,
1985 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
1986 InstrItinClass itin = NoItinerary> {
1987 dag OutOperandList = (outs RCWD:$wd);
1988 dag InOperandList = (ins MemOpnd:$addr);
1989 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
1990 list<dag> Pattern = [(set RCWD:$wd, (TyNode (OpNode Addr:$addr)))];
1991 InstrItinClass Itinerary = itin;
1994 class LDX_B_DESC : LDX_DESC_BASE<"ldx.b", load, v16i8, MSA128B>;
1995 class LDX_H_DESC : LDX_DESC_BASE<"ldx.h", load, v8i16, MSA128H>;
1996 class LDX_W_DESC : LDX_DESC_BASE<"ldx.w", load, v4i32, MSA128W>;
1997 class LDX_D_DESC : LDX_DESC_BASE<"ldx.d", load, v2i64, MSA128D>;
1999 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
2001 class MADD_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.w", int_mips_madd_q_w,
2004 class MADDR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.h", int_mips_maddr_q_h,
2006 class MADDR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"maddr_q.w", int_mips_maddr_q_w,
2009 class MADDV_B_DESC : MSA_3R_4R_DESC_BASE<"maddv.b", int_mips_maddv_b,
2011 class MADDV_H_DESC : MSA_3R_4R_DESC_BASE<"maddv.h", int_mips_maddv_h,
2013 class MADDV_W_DESC : MSA_3R_4R_DESC_BASE<"maddv.w", int_mips_maddv_w,
2015 class MADDV_D_DESC : MSA_3R_4R_DESC_BASE<"maddv.d", int_mips_maddv_d,
2018 class MAX_A_B_DESC : MSA_3R_DESC_BASE<"max_a.b", int_mips_max_a_b, MSA128BOpnd>;
2019 class MAX_A_H_DESC : MSA_3R_DESC_BASE<"max_a.h", int_mips_max_a_h, MSA128HOpnd>;
2020 class MAX_A_W_DESC : MSA_3R_DESC_BASE<"max_a.w", int_mips_max_a_w, MSA128WOpnd>;
2021 class MAX_A_D_DESC : MSA_3R_DESC_BASE<"max_a.d", int_mips_max_a_d, MSA128DOpnd>;
2023 class MAX_S_B_DESC : MSA_3R_DESC_BASE<"max_s.b", MipsVSMax, MSA128BOpnd>;
2024 class MAX_S_H_DESC : MSA_3R_DESC_BASE<"max_s.h", MipsVSMax, MSA128HOpnd>;
2025 class MAX_S_W_DESC : MSA_3R_DESC_BASE<"max_s.w", MipsVSMax, MSA128WOpnd>;
2026 class MAX_S_D_DESC : MSA_3R_DESC_BASE<"max_s.d", MipsVSMax, MSA128DOpnd>;
2028 class MAX_U_B_DESC : MSA_3R_DESC_BASE<"max_u.b", MipsVUMax, MSA128BOpnd>;
2029 class MAX_U_H_DESC : MSA_3R_DESC_BASE<"max_u.h", MipsVUMax, MSA128HOpnd>;
2030 class MAX_U_W_DESC : MSA_3R_DESC_BASE<"max_u.w", MipsVUMax, MSA128WOpnd>;
2031 class MAX_U_D_DESC : MSA_3R_DESC_BASE<"max_u.d", MipsVUMax, MSA128DOpnd>;
2033 class MAXI_S_B_DESC : MSA_I5_DESC_BASE<"maxi_s.b", MipsVSMax, vsplati8_simm5,
2035 class MAXI_S_H_DESC : MSA_I5_DESC_BASE<"maxi_s.h", MipsVSMax, vsplati16_simm5,
2037 class MAXI_S_W_DESC : MSA_I5_DESC_BASE<"maxi_s.w", MipsVSMax, vsplati32_simm5,
2039 class MAXI_S_D_DESC : MSA_I5_DESC_BASE<"maxi_s.d", MipsVSMax, vsplati64_simm5,
2042 class MAXI_U_B_DESC : MSA_I5_DESC_BASE<"maxi_u.b", MipsVUMax, vsplati8_uimm5,
2044 class MAXI_U_H_DESC : MSA_I5_DESC_BASE<"maxi_u.h", MipsVUMax, vsplati16_uimm5,
2046 class MAXI_U_W_DESC : MSA_I5_DESC_BASE<"maxi_u.w", MipsVUMax, vsplati32_uimm5,
2048 class MAXI_U_D_DESC : MSA_I5_DESC_BASE<"maxi_u.d", MipsVUMax, vsplati64_uimm5,
2051 class MIN_A_B_DESC : MSA_3R_DESC_BASE<"min_a.b", int_mips_min_a_b, MSA128BOpnd>;
2052 class MIN_A_H_DESC : MSA_3R_DESC_BASE<"min_a.h", int_mips_min_a_h, MSA128HOpnd>;
2053 class MIN_A_W_DESC : MSA_3R_DESC_BASE<"min_a.w", int_mips_min_a_w, MSA128WOpnd>;
2054 class MIN_A_D_DESC : MSA_3R_DESC_BASE<"min_a.d", int_mips_min_a_d, MSA128DOpnd>;
2056 class MIN_S_B_DESC : MSA_3R_DESC_BASE<"min_s.b", MipsVSMin, MSA128BOpnd>;
2057 class MIN_S_H_DESC : MSA_3R_DESC_BASE<"min_s.h", MipsVSMin, MSA128HOpnd>;
2058 class MIN_S_W_DESC : MSA_3R_DESC_BASE<"min_s.w", MipsVSMin, MSA128WOpnd>;
2059 class MIN_S_D_DESC : MSA_3R_DESC_BASE<"min_s.d", MipsVSMin, MSA128DOpnd>;
2061 class MIN_U_B_DESC : MSA_3R_DESC_BASE<"min_u.b", MipsVUMin, MSA128BOpnd>;
2062 class MIN_U_H_DESC : MSA_3R_DESC_BASE<"min_u.h", MipsVUMin, MSA128HOpnd>;
2063 class MIN_U_W_DESC : MSA_3R_DESC_BASE<"min_u.w", MipsVUMin, MSA128WOpnd>;
2064 class MIN_U_D_DESC : MSA_3R_DESC_BASE<"min_u.d", MipsVUMin, MSA128DOpnd>;
2066 class MINI_S_B_DESC : MSA_I5_DESC_BASE<"mini_s.b", MipsVSMin, vsplati8_simm5,
2068 class MINI_S_H_DESC : MSA_I5_DESC_BASE<"mini_s.h", MipsVSMin, vsplati16_simm5,
2070 class MINI_S_W_DESC : MSA_I5_DESC_BASE<"mini_s.w", MipsVSMin, vsplati32_simm5,
2072 class MINI_S_D_DESC : MSA_I5_DESC_BASE<"mini_s.d", MipsVSMin, vsplati64_simm5,
2075 class MINI_U_B_DESC : MSA_I5_DESC_BASE<"mini_u.b", MipsVUMin, vsplati8_uimm5,
2077 class MINI_U_H_DESC : MSA_I5_DESC_BASE<"mini_u.h", MipsVUMin, vsplati16_uimm5,
2079 class MINI_U_W_DESC : MSA_I5_DESC_BASE<"mini_u.w", MipsVUMin, vsplati32_uimm5,
2081 class MINI_U_D_DESC : MSA_I5_DESC_BASE<"mini_u.d", MipsVUMin, vsplati64_uimm5,
2084 class MOD_S_B_DESC : MSA_3R_DESC_BASE<"mod_s.b", int_mips_mod_s_b, MSA128BOpnd>;
2085 class MOD_S_H_DESC : MSA_3R_DESC_BASE<"mod_s.h", int_mips_mod_s_h, MSA128HOpnd>;
2086 class MOD_S_W_DESC : MSA_3R_DESC_BASE<"mod_s.w", int_mips_mod_s_w, MSA128WOpnd>;
2087 class MOD_S_D_DESC : MSA_3R_DESC_BASE<"mod_s.d", int_mips_mod_s_d, MSA128DOpnd>;
2089 class MOD_U_B_DESC : MSA_3R_DESC_BASE<"mod_u.b", int_mips_mod_u_b, MSA128BOpnd>;
2090 class MOD_U_H_DESC : MSA_3R_DESC_BASE<"mod_u.h", int_mips_mod_u_h, MSA128HOpnd>;
2091 class MOD_U_W_DESC : MSA_3R_DESC_BASE<"mod_u.w", int_mips_mod_u_w, MSA128WOpnd>;
2092 class MOD_U_D_DESC : MSA_3R_DESC_BASE<"mod_u.d", int_mips_mod_u_d, MSA128DOpnd>;
2095 dag OutOperandList = (outs MSA128B:$wd);
2096 dag InOperandList = (ins MSA128B:$ws);
2097 string AsmString = "move.v\t$wd, $ws";
2098 list<dag> Pattern = [];
2099 InstrItinClass Itinerary = NoItinerary;
2102 class MSUB_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.h", int_mips_msub_q_h,
2104 class MSUB_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msub_q.w", int_mips_msub_q_w,
2107 class MSUBR_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.h", int_mips_msubr_q_h,
2109 class MSUBR_Q_W_DESC : MSA_3RF_4RF_DESC_BASE<"msubr_q.w", int_mips_msubr_q_w,
2112 class MSUBV_B_DESC : MSA_3R_4R_DESC_BASE<"msubv.b", int_mips_msubv_b,
2114 class MSUBV_H_DESC : MSA_3R_4R_DESC_BASE<"msubv.h", int_mips_msubv_h,
2116 class MSUBV_W_DESC : MSA_3R_4R_DESC_BASE<"msubv.w", int_mips_msubv_w,
2118 class MSUBV_D_DESC : MSA_3R_4R_DESC_BASE<"msubv.d", int_mips_msubv_d,
2121 class MUL_Q_H_DESC : MSA_3RF_DESC_BASE<"mul_q.h", int_mips_mul_q_h,
2123 class MUL_Q_W_DESC : MSA_3RF_DESC_BASE<"mul_q.w", int_mips_mul_q_w,
2126 class MULR_Q_H_DESC : MSA_3RF_DESC_BASE<"mulr_q.h", int_mips_mulr_q_h,
2128 class MULR_Q_W_DESC : MSA_3RF_DESC_BASE<"mulr_q.w", int_mips_mulr_q_w,
2131 class MULV_B_DESC : MSA_3R_DESC_BASE<"mulv.b", mul, MSA128BOpnd>;
2132 class MULV_H_DESC : MSA_3R_DESC_BASE<"mulv.h", mul, MSA128HOpnd>;
2133 class MULV_W_DESC : MSA_3R_DESC_BASE<"mulv.w", mul, MSA128WOpnd>;
2134 class MULV_D_DESC : MSA_3R_DESC_BASE<"mulv.d", mul, MSA128DOpnd>;
2136 class NLOC_B_DESC : MSA_2R_DESC_BASE<"nloc.b", int_mips_nloc_b, MSA128B>;
2137 class NLOC_H_DESC : MSA_2R_DESC_BASE<"nloc.h", int_mips_nloc_h, MSA128H>;
2138 class NLOC_W_DESC : MSA_2R_DESC_BASE<"nloc.w", int_mips_nloc_w, MSA128W>;
2139 class NLOC_D_DESC : MSA_2R_DESC_BASE<"nloc.d", int_mips_nloc_d, MSA128D>;
2141 class NLZC_B_DESC : MSA_2R_DESC_BASE<"nlzc.b", ctlz, MSA128B>;
2142 class NLZC_H_DESC : MSA_2R_DESC_BASE<"nlzc.h", ctlz, MSA128H>;
2143 class NLZC_W_DESC : MSA_2R_DESC_BASE<"nlzc.w", ctlz, MSA128W>;
2144 class NLZC_D_DESC : MSA_2R_DESC_BASE<"nlzc.d", ctlz, MSA128D>;
2146 class NOR_V_DESC : MSA_VEC_DESC_BASE<"nor.v", MipsVNOR, MSA128B>;
2147 class NOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128H>;
2148 class NOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128W>;
2149 class NOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<MipsVNOR, MSA128D>;
2151 class NORI_B_DESC : MSA_I8_DESC_BASE<"nori.b", MipsVNOR, vsplati8_uimm8,
2154 class OR_V_DESC : MSA_VEC_DESC_BASE<"or.v", or, MSA128B>;
2155 class OR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128H>;
2156 class OR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128W>;
2157 class OR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<or, MSA128D>;
2159 class ORI_B_DESC : MSA_I8_DESC_BASE<"ori.b", or, vsplati8_uimm8, MSA128B>;
2161 class PCKEV_B_DESC : MSA_3R_DESC_BASE<"pckev.b", MipsPCKEV, MSA128BOpnd>;
2162 class PCKEV_H_DESC : MSA_3R_DESC_BASE<"pckev.h", MipsPCKEV, MSA128HOpnd>;
2163 class PCKEV_W_DESC : MSA_3R_DESC_BASE<"pckev.w", MipsPCKEV, MSA128WOpnd>;
2164 class PCKEV_D_DESC : MSA_3R_DESC_BASE<"pckev.d", MipsPCKEV, MSA128DOpnd>;
2166 class PCKOD_B_DESC : MSA_3R_DESC_BASE<"pckod.b", MipsPCKOD, MSA128BOpnd>;
2167 class PCKOD_H_DESC : MSA_3R_DESC_BASE<"pckod.h", MipsPCKOD, MSA128HOpnd>;
2168 class PCKOD_W_DESC : MSA_3R_DESC_BASE<"pckod.w", MipsPCKOD, MSA128WOpnd>;
2169 class PCKOD_D_DESC : MSA_3R_DESC_BASE<"pckod.d", MipsPCKOD, MSA128DOpnd>;
2171 class PCNT_B_DESC : MSA_2R_DESC_BASE<"pcnt.b", ctpop, MSA128B>;
2172 class PCNT_H_DESC : MSA_2R_DESC_BASE<"pcnt.h", ctpop, MSA128H>;
2173 class PCNT_W_DESC : MSA_2R_DESC_BASE<"pcnt.w", ctpop, MSA128W>;
2174 class PCNT_D_DESC : MSA_2R_DESC_BASE<"pcnt.d", ctpop, MSA128D>;
2176 class SAT_S_B_DESC : MSA_BIT_B_DESC_BASE<"sat_s.b", int_mips_sat_s_b, MSA128B>;
2177 class SAT_S_H_DESC : MSA_BIT_H_DESC_BASE<"sat_s.h", int_mips_sat_s_h, MSA128H>;
2178 class SAT_S_W_DESC : MSA_BIT_W_DESC_BASE<"sat_s.w", int_mips_sat_s_w, MSA128W>;
2179 class SAT_S_D_DESC : MSA_BIT_D_DESC_BASE<"sat_s.d", int_mips_sat_s_d, MSA128D>;
2181 class SAT_U_B_DESC : MSA_BIT_B_DESC_BASE<"sat_u.b", int_mips_sat_u_b, MSA128B>;
2182 class SAT_U_H_DESC : MSA_BIT_H_DESC_BASE<"sat_u.h", int_mips_sat_u_h, MSA128H>;
2183 class SAT_U_W_DESC : MSA_BIT_W_DESC_BASE<"sat_u.w", int_mips_sat_u_w, MSA128W>;
2184 class SAT_U_D_DESC : MSA_BIT_D_DESC_BASE<"sat_u.d", int_mips_sat_u_d, MSA128D>;
2186 class SHF_B_DESC : MSA_I8_SHF_DESC_BASE<"shf.b", MSA128B>;
2187 class SHF_H_DESC : MSA_I8_SHF_DESC_BASE<"shf.h", MSA128H>;
2188 class SHF_W_DESC : MSA_I8_SHF_DESC_BASE<"shf.w", MSA128W>;
2190 class SLD_B_DESC : MSA_3R_DESC_BASE<"sld.b", int_mips_sld_b, MSA128BOpnd>;
2191 class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>;
2192 class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>;
2193 class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>;
2195 class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>;
2196 class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>;
2197 class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>;
2198 class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>;
2200 class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>;
2201 class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>;
2202 class SLL_W_DESC : MSA_3R_DESC_BASE<"sll.w", shl, MSA128WOpnd>;
2203 class SLL_D_DESC : MSA_3R_DESC_BASE<"sll.d", shl, MSA128DOpnd>;
2205 class SLLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.b", shl, vsplati8_uimm3,
2207 class SLLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.h", shl, vsplati16_uimm4,
2209 class SLLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.w", shl, vsplati32_uimm5,
2211 class SLLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"slli.d", shl, vsplati64_uimm6,
2214 class SPLAT_B_DESC : MSA_3R_DESC_BASE<"splat.b", int_mips_splat_b, MSA128BOpnd,
2215 MSA128BOpnd, GPR32Opnd>;
2216 class SPLAT_H_DESC : MSA_3R_DESC_BASE<"splat.h", int_mips_splat_h, MSA128HOpnd,
2217 MSA128HOpnd, GPR32Opnd>;
2218 class SPLAT_W_DESC : MSA_3R_DESC_BASE<"splat.w", int_mips_splat_w, MSA128WOpnd,
2219 MSA128WOpnd, GPR32Opnd>;
2220 class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd,
2221 MSA128DOpnd, GPR32Opnd>;
2223 class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4,
2225 class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3,
2227 class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2,
2229 class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1,
2232 class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>;
2233 class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>;
2234 class SRA_W_DESC : MSA_3R_DESC_BASE<"sra.w", sra, MSA128WOpnd>;
2235 class SRA_D_DESC : MSA_3R_DESC_BASE<"sra.d", sra, MSA128DOpnd>;
2237 class SRAI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.b", sra, vsplati8_uimm3,
2239 class SRAI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.h", sra, vsplati16_uimm4,
2241 class SRAI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.w", sra, vsplati32_uimm5,
2243 class SRAI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srai.d", sra, vsplati64_uimm6,
2246 class SRAR_B_DESC : MSA_3R_DESC_BASE<"srar.b", int_mips_srar_b, MSA128BOpnd>;
2247 class SRAR_H_DESC : MSA_3R_DESC_BASE<"srar.h", int_mips_srar_h, MSA128HOpnd>;
2248 class SRAR_W_DESC : MSA_3R_DESC_BASE<"srar.w", int_mips_srar_w, MSA128WOpnd>;
2249 class SRAR_D_DESC : MSA_3R_DESC_BASE<"srar.d", int_mips_srar_d, MSA128DOpnd>;
2251 class SRARI_B_DESC : MSA_BIT_B_DESC_BASE<"srari.b", int_mips_srari_b, MSA128B>;
2252 class SRARI_H_DESC : MSA_BIT_H_DESC_BASE<"srari.h", int_mips_srari_h, MSA128H>;
2253 class SRARI_W_DESC : MSA_BIT_W_DESC_BASE<"srari.w", int_mips_srari_w, MSA128W>;
2254 class SRARI_D_DESC : MSA_BIT_D_DESC_BASE<"srari.d", int_mips_srari_d, MSA128D>;
2256 class SRL_B_DESC : MSA_3R_DESC_BASE<"srl.b", srl, MSA128BOpnd>;
2257 class SRL_H_DESC : MSA_3R_DESC_BASE<"srl.h", srl, MSA128HOpnd>;
2258 class SRL_W_DESC : MSA_3R_DESC_BASE<"srl.w", srl, MSA128WOpnd>;
2259 class SRL_D_DESC : MSA_3R_DESC_BASE<"srl.d", srl, MSA128DOpnd>;
2261 class SRLI_B_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.b", srl, vsplati8_uimm3,
2263 class SRLI_H_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.h", srl, vsplati16_uimm4,
2265 class SRLI_W_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.w", srl, vsplati32_uimm5,
2267 class SRLI_D_DESC : MSA_BIT_SPLAT_DESC_BASE<"srli.d", srl, vsplati64_uimm6,
2270 class SRLR_B_DESC : MSA_3R_DESC_BASE<"srlr.b", int_mips_srlr_b, MSA128BOpnd>;
2271 class SRLR_H_DESC : MSA_3R_DESC_BASE<"srlr.h", int_mips_srlr_h, MSA128HOpnd>;
2272 class SRLR_W_DESC : MSA_3R_DESC_BASE<"srlr.w", int_mips_srlr_w, MSA128WOpnd>;
2273 class SRLR_D_DESC : MSA_3R_DESC_BASE<"srlr.d", int_mips_srlr_d, MSA128DOpnd>;
2275 class SRLRI_B_DESC : MSA_BIT_B_DESC_BASE<"srlri.b", int_mips_srlri_b, MSA128B>;
2276 class SRLRI_H_DESC : MSA_BIT_H_DESC_BASE<"srlri.h", int_mips_srlri_h, MSA128H>;
2277 class SRLRI_W_DESC : MSA_BIT_W_DESC_BASE<"srlri.w", int_mips_srlri_w, MSA128W>;
2278 class SRLRI_D_DESC : MSA_BIT_D_DESC_BASE<"srlri.d", int_mips_srlri_d, MSA128D>;
2280 class ST_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2281 ValueType TyNode, RegisterClass RCWD, Operand MemOpnd = mem,
2282 ComplexPattern Addr = addrRegImm,
2283 InstrItinClass itin = NoItinerary> {
2284 dag OutOperandList = (outs);
2285 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2286 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2287 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2288 InstrItinClass Itinerary = itin;
2291 class ST_B_DESC : ST_DESC_BASE<"st.b", store, v16i8, MSA128B>;
2292 class ST_H_DESC : ST_DESC_BASE<"st.h", store, v8i16, MSA128H>;
2293 class ST_W_DESC : ST_DESC_BASE<"st.w", store, v4i32, MSA128W>;
2294 class ST_D_DESC : ST_DESC_BASE<"st.d", store, v2i64, MSA128D>;
2296 class STX_DESC_BASE<string instr_asm, SDPatternOperator OpNode,
2297 ValueType TyNode, RegisterClass RCWD,
2298 Operand MemOpnd = mem, ComplexPattern Addr = addrRegReg,
2299 InstrItinClass itin = NoItinerary> {
2300 dag OutOperandList = (outs);
2301 dag InOperandList = (ins RCWD:$wd, MemOpnd:$addr);
2302 string AsmString = !strconcat(instr_asm, "\t$wd, $addr");
2303 list<dag> Pattern = [(OpNode (TyNode RCWD:$wd), Addr:$addr)];
2304 InstrItinClass Itinerary = itin;
2307 class STX_B_DESC : STX_DESC_BASE<"stx.b", store, v16i8, MSA128B>;
2308 class STX_H_DESC : STX_DESC_BASE<"stx.h", store, v8i16, MSA128H>;
2309 class STX_W_DESC : STX_DESC_BASE<"stx.w", store, v4i32, MSA128W>;
2310 class STX_D_DESC : STX_DESC_BASE<"stx.d", store, v2i64, MSA128D>;
2312 class SUBS_S_B_DESC : MSA_3R_DESC_BASE<"subs_s.b", int_mips_subs_s_b,
2314 class SUBS_S_H_DESC : MSA_3R_DESC_BASE<"subs_s.h", int_mips_subs_s_h,
2316 class SUBS_S_W_DESC : MSA_3R_DESC_BASE<"subs_s.w", int_mips_subs_s_w,
2318 class SUBS_S_D_DESC : MSA_3R_DESC_BASE<"subs_s.d", int_mips_subs_s_d,
2321 class SUBS_U_B_DESC : MSA_3R_DESC_BASE<"subs_u.b", int_mips_subs_u_b,
2323 class SUBS_U_H_DESC : MSA_3R_DESC_BASE<"subs_u.h", int_mips_subs_u_h,
2325 class SUBS_U_W_DESC : MSA_3R_DESC_BASE<"subs_u.w", int_mips_subs_u_w,
2327 class SUBS_U_D_DESC : MSA_3R_DESC_BASE<"subs_u.d", int_mips_subs_u_d,
2330 class SUBSUS_U_B_DESC : MSA_3R_DESC_BASE<"subsus_u.b", int_mips_subsus_u_b,
2332 class SUBSUS_U_H_DESC : MSA_3R_DESC_BASE<"subsus_u.h", int_mips_subsus_u_h,
2334 class SUBSUS_U_W_DESC : MSA_3R_DESC_BASE<"subsus_u.w", int_mips_subsus_u_w,
2336 class SUBSUS_U_D_DESC : MSA_3R_DESC_BASE<"subsus_u.d", int_mips_subsus_u_d,
2339 class SUBSUU_S_B_DESC : MSA_3R_DESC_BASE<"subsuu_s.b", int_mips_subsuu_s_b,
2341 class SUBSUU_S_H_DESC : MSA_3R_DESC_BASE<"subsuu_s.h", int_mips_subsuu_s_h,
2343 class SUBSUU_S_W_DESC : MSA_3R_DESC_BASE<"subsuu_s.w", int_mips_subsuu_s_w,
2345 class SUBSUU_S_D_DESC : MSA_3R_DESC_BASE<"subsuu_s.d", int_mips_subsuu_s_d,
2348 class SUBV_B_DESC : MSA_3R_DESC_BASE<"subv.b", sub, MSA128BOpnd>;
2349 class SUBV_H_DESC : MSA_3R_DESC_BASE<"subv.h", sub, MSA128HOpnd>;
2350 class SUBV_W_DESC : MSA_3R_DESC_BASE<"subv.w", sub, MSA128WOpnd>;
2351 class SUBV_D_DESC : MSA_3R_DESC_BASE<"subv.d", sub, MSA128DOpnd>;
2353 class SUBVI_B_DESC : MSA_I5_DESC_BASE<"subvi.b", sub, vsplati8_uimm5, MSA128B>;
2354 class SUBVI_H_DESC : MSA_I5_DESC_BASE<"subvi.h", sub, vsplati16_uimm5, MSA128H>;
2355 class SUBVI_W_DESC : MSA_I5_DESC_BASE<"subvi.w", sub, vsplati32_uimm5, MSA128W>;
2356 class SUBVI_D_DESC : MSA_I5_DESC_BASE<"subvi.d", sub, vsplati64_uimm5, MSA128D>;
2358 class VSHF_B_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.b", MSA128BOpnd>;
2359 class VSHF_H_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.h", MSA128HOpnd>;
2360 class VSHF_W_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.w", MSA128WOpnd>;
2361 class VSHF_D_DESC : MSA_3R_VSHF_DESC_BASE<"vshf.d", MSA128DOpnd>;
2363 class XOR_V_DESC : MSA_VEC_DESC_BASE<"xor.v", xor, MSA128B>;
2364 class XOR_V_H_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128H>;
2365 class XOR_V_W_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128W>;
2366 class XOR_V_D_PSEUDO_DESC : MSA_VEC_PSEUDO_BASE<xor, MSA128D>;
2368 class XORI_B_DESC : MSA_I8_DESC_BASE<"xori.b", xor, vsplati8_uimm8, MSA128B>;
2370 // Instruction defs.
2371 def ADD_A_B : ADD_A_B_ENC, ADD_A_B_DESC;
2372 def ADD_A_H : ADD_A_H_ENC, ADD_A_H_DESC;
2373 def ADD_A_W : ADD_A_W_ENC, ADD_A_W_DESC;
2374 def ADD_A_D : ADD_A_D_ENC, ADD_A_D_DESC;
2376 def ADDS_A_B : ADDS_A_B_ENC, ADDS_A_B_DESC;
2377 def ADDS_A_H : ADDS_A_H_ENC, ADDS_A_H_DESC;
2378 def ADDS_A_W : ADDS_A_W_ENC, ADDS_A_W_DESC;
2379 def ADDS_A_D : ADDS_A_D_ENC, ADDS_A_D_DESC;
2381 def ADDS_S_B : ADDS_S_B_ENC, ADDS_S_B_DESC;
2382 def ADDS_S_H : ADDS_S_H_ENC, ADDS_S_H_DESC;
2383 def ADDS_S_W : ADDS_S_W_ENC, ADDS_S_W_DESC;
2384 def ADDS_S_D : ADDS_S_D_ENC, ADDS_S_D_DESC;
2386 def ADDS_U_B : ADDS_U_B_ENC, ADDS_U_B_DESC;
2387 def ADDS_U_H : ADDS_U_H_ENC, ADDS_U_H_DESC;
2388 def ADDS_U_W : ADDS_U_W_ENC, ADDS_U_W_DESC;
2389 def ADDS_U_D : ADDS_U_D_ENC, ADDS_U_D_DESC;
2391 def ADDV_B : ADDV_B_ENC, ADDV_B_DESC;
2392 def ADDV_H : ADDV_H_ENC, ADDV_H_DESC;
2393 def ADDV_W : ADDV_W_ENC, ADDV_W_DESC;
2394 def ADDV_D : ADDV_D_ENC, ADDV_D_DESC;
2396 def ADDVI_B : ADDVI_B_ENC, ADDVI_B_DESC;
2397 def ADDVI_H : ADDVI_H_ENC, ADDVI_H_DESC;
2398 def ADDVI_W : ADDVI_W_ENC, ADDVI_W_DESC;
2399 def ADDVI_D : ADDVI_D_ENC, ADDVI_D_DESC;
2401 def AND_V : AND_V_ENC, AND_V_DESC;
2402 def AND_V_H_PSEUDO : AND_V_H_PSEUDO_DESC,
2403 PseudoInstExpansion<(AND_V MSA128B:$wd,
2404 MSA128B:$ws, MSA128B:$wt)>;
2405 def AND_V_W_PSEUDO : AND_V_W_PSEUDO_DESC,
2406 PseudoInstExpansion<(AND_V MSA128B:$wd,
2407 MSA128B:$ws, MSA128B:$wt)>;
2408 def AND_V_D_PSEUDO : AND_V_D_PSEUDO_DESC,
2409 PseudoInstExpansion<(AND_V MSA128B:$wd,
2410 MSA128B:$ws, MSA128B:$wt)>;
2412 def ANDI_B : ANDI_B_ENC, ANDI_B_DESC;
2414 def ASUB_S_B : ASUB_S_B_ENC, ASUB_S_B_DESC;
2415 def ASUB_S_H : ASUB_S_H_ENC, ASUB_S_H_DESC;
2416 def ASUB_S_W : ASUB_S_W_ENC, ASUB_S_W_DESC;
2417 def ASUB_S_D : ASUB_S_D_ENC, ASUB_S_D_DESC;
2419 def ASUB_U_B : ASUB_U_B_ENC, ASUB_U_B_DESC;
2420 def ASUB_U_H : ASUB_U_H_ENC, ASUB_U_H_DESC;
2421 def ASUB_U_W : ASUB_U_W_ENC, ASUB_U_W_DESC;
2422 def ASUB_U_D : ASUB_U_D_ENC, ASUB_U_D_DESC;
2424 def AVE_S_B : AVE_S_B_ENC, AVE_S_B_DESC;
2425 def AVE_S_H : AVE_S_H_ENC, AVE_S_H_DESC;
2426 def AVE_S_W : AVE_S_W_ENC, AVE_S_W_DESC;
2427 def AVE_S_D : AVE_S_D_ENC, AVE_S_D_DESC;
2429 def AVE_U_B : AVE_U_B_ENC, AVE_U_B_DESC;
2430 def AVE_U_H : AVE_U_H_ENC, AVE_U_H_DESC;
2431 def AVE_U_W : AVE_U_W_ENC, AVE_U_W_DESC;
2432 def AVE_U_D : AVE_U_D_ENC, AVE_U_D_DESC;
2434 def AVER_S_B : AVER_S_B_ENC, AVER_S_B_DESC;
2435 def AVER_S_H : AVER_S_H_ENC, AVER_S_H_DESC;
2436 def AVER_S_W : AVER_S_W_ENC, AVER_S_W_DESC;
2437 def AVER_S_D : AVER_S_D_ENC, AVER_S_D_DESC;
2439 def AVER_U_B : AVER_U_B_ENC, AVER_U_B_DESC;
2440 def AVER_U_H : AVER_U_H_ENC, AVER_U_H_DESC;
2441 def AVER_U_W : AVER_U_W_ENC, AVER_U_W_DESC;
2442 def AVER_U_D : AVER_U_D_ENC, AVER_U_D_DESC;
2444 def BCLR_B : BCLR_B_ENC, BCLR_B_DESC;
2445 def BCLR_H : BCLR_H_ENC, BCLR_H_DESC;
2446 def BCLR_W : BCLR_W_ENC, BCLR_W_DESC;
2447 def BCLR_D : BCLR_D_ENC, BCLR_D_DESC;
2449 def BCLRI_B : BCLRI_B_ENC, BCLRI_B_DESC;
2450 def BCLRI_H : BCLRI_H_ENC, BCLRI_H_DESC;
2451 def BCLRI_W : BCLRI_W_ENC, BCLRI_W_DESC;
2452 def BCLRI_D : BCLRI_D_ENC, BCLRI_D_DESC;
2454 def BINSL_B : BINSL_B_ENC, BINSL_B_DESC;
2455 def BINSL_H : BINSL_H_ENC, BINSL_H_DESC;
2456 def BINSL_W : BINSL_W_ENC, BINSL_W_DESC;
2457 def BINSL_D : BINSL_D_ENC, BINSL_D_DESC;
2459 def BINSLI_B : BINSLI_B_ENC, BINSLI_B_DESC;
2460 def BINSLI_H : BINSLI_H_ENC, BINSLI_H_DESC;
2461 def BINSLI_W : BINSLI_W_ENC, BINSLI_W_DESC;
2462 def BINSLI_D : BINSLI_D_ENC, BINSLI_D_DESC;
2464 def BINSR_B : BINSR_B_ENC, BINSR_B_DESC;
2465 def BINSR_H : BINSR_H_ENC, BINSR_H_DESC;
2466 def BINSR_W : BINSR_W_ENC, BINSR_W_DESC;
2467 def BINSR_D : BINSR_D_ENC, BINSR_D_DESC;
2469 def BINSRI_B : BINSRI_B_ENC, BINSRI_B_DESC;
2470 def BINSRI_H : BINSRI_H_ENC, BINSRI_H_DESC;
2471 def BINSRI_W : BINSRI_W_ENC, BINSRI_W_DESC;
2472 def BINSRI_D : BINSRI_D_ENC, BINSRI_D_DESC;
2474 def BMNZ_V : BMNZ_V_ENC, BMNZ_V_DESC;
2476 def BMNZI_B : BMNZI_B_ENC, BMNZI_B_DESC;
2478 def BMZ_V : BMZ_V_ENC, BMZ_V_DESC;
2480 def BMZI_B : BMZI_B_ENC, BMZI_B_DESC;
2482 def BNEG_B : BNEG_B_ENC, BNEG_B_DESC;
2483 def BNEG_H : BNEG_H_ENC, BNEG_H_DESC;
2484 def BNEG_W : BNEG_W_ENC, BNEG_W_DESC;
2485 def BNEG_D : BNEG_D_ENC, BNEG_D_DESC;
2487 def BNEGI_B : BNEGI_B_ENC, BNEGI_B_DESC;
2488 def BNEGI_H : BNEGI_H_ENC, BNEGI_H_DESC;
2489 def BNEGI_W : BNEGI_W_ENC, BNEGI_W_DESC;
2490 def BNEGI_D : BNEGI_D_ENC, BNEGI_D_DESC;
2492 def BNZ_B : BNZ_B_ENC, BNZ_B_DESC;
2493 def BNZ_H : BNZ_H_ENC, BNZ_H_DESC;
2494 def BNZ_W : BNZ_W_ENC, BNZ_W_DESC;
2495 def BNZ_D : BNZ_D_ENC, BNZ_D_DESC;
2497 def BNZ_V : BNZ_V_ENC, BNZ_V_DESC;
2499 def BSEL_V : BSEL_V_ENC, BSEL_V_DESC;
2501 class MSA_BSEL_PSEUDO_BASE<RegisterClass RC, ValueType Ty> :
2502 MipsPseudo<(outs RC:$wd), (ins RC:$wd_in, RC:$ws, RC:$wt),
2503 [(set RC:$wd, (Ty (vselect RC:$wd_in, RC:$ws, RC:$wt)))]>,
2504 PseudoInstExpansion<(BSEL_V MSA128B:$wd, MSA128B:$wd_in, MSA128B:$ws,
2506 let Constraints = "$wd_in = $wd";
2509 def BSEL_H_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128H, v8i16>;
2510 def BSEL_W_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4i32>;
2511 def BSEL_D_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2i64>;
2512 def BSEL_FW_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128W, v4f32>;
2513 def BSEL_FD_PSEUDO : MSA_BSEL_PSEUDO_BASE<MSA128D, v2f64>;
2515 def BSELI_B : BSELI_B_ENC, BSELI_B_DESC;
2517 def BSET_B : BSET_B_ENC, BSET_B_DESC;
2518 def BSET_H : BSET_H_ENC, BSET_H_DESC;
2519 def BSET_W : BSET_W_ENC, BSET_W_DESC;
2520 def BSET_D : BSET_D_ENC, BSET_D_DESC;
2522 def BSETI_B : BSETI_B_ENC, BSETI_B_DESC;
2523 def BSETI_H : BSETI_H_ENC, BSETI_H_DESC;
2524 def BSETI_W : BSETI_W_ENC, BSETI_W_DESC;
2525 def BSETI_D : BSETI_D_ENC, BSETI_D_DESC;
2527 def BZ_B : BZ_B_ENC, BZ_B_DESC;
2528 def BZ_H : BZ_H_ENC, BZ_H_DESC;
2529 def BZ_W : BZ_W_ENC, BZ_W_DESC;
2530 def BZ_D : BZ_D_ENC, BZ_D_DESC;
2532 def BZ_V : BZ_V_ENC, BZ_V_DESC;
2534 def CEQ_B : CEQ_B_ENC, CEQ_B_DESC;
2535 def CEQ_H : CEQ_H_ENC, CEQ_H_DESC;
2536 def CEQ_W : CEQ_W_ENC, CEQ_W_DESC;
2537 def CEQ_D : CEQ_D_ENC, CEQ_D_DESC;
2539 def CEQI_B : CEQI_B_ENC, CEQI_B_DESC;
2540 def CEQI_H : CEQI_H_ENC, CEQI_H_DESC;
2541 def CEQI_W : CEQI_W_ENC, CEQI_W_DESC;
2542 def CEQI_D : CEQI_D_ENC, CEQI_D_DESC;
2544 def CFCMSA : CFCMSA_ENC, CFCMSA_DESC;
2546 def CLE_S_B : CLE_S_B_ENC, CLE_S_B_DESC;
2547 def CLE_S_H : CLE_S_H_ENC, CLE_S_H_DESC;
2548 def CLE_S_W : CLE_S_W_ENC, CLE_S_W_DESC;
2549 def CLE_S_D : CLE_S_D_ENC, CLE_S_D_DESC;
2551 def CLE_U_B : CLE_U_B_ENC, CLE_U_B_DESC;
2552 def CLE_U_H : CLE_U_H_ENC, CLE_U_H_DESC;
2553 def CLE_U_W : CLE_U_W_ENC, CLE_U_W_DESC;
2554 def CLE_U_D : CLE_U_D_ENC, CLE_U_D_DESC;
2556 def CLEI_S_B : CLEI_S_B_ENC, CLEI_S_B_DESC;
2557 def CLEI_S_H : CLEI_S_H_ENC, CLEI_S_H_DESC;
2558 def CLEI_S_W : CLEI_S_W_ENC, CLEI_S_W_DESC;
2559 def CLEI_S_D : CLEI_S_D_ENC, CLEI_S_D_DESC;
2561 def CLEI_U_B : CLEI_U_B_ENC, CLEI_U_B_DESC;
2562 def CLEI_U_H : CLEI_U_H_ENC, CLEI_U_H_DESC;
2563 def CLEI_U_W : CLEI_U_W_ENC, CLEI_U_W_DESC;
2564 def CLEI_U_D : CLEI_U_D_ENC, CLEI_U_D_DESC;
2566 def CLT_S_B : CLT_S_B_ENC, CLT_S_B_DESC;
2567 def CLT_S_H : CLT_S_H_ENC, CLT_S_H_DESC;
2568 def CLT_S_W : CLT_S_W_ENC, CLT_S_W_DESC;
2569 def CLT_S_D : CLT_S_D_ENC, CLT_S_D_DESC;
2571 def CLT_U_B : CLT_U_B_ENC, CLT_U_B_DESC;
2572 def CLT_U_H : CLT_U_H_ENC, CLT_U_H_DESC;
2573 def CLT_U_W : CLT_U_W_ENC, CLT_U_W_DESC;
2574 def CLT_U_D : CLT_U_D_ENC, CLT_U_D_DESC;
2576 def CLTI_S_B : CLTI_S_B_ENC, CLTI_S_B_DESC;
2577 def CLTI_S_H : CLTI_S_H_ENC, CLTI_S_H_DESC;
2578 def CLTI_S_W : CLTI_S_W_ENC, CLTI_S_W_DESC;
2579 def CLTI_S_D : CLTI_S_D_ENC, CLTI_S_D_DESC;
2581 def CLTI_U_B : CLTI_U_B_ENC, CLTI_U_B_DESC;
2582 def CLTI_U_H : CLTI_U_H_ENC, CLTI_U_H_DESC;
2583 def CLTI_U_W : CLTI_U_W_ENC, CLTI_U_W_DESC;
2584 def CLTI_U_D : CLTI_U_D_ENC, CLTI_U_D_DESC;
2586 def COPY_S_B : COPY_S_B_ENC, COPY_S_B_DESC;
2587 def COPY_S_H : COPY_S_H_ENC, COPY_S_H_DESC;
2588 def COPY_S_W : COPY_S_W_ENC, COPY_S_W_DESC;
2590 def COPY_U_B : COPY_U_B_ENC, COPY_U_B_DESC;
2591 def COPY_U_H : COPY_U_H_ENC, COPY_U_H_DESC;
2592 def COPY_U_W : COPY_U_W_ENC, COPY_U_W_DESC;
2594 def COPY_FW_PSEUDO : COPY_FW_PSEUDO_DESC;
2595 def COPY_FD_PSEUDO : COPY_FD_PSEUDO_DESC;
2597 def CTCMSA : CTCMSA_ENC, CTCMSA_DESC;
2599 def DIV_S_B : DIV_S_B_ENC, DIV_S_B_DESC;
2600 def DIV_S_H : DIV_S_H_ENC, DIV_S_H_DESC;
2601 def DIV_S_W : DIV_S_W_ENC, DIV_S_W_DESC;
2602 def DIV_S_D : DIV_S_D_ENC, DIV_S_D_DESC;
2604 def DIV_U_B : DIV_U_B_ENC, DIV_U_B_DESC;
2605 def DIV_U_H : DIV_U_H_ENC, DIV_U_H_DESC;
2606 def DIV_U_W : DIV_U_W_ENC, DIV_U_W_DESC;
2607 def DIV_U_D : DIV_U_D_ENC, DIV_U_D_DESC;
2609 def DOTP_S_H : DOTP_S_H_ENC, DOTP_S_H_DESC;
2610 def DOTP_S_W : DOTP_S_W_ENC, DOTP_S_W_DESC;
2611 def DOTP_S_D : DOTP_S_D_ENC, DOTP_S_D_DESC;
2613 def DOTP_U_H : DOTP_U_H_ENC, DOTP_U_H_DESC;
2614 def DOTP_U_W : DOTP_U_W_ENC, DOTP_U_W_DESC;
2615 def DOTP_U_D : DOTP_U_D_ENC, DOTP_U_D_DESC;
2617 def DPADD_S_H : DPADD_S_H_ENC, DPADD_S_H_DESC;
2618 def DPADD_S_W : DPADD_S_W_ENC, DPADD_S_W_DESC;
2619 def DPADD_S_D : DPADD_S_D_ENC, DPADD_S_D_DESC;
2621 def DPADD_U_H : DPADD_U_H_ENC, DPADD_U_H_DESC;
2622 def DPADD_U_W : DPADD_U_W_ENC, DPADD_U_W_DESC;
2623 def DPADD_U_D : DPADD_U_D_ENC, DPADD_U_D_DESC;
2625 def DPSUB_S_H : DPSUB_S_H_ENC, DPSUB_S_H_DESC;
2626 def DPSUB_S_W : DPSUB_S_W_ENC, DPSUB_S_W_DESC;
2627 def DPSUB_S_D : DPSUB_S_D_ENC, DPSUB_S_D_DESC;
2629 def DPSUB_U_H : DPSUB_U_H_ENC, DPSUB_U_H_DESC;
2630 def DPSUB_U_W : DPSUB_U_W_ENC, DPSUB_U_W_DESC;
2631 def DPSUB_U_D : DPSUB_U_D_ENC, DPSUB_U_D_DESC;
2633 def FADD_W : FADD_W_ENC, FADD_W_DESC;
2634 def FADD_D : FADD_D_ENC, FADD_D_DESC;
2636 def FCAF_W : FCAF_W_ENC, FCAF_W_DESC;
2637 def FCAF_D : FCAF_D_ENC, FCAF_D_DESC;
2639 def FCEQ_W : FCEQ_W_ENC, FCEQ_W_DESC;
2640 def FCEQ_D : FCEQ_D_ENC, FCEQ_D_DESC;
2642 def FCLE_W : FCLE_W_ENC, FCLE_W_DESC;
2643 def FCLE_D : FCLE_D_ENC, FCLE_D_DESC;
2645 def FCLT_W : FCLT_W_ENC, FCLT_W_DESC;
2646 def FCLT_D : FCLT_D_ENC, FCLT_D_DESC;
2648 def FCLASS_W : FCLASS_W_ENC, FCLASS_W_DESC;
2649 def FCLASS_D : FCLASS_D_ENC, FCLASS_D_DESC;
2651 def FCNE_W : FCNE_W_ENC, FCNE_W_DESC;
2652 def FCNE_D : FCNE_D_ENC, FCNE_D_DESC;
2654 def FCOR_W : FCOR_W_ENC, FCOR_W_DESC;
2655 def FCOR_D : FCOR_D_ENC, FCOR_D_DESC;
2657 def FCUEQ_W : FCUEQ_W_ENC, FCUEQ_W_DESC;
2658 def FCUEQ_D : FCUEQ_D_ENC, FCUEQ_D_DESC;
2660 def FCULE_W : FCULE_W_ENC, FCULE_W_DESC;
2661 def FCULE_D : FCULE_D_ENC, FCULE_D_DESC;
2663 def FCULT_W : FCULT_W_ENC, FCULT_W_DESC;
2664 def FCULT_D : FCULT_D_ENC, FCULT_D_DESC;
2666 def FCUN_W : FCUN_W_ENC, FCUN_W_DESC;
2667 def FCUN_D : FCUN_D_ENC, FCUN_D_DESC;
2669 def FCUNE_W : FCUNE_W_ENC, FCUNE_W_DESC;
2670 def FCUNE_D : FCUNE_D_ENC, FCUNE_D_DESC;
2672 def FDIV_W : FDIV_W_ENC, FDIV_W_DESC;
2673 def FDIV_D : FDIV_D_ENC, FDIV_D_DESC;
2675 def FEXDO_H : FEXDO_H_ENC, FEXDO_H_DESC;
2676 def FEXDO_W : FEXDO_W_ENC, FEXDO_W_DESC;
2678 def FEXP2_W : FEXP2_W_ENC, FEXP2_W_DESC;
2679 def FEXP2_D : FEXP2_D_ENC, FEXP2_D_DESC;
2681 def FEXUPL_W : FEXUPL_W_ENC, FEXUPL_W_DESC;
2682 def FEXUPL_D : FEXUPL_D_ENC, FEXUPL_D_DESC;
2684 def FEXUPR_W : FEXUPR_W_ENC, FEXUPR_W_DESC;
2685 def FEXUPR_D : FEXUPR_D_ENC, FEXUPR_D_DESC;
2687 def FFINT_S_W : FFINT_S_W_ENC, FFINT_S_W_DESC;
2688 def FFINT_S_D : FFINT_S_D_ENC, FFINT_S_D_DESC;
2690 def FFINT_U_W : FFINT_U_W_ENC, FFINT_U_W_DESC;
2691 def FFINT_U_D : FFINT_U_D_ENC, FFINT_U_D_DESC;
2693 def FFQL_W : FFQL_W_ENC, FFQL_W_DESC;
2694 def FFQL_D : FFQL_D_ENC, FFQL_D_DESC;
2696 def FFQR_W : FFQR_W_ENC, FFQR_W_DESC;
2697 def FFQR_D : FFQR_D_ENC, FFQR_D_DESC;
2699 def FILL_B : FILL_B_ENC, FILL_B_DESC;
2700 def FILL_H : FILL_H_ENC, FILL_H_DESC;
2701 def FILL_W : FILL_W_ENC, FILL_W_DESC;
2703 def FLOG2_W : FLOG2_W_ENC, FLOG2_W_DESC;
2704 def FLOG2_D : FLOG2_D_ENC, FLOG2_D_DESC;
2706 def FMADD_W : FMADD_W_ENC, FMADD_W_DESC;
2707 def FMADD_D : FMADD_D_ENC, FMADD_D_DESC;
2709 def FMAX_W : FMAX_W_ENC, FMAX_W_DESC;
2710 def FMAX_D : FMAX_D_ENC, FMAX_D_DESC;
2712 def FMAX_A_W : FMAX_A_W_ENC, FMAX_A_W_DESC;
2713 def FMAX_A_D : FMAX_A_D_ENC, FMAX_A_D_DESC;
2715 def FMIN_W : FMIN_W_ENC, FMIN_W_DESC;
2716 def FMIN_D : FMIN_D_ENC, FMIN_D_DESC;
2718 def FMIN_A_W : FMIN_A_W_ENC, FMIN_A_W_DESC;
2719 def FMIN_A_D : FMIN_A_D_ENC, FMIN_A_D_DESC;
2721 def FMSUB_W : FMSUB_W_ENC, FMSUB_W_DESC;
2722 def FMSUB_D : FMSUB_D_ENC, FMSUB_D_DESC;
2724 def FMUL_W : FMUL_W_ENC, FMUL_W_DESC;
2725 def FMUL_D : FMUL_D_ENC, FMUL_D_DESC;
2727 def FRINT_W : FRINT_W_ENC, FRINT_W_DESC;
2728 def FRINT_D : FRINT_D_ENC, FRINT_D_DESC;
2730 def FRCP_W : FRCP_W_ENC, FRCP_W_DESC;
2731 def FRCP_D : FRCP_D_ENC, FRCP_D_DESC;
2733 def FRSQRT_W : FRSQRT_W_ENC, FRSQRT_W_DESC;
2734 def FRSQRT_D : FRSQRT_D_ENC, FRSQRT_D_DESC;
2736 def FSAF_W : FSAF_W_ENC, FSAF_W_DESC;
2737 def FSAF_D : FSAF_D_ENC, FSAF_D_DESC;
2739 def FSEQ_W : FSEQ_W_ENC, FSEQ_W_DESC;
2740 def FSEQ_D : FSEQ_D_ENC, FSEQ_D_DESC;
2742 def FSLE_W : FSLE_W_ENC, FSLE_W_DESC;
2743 def FSLE_D : FSLE_D_ENC, FSLE_D_DESC;
2745 def FSLT_W : FSLT_W_ENC, FSLT_W_DESC;
2746 def FSLT_D : FSLT_D_ENC, FSLT_D_DESC;
2748 def FSNE_W : FSNE_W_ENC, FSNE_W_DESC;
2749 def FSNE_D : FSNE_D_ENC, FSNE_D_DESC;
2751 def FSOR_W : FSOR_W_ENC, FSOR_W_DESC;
2752 def FSOR_D : FSOR_D_ENC, FSOR_D_DESC;
2754 def FSQRT_W : FSQRT_W_ENC, FSQRT_W_DESC;
2755 def FSQRT_D : FSQRT_D_ENC, FSQRT_D_DESC;
2757 def FSUB_W : FSUB_W_ENC, FSUB_W_DESC;
2758 def FSUB_D : FSUB_D_ENC, FSUB_D_DESC;
2760 def FSUEQ_W : FSUEQ_W_ENC, FSUEQ_W_DESC;
2761 def FSUEQ_D : FSUEQ_D_ENC, FSUEQ_D_DESC;
2763 def FSULE_W : FSULE_W_ENC, FSULE_W_DESC;
2764 def FSULE_D : FSULE_D_ENC, FSULE_D_DESC;
2766 def FSULT_W : FSULT_W_ENC, FSULT_W_DESC;
2767 def FSULT_D : FSULT_D_ENC, FSULT_D_DESC;
2769 def FSUN_W : FSUN_W_ENC, FSUN_W_DESC;
2770 def FSUN_D : FSUN_D_ENC, FSUN_D_DESC;
2772 def FSUNE_W : FSUNE_W_ENC, FSUNE_W_DESC;
2773 def FSUNE_D : FSUNE_D_ENC, FSUNE_D_DESC;
2775 def FTRUNC_S_W : FTRUNC_S_W_ENC, FTRUNC_S_W_DESC;
2776 def FTRUNC_S_D : FTRUNC_S_D_ENC, FTRUNC_S_D_DESC;
2778 def FTRUNC_U_W : FTRUNC_U_W_ENC, FTRUNC_U_W_DESC;
2779 def FTRUNC_U_D : FTRUNC_U_D_ENC, FTRUNC_U_D_DESC;
2781 def FTINT_S_W : FTINT_S_W_ENC, FTINT_S_W_DESC;
2782 def FTINT_S_D : FTINT_S_D_ENC, FTINT_S_D_DESC;
2784 def FTINT_U_W : FTINT_U_W_ENC, FTINT_U_W_DESC;
2785 def FTINT_U_D : FTINT_U_D_ENC, FTINT_U_D_DESC;
2787 def FTQ_H : FTQ_H_ENC, FTQ_H_DESC;
2788 def FTQ_W : FTQ_W_ENC, FTQ_W_DESC;
2790 def HADD_S_H : HADD_S_H_ENC, HADD_S_H_DESC;
2791 def HADD_S_W : HADD_S_W_ENC, HADD_S_W_DESC;
2792 def HADD_S_D : HADD_S_D_ENC, HADD_S_D_DESC;
2794 def HADD_U_H : HADD_U_H_ENC, HADD_U_H_DESC;
2795 def HADD_U_W : HADD_U_W_ENC, HADD_U_W_DESC;
2796 def HADD_U_D : HADD_U_D_ENC, HADD_U_D_DESC;
2798 def HSUB_S_H : HSUB_S_H_ENC, HSUB_S_H_DESC;
2799 def HSUB_S_W : HSUB_S_W_ENC, HSUB_S_W_DESC;
2800 def HSUB_S_D : HSUB_S_D_ENC, HSUB_S_D_DESC;
2802 def HSUB_U_H : HSUB_U_H_ENC, HSUB_U_H_DESC;
2803 def HSUB_U_W : HSUB_U_W_ENC, HSUB_U_W_DESC;
2804 def HSUB_U_D : HSUB_U_D_ENC, HSUB_U_D_DESC;
2806 def ILVEV_B : ILVEV_B_ENC, ILVEV_B_DESC;
2807 def ILVEV_H : ILVEV_H_ENC, ILVEV_H_DESC;
2808 def ILVEV_W : ILVEV_W_ENC, ILVEV_W_DESC;
2809 def ILVEV_D : ILVEV_D_ENC, ILVEV_D_DESC;
2811 def ILVL_B : ILVL_B_ENC, ILVL_B_DESC;
2812 def ILVL_H : ILVL_H_ENC, ILVL_H_DESC;
2813 def ILVL_W : ILVL_W_ENC, ILVL_W_DESC;
2814 def ILVL_D : ILVL_D_ENC, ILVL_D_DESC;
2816 def ILVOD_B : ILVOD_B_ENC, ILVOD_B_DESC;
2817 def ILVOD_H : ILVOD_H_ENC, ILVOD_H_DESC;
2818 def ILVOD_W : ILVOD_W_ENC, ILVOD_W_DESC;
2819 def ILVOD_D : ILVOD_D_ENC, ILVOD_D_DESC;
2821 def ILVR_B : ILVR_B_ENC, ILVR_B_DESC;
2822 def ILVR_H : ILVR_H_ENC, ILVR_H_DESC;
2823 def ILVR_W : ILVR_W_ENC, ILVR_W_DESC;
2824 def ILVR_D : ILVR_D_ENC, ILVR_D_DESC;
2826 def INSERT_B : INSERT_B_ENC, INSERT_B_DESC;
2827 def INSERT_H : INSERT_H_ENC, INSERT_H_DESC;
2828 def INSERT_W : INSERT_W_ENC, INSERT_W_DESC;
2830 def INSVE_B : INSVE_B_ENC, INSVE_B_DESC;
2831 def INSVE_H : INSVE_H_ENC, INSVE_H_DESC;
2832 def INSVE_W : INSVE_W_ENC, INSVE_W_DESC;
2833 def INSVE_D : INSVE_D_ENC, INSVE_D_DESC;
2835 def LD_B: LD_B_ENC, LD_B_DESC;
2836 def LD_H: LD_H_ENC, LD_H_DESC;
2837 def LD_W: LD_W_ENC, LD_W_DESC;
2838 def LD_D: LD_D_ENC, LD_D_DESC;
2840 def LDI_B : LDI_B_ENC, LDI_B_DESC;
2841 def LDI_H : LDI_H_ENC, LDI_H_DESC;
2842 def LDI_W : LDI_W_ENC, LDI_W_DESC;
2843 def LDI_D : LDI_D_ENC, LDI_D_DESC;
2845 def LDX_B: LDX_B_ENC, LDX_B_DESC;
2846 def LDX_H: LDX_H_ENC, LDX_H_DESC;
2847 def LDX_W: LDX_W_ENC, LDX_W_DESC;
2848 def LDX_D: LDX_D_ENC, LDX_D_DESC;
2850 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
2851 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
2853 def MADDR_Q_H : MADDR_Q_H_ENC, MADDR_Q_H_DESC;
2854 def MADDR_Q_W : MADDR_Q_W_ENC, MADDR_Q_W_DESC;
2856 def MADDV_B : MADDV_B_ENC, MADDV_B_DESC;
2857 def MADDV_H : MADDV_H_ENC, MADDV_H_DESC;
2858 def MADDV_W : MADDV_W_ENC, MADDV_W_DESC;
2859 def MADDV_D : MADDV_D_ENC, MADDV_D_DESC;
2861 def MAX_A_B : MAX_A_B_ENC, MAX_A_B_DESC;
2862 def MAX_A_H : MAX_A_H_ENC, MAX_A_H_DESC;
2863 def MAX_A_W : MAX_A_W_ENC, MAX_A_W_DESC;
2864 def MAX_A_D : MAX_A_D_ENC, MAX_A_D_DESC;
2866 def MAX_S_B : MAX_S_B_ENC, MAX_S_B_DESC;
2867 def MAX_S_H : MAX_S_H_ENC, MAX_S_H_DESC;
2868 def MAX_S_W : MAX_S_W_ENC, MAX_S_W_DESC;
2869 def MAX_S_D : MAX_S_D_ENC, MAX_S_D_DESC;
2871 def MAX_U_B : MAX_U_B_ENC, MAX_U_B_DESC;
2872 def MAX_U_H : MAX_U_H_ENC, MAX_U_H_DESC;
2873 def MAX_U_W : MAX_U_W_ENC, MAX_U_W_DESC;
2874 def MAX_U_D : MAX_U_D_ENC, MAX_U_D_DESC;
2876 def MAXI_S_B : MAXI_S_B_ENC, MAXI_S_B_DESC;
2877 def MAXI_S_H : MAXI_S_H_ENC, MAXI_S_H_DESC;
2878 def MAXI_S_W : MAXI_S_W_ENC, MAXI_S_W_DESC;
2879 def MAXI_S_D : MAXI_S_D_ENC, MAXI_S_D_DESC;
2881 def MAXI_U_B : MAXI_U_B_ENC, MAXI_U_B_DESC;
2882 def MAXI_U_H : MAXI_U_H_ENC, MAXI_U_H_DESC;
2883 def MAXI_U_W : MAXI_U_W_ENC, MAXI_U_W_DESC;
2884 def MAXI_U_D : MAXI_U_D_ENC, MAXI_U_D_DESC;
2886 def MIN_A_B : MIN_A_B_ENC, MIN_A_B_DESC;
2887 def MIN_A_H : MIN_A_H_ENC, MIN_A_H_DESC;
2888 def MIN_A_W : MIN_A_W_ENC, MIN_A_W_DESC;
2889 def MIN_A_D : MIN_A_D_ENC, MIN_A_D_DESC;
2891 def MIN_S_B : MIN_S_B_ENC, MIN_S_B_DESC;
2892 def MIN_S_H : MIN_S_H_ENC, MIN_S_H_DESC;
2893 def MIN_S_W : MIN_S_W_ENC, MIN_S_W_DESC;
2894 def MIN_S_D : MIN_S_D_ENC, MIN_S_D_DESC;
2896 def MIN_U_B : MIN_U_B_ENC, MIN_U_B_DESC;
2897 def MIN_U_H : MIN_U_H_ENC, MIN_U_H_DESC;
2898 def MIN_U_W : MIN_U_W_ENC, MIN_U_W_DESC;
2899 def MIN_U_D : MIN_U_D_ENC, MIN_U_D_DESC;
2901 def MINI_S_B : MINI_S_B_ENC, MINI_S_B_DESC;
2902 def MINI_S_H : MINI_S_H_ENC, MINI_S_H_DESC;
2903 def MINI_S_W : MINI_S_W_ENC, MINI_S_W_DESC;
2904 def MINI_S_D : MINI_S_D_ENC, MINI_S_D_DESC;
2906 def MINI_U_B : MINI_U_B_ENC, MINI_U_B_DESC;
2907 def MINI_U_H : MINI_U_H_ENC, MINI_U_H_DESC;
2908 def MINI_U_W : MINI_U_W_ENC, MINI_U_W_DESC;
2909 def MINI_U_D : MINI_U_D_ENC, MINI_U_D_DESC;
2911 def MOD_S_B : MOD_S_B_ENC, MOD_S_B_DESC;
2912 def MOD_S_H : MOD_S_H_ENC, MOD_S_H_DESC;
2913 def MOD_S_W : MOD_S_W_ENC, MOD_S_W_DESC;
2914 def MOD_S_D : MOD_S_D_ENC, MOD_S_D_DESC;
2916 def MOD_U_B : MOD_U_B_ENC, MOD_U_B_DESC;
2917 def MOD_U_H : MOD_U_H_ENC, MOD_U_H_DESC;
2918 def MOD_U_W : MOD_U_W_ENC, MOD_U_W_DESC;
2919 def MOD_U_D : MOD_U_D_ENC, MOD_U_D_DESC;
2921 def MOVE_V : MOVE_V_ENC, MOVE_V_DESC;
2923 def MSUB_Q_H : MSUB_Q_H_ENC, MSUB_Q_H_DESC;
2924 def MSUB_Q_W : MSUB_Q_W_ENC, MSUB_Q_W_DESC;
2926 def MSUBR_Q_H : MSUBR_Q_H_ENC, MSUBR_Q_H_DESC;
2927 def MSUBR_Q_W : MSUBR_Q_W_ENC, MSUBR_Q_W_DESC;
2929 def MSUBV_B : MSUBV_B_ENC, MSUBV_B_DESC;
2930 def MSUBV_H : MSUBV_H_ENC, MSUBV_H_DESC;
2931 def MSUBV_W : MSUBV_W_ENC, MSUBV_W_DESC;
2932 def MSUBV_D : MSUBV_D_ENC, MSUBV_D_DESC;
2934 def MUL_Q_H : MUL_Q_H_ENC, MUL_Q_H_DESC;
2935 def MUL_Q_W : MUL_Q_W_ENC, MUL_Q_W_DESC;
2937 def MULR_Q_H : MULR_Q_H_ENC, MULR_Q_H_DESC;
2938 def MULR_Q_W : MULR_Q_W_ENC, MULR_Q_W_DESC;
2940 def MULV_B : MULV_B_ENC, MULV_B_DESC;
2941 def MULV_H : MULV_H_ENC, MULV_H_DESC;
2942 def MULV_W : MULV_W_ENC, MULV_W_DESC;
2943 def MULV_D : MULV_D_ENC, MULV_D_DESC;
2945 def NLOC_B : NLOC_B_ENC, NLOC_B_DESC;
2946 def NLOC_H : NLOC_H_ENC, NLOC_H_DESC;
2947 def NLOC_W : NLOC_W_ENC, NLOC_W_DESC;
2948 def NLOC_D : NLOC_D_ENC, NLOC_D_DESC;
2950 def NLZC_B : NLZC_B_ENC, NLZC_B_DESC;
2951 def NLZC_H : NLZC_H_ENC, NLZC_H_DESC;
2952 def NLZC_W : NLZC_W_ENC, NLZC_W_DESC;
2953 def NLZC_D : NLZC_D_ENC, NLZC_D_DESC;
2955 def NOR_V : NOR_V_ENC, NOR_V_DESC;
2956 def NOR_V_H_PSEUDO : NOR_V_H_PSEUDO_DESC,
2957 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2958 MSA128B:$ws, MSA128B:$wt)>;
2959 def NOR_V_W_PSEUDO : NOR_V_W_PSEUDO_DESC,
2960 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2961 MSA128B:$ws, MSA128B:$wt)>;
2962 def NOR_V_D_PSEUDO : NOR_V_D_PSEUDO_DESC,
2963 PseudoInstExpansion<(NOR_V MSA128B:$wd,
2964 MSA128B:$ws, MSA128B:$wt)>;
2966 def NORI_B : NORI_B_ENC, NORI_B_DESC;
2968 def OR_V : OR_V_ENC, OR_V_DESC;
2969 def OR_V_H_PSEUDO : OR_V_H_PSEUDO_DESC,
2970 PseudoInstExpansion<(OR_V MSA128B:$wd,
2971 MSA128B:$ws, MSA128B:$wt)>;
2972 def OR_V_W_PSEUDO : OR_V_W_PSEUDO_DESC,
2973 PseudoInstExpansion<(OR_V MSA128B:$wd,
2974 MSA128B:$ws, MSA128B:$wt)>;
2975 def OR_V_D_PSEUDO : OR_V_D_PSEUDO_DESC,
2976 PseudoInstExpansion<(OR_V MSA128B:$wd,
2977 MSA128B:$ws, MSA128B:$wt)>;
2979 def ORI_B : ORI_B_ENC, ORI_B_DESC;
2981 def PCKEV_B : PCKEV_B_ENC, PCKEV_B_DESC;
2982 def PCKEV_H : PCKEV_H_ENC, PCKEV_H_DESC;
2983 def PCKEV_W : PCKEV_W_ENC, PCKEV_W_DESC;
2984 def PCKEV_D : PCKEV_D_ENC, PCKEV_D_DESC;
2986 def PCKOD_B : PCKOD_B_ENC, PCKOD_B_DESC;
2987 def PCKOD_H : PCKOD_H_ENC, PCKOD_H_DESC;
2988 def PCKOD_W : PCKOD_W_ENC, PCKOD_W_DESC;
2989 def PCKOD_D : PCKOD_D_ENC, PCKOD_D_DESC;
2991 def PCNT_B : PCNT_B_ENC, PCNT_B_DESC;
2992 def PCNT_H : PCNT_H_ENC, PCNT_H_DESC;
2993 def PCNT_W : PCNT_W_ENC, PCNT_W_DESC;
2994 def PCNT_D : PCNT_D_ENC, PCNT_D_DESC;
2996 def SAT_S_B : SAT_S_B_ENC, SAT_S_B_DESC;
2997 def SAT_S_H : SAT_S_H_ENC, SAT_S_H_DESC;
2998 def SAT_S_W : SAT_S_W_ENC, SAT_S_W_DESC;
2999 def SAT_S_D : SAT_S_D_ENC, SAT_S_D_DESC;
3001 def SAT_U_B : SAT_U_B_ENC, SAT_U_B_DESC;
3002 def SAT_U_H : SAT_U_H_ENC, SAT_U_H_DESC;
3003 def SAT_U_W : SAT_U_W_ENC, SAT_U_W_DESC;
3004 def SAT_U_D : SAT_U_D_ENC, SAT_U_D_DESC;
3006 def SHF_B : SHF_B_ENC, SHF_B_DESC;
3007 def SHF_H : SHF_H_ENC, SHF_H_DESC;
3008 def SHF_W : SHF_W_ENC, SHF_W_DESC;
3010 def SLD_B : SLD_B_ENC, SLD_B_DESC;
3011 def SLD_H : SLD_H_ENC, SLD_H_DESC;
3012 def SLD_W : SLD_W_ENC, SLD_W_DESC;
3013 def SLD_D : SLD_D_ENC, SLD_D_DESC;
3015 def SLDI_B : SLDI_B_ENC, SLDI_B_DESC;
3016 def SLDI_H : SLDI_H_ENC, SLDI_H_DESC;
3017 def SLDI_W : SLDI_W_ENC, SLDI_W_DESC;
3018 def SLDI_D : SLDI_D_ENC, SLDI_D_DESC;
3020 def SLL_B : SLL_B_ENC, SLL_B_DESC;
3021 def SLL_H : SLL_H_ENC, SLL_H_DESC;
3022 def SLL_W : SLL_W_ENC, SLL_W_DESC;
3023 def SLL_D : SLL_D_ENC, SLL_D_DESC;
3025 def SLLI_B : SLLI_B_ENC, SLLI_B_DESC;
3026 def SLLI_H : SLLI_H_ENC, SLLI_H_DESC;
3027 def SLLI_W : SLLI_W_ENC, SLLI_W_DESC;
3028 def SLLI_D : SLLI_D_ENC, SLLI_D_DESC;
3030 def SPLAT_B : SPLAT_B_ENC, SPLAT_B_DESC;
3031 def SPLAT_H : SPLAT_H_ENC, SPLAT_H_DESC;
3032 def SPLAT_W : SPLAT_W_ENC, SPLAT_W_DESC;
3033 def SPLAT_D : SPLAT_D_ENC, SPLAT_D_DESC;
3035 def SPLATI_B : SPLATI_B_ENC, SPLATI_B_DESC;
3036 def SPLATI_H : SPLATI_H_ENC, SPLATI_H_DESC;
3037 def SPLATI_W : SPLATI_W_ENC, SPLATI_W_DESC;
3038 def SPLATI_D : SPLATI_D_ENC, SPLATI_D_DESC;
3040 def SRA_B : SRA_B_ENC, SRA_B_DESC;
3041 def SRA_H : SRA_H_ENC, SRA_H_DESC;
3042 def SRA_W : SRA_W_ENC, SRA_W_DESC;
3043 def SRA_D : SRA_D_ENC, SRA_D_DESC;
3045 def SRAI_B : SRAI_B_ENC, SRAI_B_DESC;
3046 def SRAI_H : SRAI_H_ENC, SRAI_H_DESC;
3047 def SRAI_W : SRAI_W_ENC, SRAI_W_DESC;
3048 def SRAI_D : SRAI_D_ENC, SRAI_D_DESC;
3050 def SRAR_B : SRAR_B_ENC, SRAR_B_DESC;
3051 def SRAR_H : SRAR_H_ENC, SRAR_H_DESC;
3052 def SRAR_W : SRAR_W_ENC, SRAR_W_DESC;
3053 def SRAR_D : SRAR_D_ENC, SRAR_D_DESC;
3055 def SRARI_B : SRARI_B_ENC, SRARI_B_DESC;
3056 def SRARI_H : SRARI_H_ENC, SRARI_H_DESC;
3057 def SRARI_W : SRARI_W_ENC, SRARI_W_DESC;
3058 def SRARI_D : SRARI_D_ENC, SRARI_D_DESC;
3060 def SRL_B : SRL_B_ENC, SRL_B_DESC;
3061 def SRL_H : SRL_H_ENC, SRL_H_DESC;
3062 def SRL_W : SRL_W_ENC, SRL_W_DESC;
3063 def SRL_D : SRL_D_ENC, SRL_D_DESC;
3065 def SRLI_B : SRLI_B_ENC, SRLI_B_DESC;
3066 def SRLI_H : SRLI_H_ENC, SRLI_H_DESC;
3067 def SRLI_W : SRLI_W_ENC, SRLI_W_DESC;
3068 def SRLI_D : SRLI_D_ENC, SRLI_D_DESC;
3070 def SRLR_B : SRLR_B_ENC, SRLR_B_DESC;
3071 def SRLR_H : SRLR_H_ENC, SRLR_H_DESC;
3072 def SRLR_W : SRLR_W_ENC, SRLR_W_DESC;
3073 def SRLR_D : SRLR_D_ENC, SRLR_D_DESC;
3075 def SRLRI_B : SRLRI_B_ENC, SRLRI_B_DESC;
3076 def SRLRI_H : SRLRI_H_ENC, SRLRI_H_DESC;
3077 def SRLRI_W : SRLRI_W_ENC, SRLRI_W_DESC;
3078 def SRLRI_D : SRLRI_D_ENC, SRLRI_D_DESC;
3080 def ST_B: ST_B_ENC, ST_B_DESC;
3081 def ST_H: ST_H_ENC, ST_H_DESC;
3082 def ST_W: ST_W_ENC, ST_W_DESC;
3083 def ST_D: ST_D_ENC, ST_D_DESC;
3085 def STX_B: STX_B_ENC, STX_B_DESC;
3086 def STX_H: STX_H_ENC, STX_H_DESC;
3087 def STX_W: STX_W_ENC, STX_W_DESC;
3088 def STX_D: STX_D_ENC, STX_D_DESC;
3090 def SUBS_S_B : SUBS_S_B_ENC, SUBS_S_B_DESC;
3091 def SUBS_S_H : SUBS_S_H_ENC, SUBS_S_H_DESC;
3092 def SUBS_S_W : SUBS_S_W_ENC, SUBS_S_W_DESC;
3093 def SUBS_S_D : SUBS_S_D_ENC, SUBS_S_D_DESC;
3095 def SUBS_U_B : SUBS_U_B_ENC, SUBS_U_B_DESC;
3096 def SUBS_U_H : SUBS_U_H_ENC, SUBS_U_H_DESC;
3097 def SUBS_U_W : SUBS_U_W_ENC, SUBS_U_W_DESC;
3098 def SUBS_U_D : SUBS_U_D_ENC, SUBS_U_D_DESC;
3100 def SUBSUS_U_B : SUBSUS_U_B_ENC, SUBSUS_U_B_DESC;
3101 def SUBSUS_U_H : SUBSUS_U_H_ENC, SUBSUS_U_H_DESC;
3102 def SUBSUS_U_W : SUBSUS_U_W_ENC, SUBSUS_U_W_DESC;
3103 def SUBSUS_U_D : SUBSUS_U_D_ENC, SUBSUS_U_D_DESC;
3105 def SUBSUU_S_B : SUBSUU_S_B_ENC, SUBSUU_S_B_DESC;
3106 def SUBSUU_S_H : SUBSUU_S_H_ENC, SUBSUU_S_H_DESC;
3107 def SUBSUU_S_W : SUBSUU_S_W_ENC, SUBSUU_S_W_DESC;
3108 def SUBSUU_S_D : SUBSUU_S_D_ENC, SUBSUU_S_D_DESC;
3110 def SUBV_B : SUBV_B_ENC, SUBV_B_DESC;
3111 def SUBV_H : SUBV_H_ENC, SUBV_H_DESC;
3112 def SUBV_W : SUBV_W_ENC, SUBV_W_DESC;
3113 def SUBV_D : SUBV_D_ENC, SUBV_D_DESC;
3115 def SUBVI_B : SUBVI_B_ENC, SUBVI_B_DESC;
3116 def SUBVI_H : SUBVI_H_ENC, SUBVI_H_DESC;
3117 def SUBVI_W : SUBVI_W_ENC, SUBVI_W_DESC;
3118 def SUBVI_D : SUBVI_D_ENC, SUBVI_D_DESC;
3120 def VSHF_B : VSHF_B_ENC, VSHF_B_DESC;
3121 def VSHF_H : VSHF_H_ENC, VSHF_H_DESC;
3122 def VSHF_W : VSHF_W_ENC, VSHF_W_DESC;
3123 def VSHF_D : VSHF_D_ENC, VSHF_D_DESC;
3125 def XOR_V : XOR_V_ENC, XOR_V_DESC;
3126 def XOR_V_H_PSEUDO : XOR_V_H_PSEUDO_DESC,
3127 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3128 MSA128B:$ws, MSA128B:$wt)>;
3129 def XOR_V_W_PSEUDO : XOR_V_W_PSEUDO_DESC,
3130 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3131 MSA128B:$ws, MSA128B:$wt)>;
3132 def XOR_V_D_PSEUDO : XOR_V_D_PSEUDO_DESC,
3133 PseudoInstExpansion<(XOR_V MSA128B:$wd,
3134 MSA128B:$ws, MSA128B:$wt)>;
3136 def XORI_B : XORI_B_ENC, XORI_B_DESC;
3139 class MSAPat<dag pattern, dag result, list<Predicate> pred = [HasMSA]> :
3140 Pat<pattern, result>, Requires<pred>;
3142 def : MSAPat<(extractelt (v4i32 MSA128W:$ws), immZExt4:$idx),
3143 (COPY_S_W MSA128W:$ws, immZExt4:$idx)>;
3145 def : MSAPat<(v16i8 (load addr:$addr)), (LD_B addr:$addr)>;
3146 def : MSAPat<(v8i16 (load addr:$addr)), (LD_H addr:$addr)>;
3147 def : MSAPat<(v4i32 (load addr:$addr)), (LD_W addr:$addr)>;
3148 def : MSAPat<(v2i64 (load addr:$addr)), (LD_D addr:$addr)>;
3149 def : MSAPat<(v8f16 (load addr:$addr)), (LD_H addr:$addr)>;
3150 def : MSAPat<(v4f32 (load addr:$addr)), (LD_W addr:$addr)>;
3151 def : MSAPat<(v2f64 (load addr:$addr)), (LD_D addr:$addr)>;
3153 def : MSAPat<(v8f16 (load addrRegImm:$addr)), (LD_H addrRegImm:$addr)>;
3154 def : MSAPat<(v4f32 (load addrRegImm:$addr)), (LD_W addrRegImm:$addr)>;
3155 def : MSAPat<(v2f64 (load addrRegImm:$addr)), (LD_D addrRegImm:$addr)>;
3157 def : MSAPat<(store (v16i8 MSA128B:$ws), addr:$addr),
3158 (ST_B MSA128B:$ws, addr:$addr)>;
3159 def : MSAPat<(store (v8i16 MSA128H:$ws), addr:$addr),
3160 (ST_H MSA128H:$ws, addr:$addr)>;
3161 def : MSAPat<(store (v4i32 MSA128W:$ws), addr:$addr),
3162 (ST_W MSA128W:$ws, addr:$addr)>;
3163 def : MSAPat<(store (v2i64 MSA128D:$ws), addr:$addr),
3164 (ST_D MSA128D:$ws, addr:$addr)>;
3165 def : MSAPat<(store (v8f16 MSA128H:$ws), addr:$addr),
3166 (ST_H MSA128H:$ws, addr:$addr)>;
3167 def : MSAPat<(store (v4f32 MSA128W:$ws), addr:$addr),
3168 (ST_W MSA128W:$ws, addr:$addr)>;
3169 def : MSAPat<(store (v2f64 MSA128D:$ws), addr:$addr),
3170 (ST_D MSA128D:$ws, addr:$addr)>;
3172 def ST_FH : MSAPat<(store (v8f16 MSA128H:$ws), addrRegImm:$addr),
3173 (ST_H MSA128H:$ws, addrRegImm:$addr)>;
3174 def ST_FW : MSAPat<(store (v4f32 MSA128W:$ws), addrRegImm:$addr),
3175 (ST_W MSA128W:$ws, addrRegImm:$addr)>;
3176 def ST_FD : MSAPat<(store (v2f64 MSA128D:$ws), addrRegImm:$addr),
3177 (ST_D MSA128D:$ws, addrRegImm:$addr)>;
3179 class MSA_FABS_PSEUDO_DESC_BASE<RegisterOperand ROWD,
3180 RegisterOperand ROWS = ROWD,
3181 InstrItinClass itin = NoItinerary> :
3182 MipsPseudo<(outs ROWD:$wd),
3184 [(set ROWD:$wd, (fabs ROWS:$ws))]> {
3185 InstrItinClass Itinerary = itin;
3187 def FABS_W : MSA_FABS_PSEUDO_DESC_BASE<MSA128WOpnd>,
3188 PseudoInstExpansion<(FMAX_A_W MSA128WOpnd:$wd, MSA128WOpnd:$ws,
3190 def FABS_D : MSA_FABS_PSEUDO_DESC_BASE<MSA128DOpnd>,
3191 PseudoInstExpansion<(FMAX_A_D MSA128DOpnd:$wd, MSA128DOpnd:$ws,
3194 class MSABitconvertPat<ValueType DstVT, ValueType SrcVT,
3195 RegisterClass DstRC, list<Predicate> preds = [HasMSA]> :
3196 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3197 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3199 // These are endian-independant because the element size doesnt change
3200 def : MSABitconvertPat<v8i16, v8f16, MSA128H>;
3201 def : MSABitconvertPat<v4i32, v4f32, MSA128W>;
3202 def : MSABitconvertPat<v2i64, v2f64, MSA128D>;
3203 def : MSABitconvertPat<v8f16, v8i16, MSA128H>;
3204 def : MSABitconvertPat<v4f32, v4i32, MSA128W>;
3205 def : MSABitconvertPat<v2f64, v2i64, MSA128D>;
3207 // Little endian bitcasts are always no-ops
3208 def : MSABitconvertPat<v16i8, v8i16, MSA128B, [HasMSA, IsLE]>;
3209 def : MSABitconvertPat<v16i8, v4i32, MSA128B, [HasMSA, IsLE]>;
3210 def : MSABitconvertPat<v16i8, v2i64, MSA128B, [HasMSA, IsLE]>;
3211 def : MSABitconvertPat<v16i8, v8f16, MSA128B, [HasMSA, IsLE]>;
3212 def : MSABitconvertPat<v16i8, v4f32, MSA128B, [HasMSA, IsLE]>;
3213 def : MSABitconvertPat<v16i8, v2f64, MSA128B, [HasMSA, IsLE]>;
3215 def : MSABitconvertPat<v8i16, v16i8, MSA128H, [HasMSA, IsLE]>;
3216 def : MSABitconvertPat<v8i16, v4i32, MSA128H, [HasMSA, IsLE]>;
3217 def : MSABitconvertPat<v8i16, v2i64, MSA128H, [HasMSA, IsLE]>;
3218 def : MSABitconvertPat<v8i16, v4f32, MSA128H, [HasMSA, IsLE]>;
3219 def : MSABitconvertPat<v8i16, v2f64, MSA128H, [HasMSA, IsLE]>;
3221 def : MSABitconvertPat<v4i32, v16i8, MSA128W, [HasMSA, IsLE]>;
3222 def : MSABitconvertPat<v4i32, v8i16, MSA128W, [HasMSA, IsLE]>;
3223 def : MSABitconvertPat<v4i32, v2i64, MSA128W, [HasMSA, IsLE]>;
3224 def : MSABitconvertPat<v4i32, v8f16, MSA128W, [HasMSA, IsLE]>;
3225 def : MSABitconvertPat<v4i32, v2f64, MSA128W, [HasMSA, IsLE]>;
3227 def : MSABitconvertPat<v2i64, v16i8, MSA128D, [HasMSA, IsLE]>;
3228 def : MSABitconvertPat<v2i64, v8i16, MSA128D, [HasMSA, IsLE]>;
3229 def : MSABitconvertPat<v2i64, v4i32, MSA128D, [HasMSA, IsLE]>;
3230 def : MSABitconvertPat<v2i64, v8f16, MSA128D, [HasMSA, IsLE]>;
3231 def : MSABitconvertPat<v2i64, v4f32, MSA128D, [HasMSA, IsLE]>;
3233 def : MSABitconvertPat<v4f32, v16i8, MSA128W, [HasMSA, IsLE]>;
3234 def : MSABitconvertPat<v4f32, v8i16, MSA128W, [HasMSA, IsLE]>;
3235 def : MSABitconvertPat<v4f32, v2i64, MSA128W, [HasMSA, IsLE]>;
3236 def : MSABitconvertPat<v4f32, v8f16, MSA128W, [HasMSA, IsLE]>;
3237 def : MSABitconvertPat<v4f32, v2f64, MSA128W, [HasMSA, IsLE]>;
3239 def : MSABitconvertPat<v2f64, v16i8, MSA128D, [HasMSA, IsLE]>;
3240 def : MSABitconvertPat<v2f64, v8i16, MSA128D, [HasMSA, IsLE]>;
3241 def : MSABitconvertPat<v2f64, v4i32, MSA128D, [HasMSA, IsLE]>;
3242 def : MSABitconvertPat<v2f64, v8f16, MSA128D, [HasMSA, IsLE]>;
3243 def : MSABitconvertPat<v2f64, v4f32, MSA128D, [HasMSA, IsLE]>;
3245 // Big endian bitcasts expand to shuffle instructions.
3246 // This is because bitcast is defined to be a store/load sequence and the
3247 // vector store/load instructions are mixed-endian with respect to the vector
3248 // as a whole (little endian with respect to element order, but big endian
3251 class MSABitconvertReverseQuartersPat<ValueType DstVT, ValueType SrcVT,
3252 RegisterClass DstRC, MSAInst Insn,
3253 RegisterClass ViaRC> :
3254 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3255 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3259 class MSABitconvertReverseHalvesPat<ValueType DstVT, ValueType SrcVT,
3260 RegisterClass DstRC, MSAInst Insn,
3261 RegisterClass ViaRC> :
3262 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3263 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3267 class MSABitconvertReverseBInHPat<ValueType DstVT, ValueType SrcVT,
3268 RegisterClass DstRC> :
3269 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3271 class MSABitconvertReverseBInWPat<ValueType DstVT, ValueType SrcVT,
3272 RegisterClass DstRC> :
3273 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_B, MSA128B>;
3275 class MSABitconvertReverseBInDPat<ValueType DstVT, ValueType SrcVT,
3276 RegisterClass DstRC> :
3277 MSAPat<(DstVT (bitconvert SrcVT:$src)),
3281 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3286 class MSABitconvertReverseHInWPat<ValueType DstVT, ValueType SrcVT,
3287 RegisterClass DstRC> :
3288 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3290 class MSABitconvertReverseHInDPat<ValueType DstVT, ValueType SrcVT,
3291 RegisterClass DstRC> :
3292 MSABitconvertReverseQuartersPat<DstVT, SrcVT, DstRC, SHF_H, MSA128H>;
3294 class MSABitconvertReverseWInDPat<ValueType DstVT, ValueType SrcVT,
3295 RegisterClass DstRC> :
3296 MSABitconvertReverseHalvesPat<DstVT, SrcVT, DstRC, SHF_W, MSA128W>;
3298 def : MSABitconvertReverseBInHPat<v8i16, v16i8, MSA128H>;
3299 def : MSABitconvertReverseBInHPat<v8f16, v16i8, MSA128H>;
3300 def : MSABitconvertReverseBInWPat<v4i32, v16i8, MSA128W>;
3301 def : MSABitconvertReverseBInWPat<v4f32, v16i8, MSA128W>;
3302 def : MSABitconvertReverseBInDPat<v2i64, v16i8, MSA128D>;
3303 def : MSABitconvertReverseBInDPat<v2f64, v16i8, MSA128D>;
3305 def : MSABitconvertReverseBInHPat<v16i8, v8i16, MSA128B>;
3306 def : MSABitconvertReverseHInWPat<v4i32, v8i16, MSA128W>;
3307 def : MSABitconvertReverseHInWPat<v4f32, v8i16, MSA128W>;
3308 def : MSABitconvertReverseHInDPat<v2i64, v8i16, MSA128D>;
3309 def : MSABitconvertReverseHInDPat<v2f64, v8i16, MSA128D>;
3311 def : MSABitconvertReverseBInHPat<v16i8, v8f16, MSA128B>;
3312 def : MSABitconvertReverseHInWPat<v4i32, v8f16, MSA128W>;
3313 def : MSABitconvertReverseHInWPat<v4f32, v8f16, MSA128W>;
3314 def : MSABitconvertReverseHInDPat<v2i64, v8f16, MSA128D>;
3315 def : MSABitconvertReverseHInDPat<v2f64, v8f16, MSA128D>;
3317 def : MSABitconvertReverseBInWPat<v16i8, v4i32, MSA128B>;
3318 def : MSABitconvertReverseHInWPat<v8i16, v4i32, MSA128H>;
3319 def : MSABitconvertReverseHInWPat<v8f16, v4i32, MSA128H>;
3320 def : MSABitconvertReverseWInDPat<v2i64, v4i32, MSA128D>;
3321 def : MSABitconvertReverseWInDPat<v2f64, v4i32, MSA128D>;
3323 def : MSABitconvertReverseBInWPat<v16i8, v4f32, MSA128B>;
3324 def : MSABitconvertReverseHInWPat<v8i16, v4f32, MSA128H>;
3325 def : MSABitconvertReverseHInWPat<v8f16, v4f32, MSA128H>;
3326 def : MSABitconvertReverseWInDPat<v2i64, v4f32, MSA128D>;
3327 def : MSABitconvertReverseWInDPat<v2f64, v4f32, MSA128D>;
3329 def : MSABitconvertReverseBInDPat<v16i8, v2i64, MSA128B>;
3330 def : MSABitconvertReverseHInDPat<v8i16, v2i64, MSA128H>;
3331 def : MSABitconvertReverseHInDPat<v8f16, v2i64, MSA128H>;
3332 def : MSABitconvertReverseWInDPat<v4i32, v2i64, MSA128W>;
3333 def : MSABitconvertReverseWInDPat<v4f32, v2i64, MSA128W>;
3335 def : MSABitconvertReverseBInDPat<v16i8, v2f64, MSA128B>;
3336 def : MSABitconvertReverseHInDPat<v8i16, v2f64, MSA128H>;
3337 def : MSABitconvertReverseHInDPat<v8f16, v2f64, MSA128H>;
3338 def : MSABitconvertReverseWInDPat<v4i32, v2f64, MSA128W>;
3339 def : MSABitconvertReverseWInDPat<v4f32, v2f64, MSA128W>;
3341 // Pseudos used to implement BNZ.df, and BZ.df
3343 class MSA_CBRANCH_PSEUDO_DESC_BASE<SDPatternOperator OpNode, ValueType TyNode,
3345 InstrItinClass itin = NoItinerary> :
3346 MipsPseudo<(outs GPR32:$dst),
3348 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3349 bit usesCustomInserter = 1;
3352 def SNZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v16i8,
3353 MSA128B, NoItinerary>;
3354 def SNZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v8i16,
3355 MSA128H, NoItinerary>;
3356 def SNZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v4i32,
3357 MSA128W, NoItinerary>;
3358 def SNZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllNonZero, v2i64,
3359 MSA128D, NoItinerary>;
3360 def SNZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyNonZero, v16i8,
3361 MSA128B, NoItinerary>;
3363 def SZ_B_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v16i8,
3364 MSA128B, NoItinerary>;
3365 def SZ_H_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v8i16,
3366 MSA128H, NoItinerary>;
3367 def SZ_W_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v4i32,
3368 MSA128W, NoItinerary>;
3369 def SZ_D_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAllZero, v2i64,
3370 MSA128D, NoItinerary>;
3371 def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
3372 MSA128B, NoItinerary>;