1 //===- MipsMSAInstrFormats.td - Mips Instruction Formats ---*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 def HasMSA : Predicate<"Subtarget.hasMSA()">,
11 AssemblerPredicate<"FeatureMSA">;
13 class MSAInst : MipsInst<(outs), (ins), "", [], NoItinerary, FrmOther> {
14 let Predicates = [HasMSA];
15 let Inst{31-26} = 0b011110;
18 class MSA64Inst : MSAInst {
19 let Predicates = [HasMSA, HasMips64];
22 class MSACBranch : MSAInst {
23 let Inst{31-26} = 0b010001;
26 class MSASpecial : MSAInst {
27 let Inst{31-26} = 0b000000;
30 class MSAPseudo<dag outs, dag ins, list<dag> pattern,
31 InstrItinClass itin = IIPseudo>:
32 MipsPseudo<outs, ins, pattern, itin> {
33 let Predicates = [HasMSA];
36 class MSA_BIT_B_FMT<bits<3> major, bits<6> minor>: MSAInst {
41 let Inst{25-23} = major;
42 let Inst{22-19} = 0b1110;
46 let Inst{5-0} = minor;
49 class MSA_BIT_H_FMT<bits<3> major, bits<6> minor>: MSAInst {
54 let Inst{25-23} = major;
55 let Inst{22-20} = 0b110;
59 let Inst{5-0} = minor;
62 class MSA_BIT_W_FMT<bits<3> major, bits<6> minor>: MSAInst {
67 let Inst{25-23} = major;
68 let Inst{22-21} = 0b10;
72 let Inst{5-0} = minor;
75 class MSA_BIT_D_FMT<bits<3> major, bits<6> minor>: MSAInst {
80 let Inst{25-23} = major;
85 let Inst{5-0} = minor;
88 class MSA_2R_FILL_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst {
92 let Inst{25-18} = major;
96 let Inst{5-0} = minor;
99 class MSA_2R_FMT<bits<8> major, bits<2> df, bits<6> minor>: MSAInst {
103 let Inst{25-18} = major;
104 let Inst{17-16} = df;
105 let Inst{15-11} = ws;
107 let Inst{5-0} = minor;
110 class MSA_2RF_FMT<bits<9> major, bits<1> df, bits<6> minor>: MSAInst {
114 let Inst{25-17} = major;
116 let Inst{15-11} = ws;
118 let Inst{5-0} = minor;
121 class MSA_3R_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
126 let Inst{25-23} = major;
127 let Inst{22-21} = df;
128 let Inst{20-16} = wt;
129 let Inst{15-11} = ws;
131 let Inst{5-0} = minor;
134 class MSA_3RF_FMT<bits<4> major, bits<1> df, bits<6> minor>: MSAInst {
139 let Inst{25-22} = major;
141 let Inst{20-16} = wt;
142 let Inst{15-11} = ws;
144 let Inst{5-0} = minor;
147 class MSA_3R_INDEX_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
152 let Inst{25-23} = major;
153 let Inst{22-21} = df;
154 let Inst{20-16} = rt;
155 let Inst{15-11} = ws;
157 let Inst{5-0} = minor;
160 class MSA_ELM_FMT<bits<10> major, bits<6> minor>: MSAInst {
164 let Inst{25-16} = major;
165 let Inst{15-11} = ws;
167 let Inst{5-0} = minor;
170 class MSA_ELM_CFCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst {
174 let Inst{25-16} = major;
175 let Inst{15-11} = cs;
177 let Inst{5-0} = minor;
180 class MSA_ELM_CTCMSA_FMT<bits<10> major, bits<6> minor>: MSAInst {
184 let Inst{25-16} = major;
185 let Inst{15-11} = rs;
187 let Inst{5-0} = minor;
190 class MSA_ELM_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
195 let Inst{25-22} = major;
196 let Inst{21-20} = 0b00;
197 let Inst{19-16} = n{3-0};
198 let Inst{15-11} = ws;
200 let Inst{5-0} = minor;
203 class MSA_ELM_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
208 let Inst{25-22} = major;
209 let Inst{21-19} = 0b100;
210 let Inst{18-16} = n{2-0};
211 let Inst{15-11} = ws;
213 let Inst{5-0} = minor;
216 class MSA_ELM_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
221 let Inst{25-22} = major;
222 let Inst{21-18} = 0b1100;
223 let Inst{17-16} = n{1-0};
224 let Inst{15-11} = ws;
226 let Inst{5-0} = minor;
229 class MSA_ELM_D_FMT<bits<4> major, bits<6> minor>: MSAInst {
234 let Inst{25-22} = major;
235 let Inst{21-17} = 0b11100;
237 let Inst{15-11} = ws;
239 let Inst{5-0} = minor;
242 class MSA_ELM_COPY_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
247 let Inst{25-22} = major;
248 let Inst{21-20} = 0b00;
249 let Inst{19-16} = n{3-0};
250 let Inst{15-11} = ws;
252 let Inst{5-0} = minor;
255 class MSA_ELM_COPY_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
260 let Inst{25-22} = major;
261 let Inst{21-19} = 0b100;
262 let Inst{18-16} = n{2-0};
263 let Inst{15-11} = ws;
265 let Inst{5-0} = minor;
268 class MSA_ELM_COPY_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
273 let Inst{25-22} = major;
274 let Inst{21-18} = 0b1100;
275 let Inst{17-16} = n{1-0};
276 let Inst{15-11} = ws;
278 let Inst{5-0} = minor;
281 class MSA_ELM_COPY_D_FMT<bits<4> major, bits<6> minor>: MSA64Inst {
286 let Inst{25-22} = major;
287 let Inst{21-17} = 0b11100;
289 let Inst{15-11} = ws;
291 let Inst{5-0} = minor;
294 class MSA_ELM_INSERT_B_FMT<bits<4> major, bits<6> minor>: MSAInst {
299 let Inst{25-22} = major;
300 let Inst{21-20} = 0b00;
301 let Inst{19-16} = n{3-0};
302 let Inst{15-11} = rs;
304 let Inst{5-0} = minor;
307 class MSA_ELM_INSERT_H_FMT<bits<4> major, bits<6> minor>: MSAInst {
312 let Inst{25-22} = major;
313 let Inst{21-19} = 0b100;
314 let Inst{18-16} = n{2-0};
315 let Inst{15-11} = rs;
317 let Inst{5-0} = minor;
320 class MSA_ELM_INSERT_W_FMT<bits<4> major, bits<6> minor>: MSAInst {
325 let Inst{25-22} = major;
326 let Inst{21-18} = 0b1100;
327 let Inst{17-16} = n{1-0};
328 let Inst{15-11} = rs;
330 let Inst{5-0} = minor;
333 class MSA_I5_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
338 let Inst{25-23} = major;
339 let Inst{22-21} = df;
340 let Inst{20-16} = imm;
341 let Inst{15-11} = ws;
343 let Inst{5-0} = minor;
346 class MSA_I8_FMT<bits<2> major, bits<6> minor>: MSAInst {
351 let Inst{25-24} = major;
352 let Inst{23-16} = u8;
353 let Inst{15-11} = ws;
355 let Inst{5-0} = minor;
358 class MSA_I10_FMT<bits<3> major, bits<2> df, bits<6> minor>: MSAInst {
362 let Inst{25-23} = major;
363 let Inst{22-21} = df;
364 let Inst{20-11} = s10;
366 let Inst{5-0} = minor;
369 class MSA_MI10_FMT<bits<2> df, bits<4> minor>: MSAInst {
373 let Inst{25-16} = addr{9-0};
374 let Inst{15-11} = addr{20-16};
376 let Inst{5-2} = minor;
380 class MSA_VEC_FMT<bits<5> major, bits<6> minor>: MSAInst {
385 let Inst{25-21} = major;
386 let Inst{20-16} = wt;
387 let Inst{15-11} = ws;
389 let Inst{5-0} = minor;
392 class MSA_CBRANCH_FMT<bits<3> major, bits<2> df>: MSACBranch {
396 let Inst{25-23} = major;
397 let Inst{22-21} = df;
398 let Inst{20-16} = wt;
399 let Inst{15-0} = offset;
402 class MSA_CBRANCH_V_FMT<bits<5> major>: MSACBranch {
406 let Inst{25-21} = major;
407 let Inst{20-16} = wt;
408 let Inst{15-0} = offset;
411 class SPECIAL_LSA_FMT<bits<6> minor>: MSASpecial {
417 let Inst{25-21} = rs;
418 let Inst{20-16} = rt;
419 let Inst{15-11} = rd;
420 let Inst{10-8} = 0b000;
422 let Inst{5-0} = minor;