1 //===-- MipsISelLowering.h - Mips DAG Lowering Interface --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that Mips uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef MipsISELLOWERING_H
16 #define MipsISELLOWERING_H
18 #include "llvm/CodeGen/SelectionDAG.h"
19 #include "llvm/Target/TargetLowering.h"
21 #include "MipsSubtarget.h"
26 // Start the numbering from where ISD NodeType finishes.
27 FIRST_NUMBER = ISD::BUILTIN_OP_END,
29 // Jump and link (call)
32 // Get the Higher 16 bits from a 32-bit immediate
33 // No relation with Mips Hi register
36 // Get the Lower 16 bits from a 32-bit immediate
37 // No relation with Mips Lo register
40 // Handle gp_rel (small data/bss sections) relocation.
46 // Select CC Pseudo Instruction
49 // Floating Point Select CC Pseudo Instruction
52 // Floating Point Branch Conditional
55 // Floating Point Compare
58 // Floating Point Rounding
66 //===--------------------------------------------------------------------===//
67 // TargetLowering Implementation
68 //===--------------------------------------------------------------------===//
69 class MipsTargetLowering : public TargetLowering
71 // FrameIndex for return slot.
75 explicit MipsTargetLowering(MipsTargetMachine &TM);
77 /// LowerOperation - Provide custom lowering hooks for some operations.
78 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG);
80 /// getTargetNodeName - This method returns the name of a target specific
82 virtual const char *getTargetNodeName(unsigned Opcode) const;
84 /// getSetCCResultType - get the ISD::SETCC result ValueType
85 MVT getSetCCResultType(MVT VT) const;
87 /// getFunctionAlignment - Return the Log2 alignment of this function.
88 virtual unsigned getFunctionAlignment(const Function *F) const;
91 const MipsSubtarget *Subtarget;
93 // Lower Operand helpers
94 SDNode *LowerCallResult(SDValue Chain, SDValue InFlag, CallSDNode *TheCall,
95 unsigned CallingConv, SelectionDAG &DAG);
96 bool IsGlobalInSmallSection(GlobalValue *GV);
97 bool IsInSmallSection(unsigned Size);
99 // Lower Operand specifics
100 SDValue LowerANDOR(SDValue Op, SelectionDAG &DAG);
101 SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG);
102 SDValue LowerCALL(SDValue Op, SelectionDAG &DAG);
103 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG);
104 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG);
105 SDValue LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG);
106 SDValue LowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG);
107 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG);
108 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG);
109 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG);
110 SDValue LowerRET(SDValue Op, SelectionDAG &DAG);
111 SDValue LowerSELECT(SDValue Op, SelectionDAG &DAG);
112 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG);
114 virtual MachineBasicBlock *EmitInstrWithCustomInserter(MachineInstr *MI,
115 MachineBasicBlock *MBB) const;
117 // Inline asm support
118 ConstraintType getConstraintType(const std::string &Constraint) const;
120 std::pair<unsigned, const TargetRegisterClass*>
121 getRegForInlineAsmConstraint(const std::string &Constraint,
124 std::vector<unsigned>
125 getRegClassForInlineAsmConstraint(const std::string &Constraint,
128 virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
132 #endif // MipsISELLOWERING_H