1 //===-- MipsISelDAGToDAG.cpp - A dag to dag inst selector for Mips --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines an instruction selector for the MIPS target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "mips-isel"
16 #include "MipsISelLowering.h"
17 #include "MipsMachineFunction.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsSubtarget.h"
20 #include "MipsTargetMachine.h"
21 #include "llvm/GlobalValue.h"
22 #include "llvm/Instructions.h"
23 #include "llvm/Intrinsics.h"
24 #include "llvm/Support/CFG.h"
25 #include "llvm/Type.h"
26 #include "llvm/CodeGen/MachineConstantPool.h"
27 #include "llvm/CodeGen/MachineFunction.h"
28 #include "llvm/CodeGen/MachineFrameInfo.h"
29 #include "llvm/CodeGen/MachineInstrBuilder.h"
30 #include "llvm/CodeGen/MachineRegisterInfo.h"
31 #include "llvm/CodeGen/SelectionDAGISel.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Support/Compiler.h"
34 #include "llvm/Support/Debug.h"
37 //===----------------------------------------------------------------------===//
38 // Instruction Selector Implementation
39 //===----------------------------------------------------------------------===//
41 //===----------------------------------------------------------------------===//
42 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine
43 // instructions for SelectionDAG operations.
44 //===----------------------------------------------------------------------===//
47 class VISIBILITY_HIDDEN MipsDAGToDAGISel : public SelectionDAGISel {
49 /// TM - Keep a reference to MipsTargetMachine.
50 MipsTargetMachine &TM;
52 /// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
53 /// make the right decision when generating code for different targets.
54 const MipsSubtarget &Subtarget;
57 explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
59 TM(tm), Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
61 virtual void InstructionSelect();
64 virtual const char *getPassName() const {
65 return "MIPS DAG->DAG Pattern Instruction Selection";
70 // Include the pieces autogenerated from the target description.
71 #include "MipsGenDAGISel.inc"
73 /// getTargetMachine - Return a reference to the TargetMachine, casted
74 /// to the target-specific type.
75 const MipsTargetMachine &getTargetMachine() {
76 return static_cast<const MipsTargetMachine &>(TM);
79 /// getInstrInfo - Return a reference to the TargetInstrInfo, casted
80 /// to the target-specific type.
81 const MipsInstrInfo *getInstrInfo() {
82 return getTargetMachine().getInstrInfo();
85 SDNode *getGlobalBaseReg();
86 SDNode *Select(SDValue N);
89 bool SelectAddr(SDValue Op, SDValue N,
90 SDValue &Base, SDValue &Offset);
93 // getI32Imm - Return a target constant with the specified
94 // value, of type i32.
95 inline SDValue getI32Imm(unsigned Imm) {
96 return CurDAG->getTargetConstant(Imm, MVT::i32);
107 /// InstructionSelect - This callback is invoked by
108 /// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
109 void MipsDAGToDAGISel::
113 // Codegen the basic block.
115 DOUT << "===== Instruction selection begins:\n";
119 // Select target instructions for the DAG.
123 DOUT << "===== Instruction selection ends:\n";
126 CurDAG->RemoveDeadNodes();
129 /// getGlobalBaseReg - Output the instructions required to put the
130 /// GOT address into a register.
131 SDNode *MipsDAGToDAGISel::getGlobalBaseReg() {
132 MachineFunction *MF = BB->getParent();
133 unsigned GlobalBaseReg = getInstrInfo()->getGlobalBaseReg(MF);
134 return CurDAG->getRegister(GlobalBaseReg, TLI.getPointerTy()).getNode();
137 /// ComplexPattern used on MipsInstrInfo
138 /// Used on Mips Load/Store instructions
139 bool MipsDAGToDAGISel::
140 SelectAddr(SDValue Op, SDValue Addr, SDValue &Offset, SDValue &Base)
142 // if Address is FI, get the TargetFrameIndex.
143 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(Addr)) {
144 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
145 Offset = CurDAG->getTargetConstant(0, MVT::i32);
149 // on PIC code Load GA
150 if (TM.getRelocationModel() == Reloc::PIC_) {
151 if ((Addr.getOpcode() == ISD::TargetGlobalAddress) ||
152 (Addr.getOpcode() == ISD::TargetJumpTable)){
153 Base = CurDAG->getRegister(Mips::GP, MVT::i32);
158 if ((Addr.getOpcode() == ISD::TargetExternalSymbol ||
159 Addr.getOpcode() == ISD::TargetGlobalAddress))
163 // Operand is a result from an ADD.
164 if (Addr.getOpcode() == ISD::ADD) {
165 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
166 if (Predicate_immSExt16(CN)) {
168 // If the first operand is a FI, get the TargetFI Node
169 if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>
170 (Addr.getOperand(0))) {
171 Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
173 Base = Addr.getOperand(0);
176 Offset = CurDAG->getTargetConstant(CN->getZExtValue(), MVT::i32);
183 Offset = CurDAG->getTargetConstant(0, MVT::i32);
187 /// Select instructions not customized! Used for
188 /// expanded, promoted and normal instructions
189 SDNode* MipsDAGToDAGISel::
192 SDNode *Node = N.getNode();
193 unsigned Opcode = Node->getOpcode();
194 DebugLoc dl = Node->getDebugLoc();
196 // Dump information about the Node being selected
198 DOUT << std::string(Indent, ' ') << "Selecting: ";
199 DEBUG(Node->dump(CurDAG));
204 // If we have a custom node, we already have selected!
205 if (Node->isMachineOpcode()) {
207 DOUT << std::string(Indent-2, ' ') << "== ";
208 DEBUG(Node->dump(CurDAG));
216 // Instruction Selection not handled by the auto-generated
217 // tablegen selection should be handled here.
225 SDValue InFlag = Node->getOperand(2), CmpLHS;
226 unsigned Opc = InFlag.getOpcode(); Opc=Opc;
227 assert(((Opc == ISD::ADDC || Opc == ISD::ADDE) ||
228 (Opc == ISD::SUBC || Opc == ISD::SUBE)) &&
229 "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
232 if (Opcode == ISD::ADDE) {
233 CmpLHS = InFlag.getValue(0);
236 CmpLHS = InFlag.getOperand(0);
240 SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
242 SDValue LHS = Node->getOperand(0);
243 SDValue RHS = Node->getOperand(1);
245 MVT VT = LHS.getValueType();
246 SDNode *Carry = CurDAG->getTargetNode(Mips::SLTu, dl, VT, Ops, 2);
247 SDNode *AddCarry = CurDAG->getTargetNode(Mips::ADDu, dl, VT,
248 SDValue(Carry,0), RHS);
250 return CurDAG->SelectNodeTo(N.getNode(), MOp, VT, MVT::Flag,
251 LHS, SDValue(AddCarry,0));
254 /// Mul/Div with two results
258 case ISD::UMUL_LOHI: {
259 SDValue Op1 = Node->getOperand(0);
260 SDValue Op2 = Node->getOperand(1);
263 if (Opcode == ISD::UMUL_LOHI || Opcode == ISD::SMUL_LOHI)
264 Op = (Opcode == ISD::UMUL_LOHI ? Mips::MULTu : Mips::MULT);
266 Op = (Opcode == ISD::UDIVREM ? Mips::DIVu : Mips::DIV);
268 SDNode *Node = CurDAG->getTargetNode(Op, dl, MVT::Flag, Op1, Op2);
270 SDValue InFlag = SDValue(Node, 0);
271 SDNode *Lo = CurDAG->getTargetNode(Mips::MFLO, dl, MVT::i32,
273 InFlag = SDValue(Lo,1);
274 SDNode *Hi = CurDAG->getTargetNode(Mips::MFHI, dl, MVT::i32, InFlag);
276 if (!N.getValue(0).use_empty())
277 ReplaceUses(N.getValue(0), SDValue(Lo,0));
279 if (!N.getValue(1).use_empty())
280 ReplaceUses(N.getValue(1), SDValue(Hi,0));
289 SDValue MulOp1 = Node->getOperand(0);
290 SDValue MulOp2 = Node->getOperand(1);
292 unsigned MulOp = (Opcode == ISD::MULHU ? Mips::MULTu : Mips::MULT);
293 SDNode *MulNode = CurDAG->getTargetNode(MulOp, dl,
294 MVT::Flag, MulOp1, MulOp2);
296 SDValue InFlag = SDValue(MulNode, 0);
298 if (MulOp == ISD::MUL)
299 return CurDAG->getTargetNode(Mips::MFLO, dl, MVT::i32, InFlag);
301 return CurDAG->getTargetNode(Mips::MFHI, dl, MVT::i32, InFlag);
304 /// Div/Rem operations
309 SDValue Op1 = Node->getOperand(0);
310 SDValue Op2 = Node->getOperand(1);
313 if (Opcode == ISD::SDIV || Opcode == ISD::UDIV) {
314 Op = (Opcode == ISD::SDIV ? Mips::DIV : Mips::DIVu);
317 Op = (Opcode == ISD::SREM ? Mips::DIV : Mips::DIVu);
320 SDNode *Node = CurDAG->getTargetNode(Op, dl, MVT::Flag, Op1, Op2);
322 SDValue InFlag = SDValue(Node, 0);
323 return CurDAG->getTargetNode(MOp, dl, MVT::i32, InFlag);
326 // Get target GOT address.
327 case ISD::GLOBAL_OFFSET_TABLE:
328 return getGlobalBaseReg();
330 /// Handle direct and indirect calls when using PIC. On PIC, when
331 /// GOT is smaller than about 64k (small code) the GA target is
332 /// loaded with only one instruction. Otherwise GA's target must
333 /// be loaded with 3 instructions.
334 case MipsISD::JmpLink: {
335 if (TM.getRelocationModel() == Reloc::PIC_) {
336 //bool isCodeLarge = (TM.getCodeModel() == CodeModel::Large);
337 SDValue Chain = Node->getOperand(0);
338 SDValue Callee = Node->getOperand(1);
339 SDValue T9Reg = CurDAG->getRegister(Mips::T9, MVT::i32);
340 SDValue InFlag(0, 0);
342 if ( (isa<GlobalAddressSDNode>(Callee)) ||
343 (isa<ExternalSymbolSDNode>(Callee)) )
345 /// Direct call for global addresses and external symbols
346 SDValue GPReg = CurDAG->getRegister(Mips::GP, MVT::i32);
348 // Use load to get GOT target
349 SDValue Ops[] = { Callee, GPReg, Chain };
350 SDValue Load = SDValue(CurDAG->getTargetNode(Mips::LW, dl, MVT::i32,
351 MVT::Other, Ops, 3), 0);
352 Chain = Load.getValue(1);
354 // Call target must be on T9
355 Chain = CurDAG->getCopyToReg(Chain, dl, T9Reg, Load, InFlag);
358 Chain = CurDAG->getCopyToReg(Chain, dl, T9Reg, Callee, InFlag);
360 // Emit Jump and Link Register
361 SDNode *ResNode = CurDAG->getTargetNode(Mips::JALR, dl, MVT::Other,
362 MVT::Flag, T9Reg, Chain);
363 Chain = SDValue(ResNode, 0);
364 InFlag = SDValue(ResNode, 1);
365 ReplaceUses(SDValue(Node, 0), Chain);
366 ReplaceUses(SDValue(Node, 1), InFlag);
372 // Select the default instruction
373 SDNode *ResNode = SelectCode(N);
376 DOUT << std::string(Indent-2, ' ') << "=> ";
377 if (ResNode == NULL || ResNode == N.getNode())
378 DEBUG(N.getNode()->dump(CurDAG));
380 DEBUG(ResNode->dump(CurDAG));
388 /// createMipsISelDag - This pass converts a legalized DAG into a
389 /// MIPS-specific DAG, ready for instruction scheduling.
390 FunctionPass *llvm::createMipsISelDag(MipsTargetMachine &TM) {
391 return new MipsDAGToDAGISel(TM);