1 //===-- Mips16FrameLowering.cpp - Mips16 Frame Information ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips16 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "Mips16FrameLowering.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
16 #include "Mips16InstrInfo.h"
17 #include "MipsInstrInfo.h"
18 #include "MipsRegisterInfo.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineModuleInfo.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 #include "llvm/IR/DataLayout.h"
25 #include "llvm/IR/Function.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Target/TargetOptions.h"
31 void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const {
32 MachineBasicBlock &MBB = MF.front();
33 MachineFrameInfo *MFI = MF.getFrameInfo();
34 const Mips16InstrInfo &TII =
35 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
36 MachineBasicBlock::iterator MBBI = MBB.begin();
37 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
38 uint64_t StackSize = MFI->getStackSize();
40 // No need to allocate space on the stack.
41 if (StackSize == 0 && !MFI->adjustsStack()) return;
43 MachineModuleInfo &MMI = MF.getMMI();
44 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
45 MachineLocation DstML, SrcML;
48 TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
50 // emit ".cfi_def_cfa_offset StackSize"
51 MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol();
52 BuildMI(MBB, MBBI, dl,
53 TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel);
55 MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize));
57 MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol();
58 BuildMI(MBB, MBBI, dl,
59 TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel);
62 const MipsRegisterInfo &RI = TII.getRegisterInfo();
63 const BitVector Reserved = RI.getReservedRegs(MF);
64 bool SaveS2 = Reserved[Mips::S2];
66 unsigned RA = MRI->getDwarfRegNum(Mips::RA, true);
67 MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, Offset));
71 unsigned S2 = MRI->getDwarfRegNum(Mips::S2, true);
72 MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S2, Offset));
77 unsigned S1 = MRI->getDwarfRegNum(Mips::S1, true);
78 MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, Offset));
81 unsigned S0 = MRI->getDwarfRegNum(Mips::S0, true);
82 MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, Offset));
87 BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
92 void Mips16FrameLowering::emitEpilogue(MachineFunction &MF,
93 MachineBasicBlock &MBB) const {
94 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
95 MachineFrameInfo *MFI = MF.getFrameInfo();
96 const Mips16InstrInfo &TII =
97 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
98 DebugLoc dl = MBBI->getDebugLoc();
99 uint64_t StackSize = MFI->getStackSize();
105 BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
109 // assumes stacksize multiple of 8
110 TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI);
113 bool Mips16FrameLowering::
114 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
115 MachineBasicBlock::iterator MI,
116 const std::vector<CalleeSavedInfo> &CSI,
117 const TargetRegisterInfo *TRI) const {
118 MachineFunction *MF = MBB.getParent();
119 MachineBasicBlock *EntryBlock = MF->begin();
122 // Registers RA, S0,S1 are the callee saved registers and they
123 // will be saved with the "save" instruction
124 // during emitPrologue
126 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
127 // Add the callee-saved register as live-in. Do not add if the register is
128 // RA and return address is taken, because it has already been added in
129 // method MipsTargetLowering::LowerRETURNADDR.
130 // It's killed at the spill, unless the register is RA and return address
132 unsigned Reg = CSI[i].getReg();
133 bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
134 && MF->getFrameInfo()->isReturnAddressTaken();
135 if (!IsRAAndRetAddrIsTaken)
136 EntryBlock->addLiveIn(Reg);
142 bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
143 MachineBasicBlock::iterator MI,
144 const std::vector<CalleeSavedInfo> &CSI,
145 const TargetRegisterInfo *TRI) const {
147 // Registers RA,S0,S1 are the callee saved registers and they will be restored
148 // with the restore instruction during emitEpilogue.
149 // We need to override this virtual function, otherwise llvm will try and
150 // restore the registers on it's on from the stack.
156 // Eliminate ADJCALLSTACKDOWN, ADJCALLSTACKUP pseudo instructions
157 void Mips16FrameLowering::
158 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
159 MachineBasicBlock::iterator I) const {
160 if (!hasReservedCallFrame(MF)) {
161 int64_t Amount = I->getOperand(0).getImm();
163 if (I->getOpcode() == Mips::ADJCALLSTACKDOWN)
166 const Mips16InstrInfo &TII =
167 *static_cast<const Mips16InstrInfo*>(MF.getTarget().getInstrInfo());
169 TII.adjustStackPtr(Mips::SP, Amount, MBB, I);
176 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
177 const MachineFrameInfo *MFI = MF.getFrameInfo();
178 // Reserve call frame if the size of the maximum call frame fits into 15-bit
179 // immediate field and there are no variable sized objects on the stack.
180 return isInt<15>(MFI->getMaxCallFrameSize()) && !MFI->hasVarSizedObjects();
183 void Mips16FrameLowering::
184 processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
185 RegScavenger *RS) const {
186 MF.getRegInfo().setPhysRegUsed(Mips::RA);
187 MF.getRegInfo().setPhysRegUsed(Mips::S0);
188 MF.getRegInfo().setPhysRegUsed(Mips::S1);
189 MF.getRegInfo().setPhysRegUsed(Mips::S2);
192 const MipsFrameLowering *
193 llvm::createMips16FrameLowering(const MipsSubtarget &ST) {
194 return new Mips16FrameLowering(ST);