1 //===----------------------------------------------------------------------===//
2 // MicroMIPS Base Classes
3 //===----------------------------------------------------------------------===//
6 // Base class for MicroMips instructions.
7 // This class does not depend on the instruction size.
9 class MicroMipsInstBase<dag outs, dag ins, string asmstr, list<dag> pattern,
10 InstrItinClass itin, Format f> : Instruction
12 let Namespace = "Mips";
13 let DecoderNamespace = "MicroMips";
15 let OutOperandList = outs;
16 let InOperandList = ins;
18 let AsmString = asmstr;
19 let Pattern = pattern;
22 let Predicates = [InMicroMips];
28 // Base class for MicroMIPS 16-bit instructions.
30 class MicroMipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
31 InstrItinClass itin, Format f> :
32 MicroMipsInstBase<outs, ins, asmstr, pattern, itin, f>
36 field bits<16> SoftFail = 0;
40 //===----------------------------------------------------------------------===//
41 // MicroMIPS 16-bit Instruction Formats
42 //===----------------------------------------------------------------------===//
44 class ARITH_FM_MM16<bit funct> {
51 let Inst{15-10} = 0x01;
58 class ANDI_FM_MM16<bits<6> funct> {
65 let Inst{15-10} = funct;
71 class LOGIC_FM_MM16<bits<4> funct> {
77 let Inst{15-10} = 0x11;
78 let Inst{9-6} = funct;
83 class SHIFT_FM_MM16<bits<1> funct> {
90 let Inst{15-10} = 0x09;
93 let Inst{3-1} = shamt;
97 class ADDIUR2_FM_MM16 {
104 let Inst{15-10} = 0x1b;
111 class LOAD_STORE_FM_MM16<bits<6> op> {
117 let Inst{15-10} = op;
119 let Inst{6-4} = addr{6-4};
120 let Inst{3-0} = addr{3-0};
123 class LOAD_STORE_SP_FM_MM16<bits<6> op> {
129 let Inst{15-10} = op;
131 let Inst{4-0} = offset;
134 class LOAD_GP_FM_MM16<bits<6> op> {
140 let Inst{15-10} = op;
142 let Inst{6-0} = offset;
145 class ADDIUS5_FM_MM16 {
151 let Inst{15-10} = 0x13;
157 class ADDIUSP_FM_MM16 {
162 let Inst{15-10} = 0x13;
167 class MOVE_FM_MM16<bits<6> funct> {
173 let Inst{15-10} = funct;
184 let Inst{15-10} = 0x3b;
189 class JALR_FM_MM16<bits<5> op> {
194 let Inst{15-10} = 0x11;
199 class MFHILO_FM_MM16<bits<5> funct> {
204 let Inst{15-10} = 0x11;
205 let Inst{9-5} = funct;
209 class JRADDIUSP_FM_MM16<bits<5> op> {
215 let Inst{15-10} = 0x11;
220 class ADDIUR1SP_FM_MM16 {
226 let Inst{15-10} = 0x1b;
232 class BRKSDBBP16_FM_MM<bits<6> op> {
236 let Inst{15-10} = 0x11;
238 let Inst{3-0} = code_;
241 class BEQNEZ_FM_MM16<bits<6> op> {
247 let Inst{15-10} = op;
249 let Inst{6-0} = offset;
257 let Inst{15-10} = 0x33;
258 let Inst{9-0} = offset;
261 class MOVEP_FM_MM16 {
268 let Inst{15-10} = 0x21;
269 let Inst{9-7} = dst_regs;
275 //===----------------------------------------------------------------------===//
276 // MicroMIPS 32-bit Instruction Formats
277 //===----------------------------------------------------------------------===//
280 string Arch = "micromips";
281 list<dag> Pattern = [];
284 class ADD_FM_MM<bits<6> op, bits<10> funct> : MMArch {
291 let Inst{31-26} = op;
292 let Inst{25-21} = rt;
293 let Inst{20-16} = rs;
294 let Inst{15-11} = rd;
296 let Inst{9-0} = funct;
299 class ADDI_FM_MM<bits<6> op> : MMArch {
306 let Inst{31-26} = op;
307 let Inst{25-21} = rt;
308 let Inst{20-16} = rs;
309 let Inst{15-0} = imm16;
312 class SLTI_FM_MM<bits<6> op> : MMArch {
319 let Inst{31-26} = op;
320 let Inst{25-21} = rt;
321 let Inst{20-16} = rs;
322 let Inst{15-0} = imm16;
325 class LUI_FM_MM : MMArch {
331 let Inst{31-26} = 0x10;
332 let Inst{25-21} = 0xd;
333 let Inst{20-16} = rt;
334 let Inst{15-0} = imm16;
337 class MULT_FM_MM<bits<10> funct> : MMArch {
343 let Inst{31-26} = 0x00;
344 let Inst{25-21} = rt;
345 let Inst{20-16} = rs;
346 let Inst{15-6} = funct;
347 let Inst{5-0} = 0x3c;
350 class SRA_FM_MM<bits<10> funct, bit rotate> : MMArch {
358 let Inst{25-21} = rd;
359 let Inst{20-16} = rt;
360 let Inst{15-11} = shamt;
361 let Inst{10} = rotate;
362 let Inst{9-0} = funct;
365 class SRLV_FM_MM<bits<10> funct, bit rotate> : MMArch {
373 let Inst{25-21} = rt;
374 let Inst{20-16} = rs;
375 let Inst{15-11} = rd;
376 let Inst{10} = rotate;
377 let Inst{9-0} = funct;
380 class LW_FM_MM<bits<6> op> : MMArch {
386 let Inst{31-26} = op;
387 let Inst{25-21} = rt;
388 let Inst{20-16} = addr{20-16};
389 let Inst{15-0} = addr{15-0};
392 class POOL32C_LHUE_FM_MM<bits<6> op, bits<4> fmt, bits<3> funct> : MMArch {
395 bits<5> base = addr{20-16};
396 bits<9> offset = addr{8-0};
400 let Inst{31-26} = op;
401 let Inst{25-21} = rt;
402 let Inst{20-16} = base;
403 let Inst{15-12} = fmt;
404 let Inst{11-9} = funct;
405 let Inst{8-0} = offset;
408 class LWL_FM_MM<bits<4> funct> {
414 let Inst{31-26} = 0x18;
415 let Inst{25-21} = rt;
416 let Inst{20-16} = addr{20-16};
417 let Inst{15-12} = funct;
418 let Inst{11-0} = addr{11-0};
421 class POOL32C_STEVA_LDEVA_FM_MM<bits<4> type, bits<3> funct> {
424 bits<5> base = addr{20-16};
425 bits<9> offset = addr{8-0};
429 let Inst{31-26} = 0x18;
430 let Inst{25-21} = rt;
431 let Inst{20-16} = base;
432 let Inst{15-12} = type;
433 let Inst{11-9} = funct;
434 let Inst{8-0} = offset;
437 class CMov_F_I_FM_MM<bits<7> func> : MMArch {
444 let Inst{31-26} = 0x15;
445 let Inst{25-21} = rd;
446 let Inst{20-16} = rs;
447 let Inst{15-13} = fcc;
448 let Inst{12-6} = func;
449 let Inst{5-0} = 0x3b;
452 class MTLO_FM_MM<bits<10> funct> : MMArch {
457 let Inst{31-26} = 0x00;
458 let Inst{25-21} = 0x00;
459 let Inst{20-16} = rs;
460 let Inst{15-6} = funct;
461 let Inst{5-0} = 0x3c;
464 class MFLO_FM_MM<bits<10> funct> : MMArch {
469 let Inst{31-26} = 0x00;
470 let Inst{25-21} = 0x00;
471 let Inst{20-16} = rd;
472 let Inst{15-6} = funct;
473 let Inst{5-0} = 0x3c;
476 class CLO_FM_MM<bits<10> funct> : MMArch {
482 let Inst{31-26} = 0x00;
483 let Inst{25-21} = rd;
484 let Inst{20-16} = rs;
485 let Inst{15-6} = funct;
486 let Inst{5-0} = 0x3c;
489 class SEB_FM_MM<bits<10> funct> : MMArch {
495 let Inst{31-26} = 0x00;
496 let Inst{25-21} = rd;
497 let Inst{20-16} = rt;
498 let Inst{15-6} = funct;
499 let Inst{5-0} = 0x3c;
502 class EXT_FM_MM<bits<6> funct> : MMArch {
510 let Inst{31-26} = 0x00;
511 let Inst{25-21} = rt;
512 let Inst{20-16} = rs;
513 let Inst{15-11} = size;
514 let Inst{10-6} = pos;
515 let Inst{5-0} = funct;
518 class J_FM_MM<bits<6> op> : MMArch {
523 let Inst{31-26} = op;
524 let Inst{25-0} = target;
527 class JR_FM_MM<bits<8> funct> : MMArch {
532 let Inst{31-21} = 0x00;
533 let Inst{20-16} = rs;
534 let Inst{15-14} = 0x0;
535 let Inst{13-6} = funct;
536 let Inst{5-0} = 0x3c;
539 class JALR_FM_MM<bits<10> funct> {
545 let Inst{31-26} = 0x00;
546 let Inst{25-21} = rd;
547 let Inst{20-16} = rs;
548 let Inst{15-6} = funct;
549 let Inst{5-0} = 0x3c;
552 class BEQ_FM_MM<bits<6> op> : MMArch {
559 let Inst{31-26} = op;
560 let Inst{25-21} = rt;
561 let Inst{20-16} = rs;
562 let Inst{15-0} = offset;
565 class BGEZ_FM_MM<bits<5> funct> : MMArch {
571 let Inst{31-26} = 0x10;
572 let Inst{25-21} = funct;
573 let Inst{20-16} = rs;
574 let Inst{15-0} = offset;
577 class BGEZAL_FM_MM<bits<5> funct> : MMArch {
583 let Inst{31-26} = 0x10;
584 let Inst{25-21} = funct;
585 let Inst{20-16} = rs;
586 let Inst{15-0} = offset;
589 class SYNC_FM_MM : MMArch {
594 let Inst{31-26} = 0x00;
595 let Inst{25-21} = 0x0;
596 let Inst{20-16} = stype;
597 let Inst{15-6} = 0x1ad;
598 let Inst{5-0} = 0x3c;
601 class BRK_FM_MM : MMArch {
605 let Inst{31-26} = 0x0;
606 let Inst{25-16} = code_1;
607 let Inst{15-6} = code_2;
608 let Inst{5-0} = 0x07;
611 class SYS_FM_MM : MMArch {
614 let Inst{31-26} = 0x0;
615 let Inst{25-16} = code_;
616 let Inst{15-6} = 0x22d;
617 let Inst{5-0} = 0x3c;
624 let Inst{31-26} = 0x00;
625 let Inst{25-16} = code_;
626 let Inst{15-6} = 0x24d;
627 let Inst{5-0} = 0x3c;
630 class ER_FM_MM<bits<10> funct> : MMArch {
633 let Inst{31-26} = 0x00;
634 let Inst{25-16} = 0x00;
635 let Inst{15-6} = funct;
636 let Inst{5-0} = 0x3c;
639 class EI_FM_MM<bits<10> funct> : MMArch {
643 let Inst{31-26} = 0x00;
644 let Inst{25-21} = 0x00;
645 let Inst{20-16} = rt;
646 let Inst{15-6} = funct;
647 let Inst{5-0} = 0x3c;
650 class TEQ_FM_MM<bits<6> funct> : MMArch {
657 let Inst{31-26} = 0x00;
658 let Inst{25-21} = rt;
659 let Inst{20-16} = rs;
660 let Inst{15-12} = code_;
661 let Inst{11-6} = funct;
662 let Inst{5-0} = 0x3c;
665 class TEQI_FM_MM<bits<5> funct> : MMArch {
671 let Inst{31-26} = 0x10;
672 let Inst{25-21} = funct;
673 let Inst{20-16} = rs;
674 let Inst{15-0} = imm16;
677 class LL_FM_MM<bits<4> funct> {
683 let Inst{31-26} = 0x18;
684 let Inst{25-21} = rt;
685 let Inst{20-16} = addr{20-16};
686 let Inst{15-12} = funct;
687 let Inst{11-0} = addr{11-0};
690 class LLE_FM_MM<bits<4> funct> {
693 bits<5> base = addr{20-16};
694 bits<9> offset = addr{8-0};
698 let Inst{31-26} = 0x18;
699 let Inst{25-21} = rt;
700 let Inst{20-16} = base;
701 let Inst{15-12} = funct;
702 let Inst{11-9} = 0x6;
703 let Inst{8-0} = offset;
706 class ADDS_FM_MM<bits<2> fmt, bits<8> funct> : MMArch {
713 let Inst{31-26} = 0x15;
714 let Inst{25-21} = ft;
715 let Inst{20-16} = fs;
716 let Inst{15-11} = fd;
719 let Inst{7-0} = funct;
721 list<dag> Pattern = [];
724 class LWXC1_FM_MM<bits<9> funct> : MMArch {
731 let Inst{31-26} = 0x15;
732 let Inst{25-21} = index;
733 let Inst{20-16} = base;
734 let Inst{15-11} = fd;
735 let Inst{10-9} = 0x0;
736 let Inst{8-0} = funct;
739 class SWXC1_FM_MM<bits<9> funct> : MMArch {
746 let Inst{31-26} = 0x15;
747 let Inst{25-21} = index;
748 let Inst{20-16} = base;
749 let Inst{15-11} = fs;
750 let Inst{10-9} = 0x0;
751 let Inst{8-0} = funct;
754 class CEQS_FM_MM<bits<2> fmt> : MMArch {
761 let Inst{31-26} = 0x15;
762 let Inst{25-21} = ft;
763 let Inst{20-16} = fs;
764 let Inst{15-13} = 0x0; // cc
766 let Inst{11-10} = fmt;
767 let Inst{9-6} = cond;
768 let Inst{5-0} = 0x3c;
771 class BC1F_FM_MM<bits<5> tf> : MMArch {
776 let Inst{31-26} = 0x10;
777 let Inst{25-21} = tf;
778 let Inst{20-18} = 0x0; // cc
779 let Inst{17-16} = 0x0;
780 let Inst{15-0} = offset;
783 class ROUND_W_FM_MM<bits<1> fmt, bits<8> funct> : MMArch {
789 let Inst{31-26} = 0x15;
790 let Inst{25-21} = fd;
791 let Inst{20-16} = fs;
794 let Inst{13-6} = funct;
795 let Inst{5-0} = 0x3b;
798 class ABS_FM_MM<bits<2> fmt, bits<7> funct> : MMArch {
804 let Inst{31-26} = 0x15;
805 let Inst{25-21} = fd;
806 let Inst{20-16} = fs;
808 let Inst{14-13} = fmt;
809 let Inst{12-6} = funct;
810 let Inst{5-0} = 0x3b;
813 class CMov_F_F_FM_MM<bits<9> func, bits<2> fmt> : MMArch {
819 let Inst{31-26} = 0x15;
820 let Inst{25-21} = fd;
821 let Inst{20-16} = fs;
822 let Inst{15-13} = 0x0; //cc
823 let Inst{12-11} = 0x0;
824 let Inst{10-9} = fmt;
825 let Inst{8-0} = func;
828 class CMov_I_F_FM_MM<bits<8> funct, bits<2> fmt> : MMArch {
835 let Inst{31-26} = 0x15;
836 let Inst{25-21} = rt;
837 let Inst{20-16} = fs;
838 let Inst{15-11} = fd;
840 let Inst{7-0} = funct;
843 class MFC1_FM_MM<bits<8> funct> : MMArch {
849 let Inst{31-26} = 0x15;
850 let Inst{25-21} = rt;
851 let Inst{20-16} = fs;
852 let Inst{15-14} = 0x0;
853 let Inst{13-6} = funct;
854 let Inst{5-0} = 0x3b;
857 class MADDS_FM_MM<bits<6> funct>: MMArch {
865 let Inst{31-26} = 0x15;
866 let Inst{25-21} = ft;
867 let Inst{20-16} = fs;
868 let Inst{15-11} = fd;
870 let Inst{5-0} = funct;
873 class COMPACT_BRANCH_FM_MM<bits<5> funct> {
879 let Inst{31-26} = 0x10;
880 let Inst{25-21} = funct;
881 let Inst{20-16} = rs;
882 let Inst{15-0} = offset;
885 class COP0_TLB_FM_MM<bits<10> op> : MMArch {
888 let Inst{31-26} = 0x0;
889 let Inst{25-16} = 0x0;
891 let Inst{5-0} = 0x3c;
894 class SDBBP_FM_MM : MMArch {
899 let Inst{31-26} = 0x0;
900 let Inst{25-16} = code_;
901 let Inst{15-6} = 0x36d;
902 let Inst{5-0} = 0x3c;
905 class RDHWR_FM_MM : MMArch {
911 let Inst{31-26} = 0x0;
912 let Inst{25-21} = rt;
913 let Inst{20-16} = rd;
914 let Inst{15-6} = 0x1ac;
915 let Inst{5-0} = 0x3c;
918 class LWXS_FM_MM<bits<10> funct> {
925 let Inst{31-26} = 0x0;
926 let Inst{25-21} = index;
927 let Inst{20-16} = base;
928 let Inst{15-11} = rd;
930 let Inst{9-0} = funct;
933 class LWM_FM_MM<bits<4> funct> : MMArch {
939 let Inst{31-26} = 0x8;
940 let Inst{25-21} = rt;
941 let Inst{20-16} = addr{20-16};
942 let Inst{15-12} = funct;
943 let Inst{11-0} = addr{11-0};
946 class LWM_FM_MM16<bits<4> funct> : MMArch, PredicateControl {
952 let Inst{15-10} = 0x11;
953 let Inst{9-6} = funct;
955 let Inst{3-0} = addr;
958 class CACHE_PREF_FM_MM<bits<6> op, bits<4> funct> : MMArch {
961 bits<5> base = addr{20-16};
962 bits<12> offset = addr{11-0};
966 let Inst{31-26} = op;
967 let Inst{25-21} = hint;
968 let Inst{20-16} = base;
969 let Inst{15-12} = funct;
970 let Inst{11-0} = offset;
973 class CACHE_PREFE_FM_MM<bits<6> op, bits<3> funct> : MMArch {
976 bits<5> base = addr{20-16};
977 bits<9> offset = addr{8-0};
981 let Inst{31-26} = op;
982 let Inst{25-21} = hint;
983 let Inst{20-16} = base;
984 let Inst{15-12} = 0xA;
985 let Inst{11-9} = funct;
986 let Inst{8-0} = offset;
989 class POOL32F_PREFX_FM_MM<bits<6> op, bits<9> funct> : MMArch {
996 let Inst{31-26} = op;
997 let Inst{25-21} = index;
998 let Inst{20-16} = base;
999 let Inst{15-11} = hint;
1000 let Inst{10-9} = 0x0;
1001 let Inst{8-0} = funct;
1004 class BARRIER_FM_MM<bits<5> op> : MMArch {
1007 let Inst{31-26} = 0x0;
1008 let Inst{25-21} = 0x0;
1009 let Inst{20-16} = 0x0;
1010 let Inst{15-11} = op;
1011 let Inst{10-6} = 0x0;
1012 let Inst{5-0} = 0x0;
1015 class ADDIUPC_FM_MM {
1021 let Inst{31-26} = 0x1e;
1022 let Inst{25-23} = rs;
1023 let Inst{22-0} = imm;