1 //=- MicroMips64r6InstrInfo.td - Instruction Information -*- tablegen -*- -=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file describes MicroMips64r6 instructions.
12 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
16 // Instruction Encodings
18 //===----------------------------------------------------------------------===//
20 class DAUI_MMR6_ENC : DAUI_FM_MMR6;
21 class DAHI_MMR6_ENC : POOL32I_ADD_IMM_FM_MMR6<0b10001>;
22 class DATI_MMR6_ENC : POOL32I_ADD_IMM_FM_MMR6<0b10000>;
23 class DEXT_MMR6_ENC : POOL32S_EXTBITS_FM_MMR6<0b101100>;
24 class DEXTM_MMR6_ENC : POOL32S_EXTBITS_FM_MMR6<0b100100>;
25 class DEXTU_MMR6_ENC : POOL32S_EXTBITS_FM_MMR6<0b010100>;
26 class DALIGN_MMR6_ENC : POOL32S_DALIGN_FM_MMR6;
27 class DDIV_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"ddiv", 0b100011000>;
28 class DMOD_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"dmod", 0b101011000>;
29 class DDIVU_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"ddivu", 0b110011000>;
30 class DMODU_MM64R6_ENC : POOL32A_DIVMOD_FM_MMR6<"dmodu", 0b111011000>;
32 //===----------------------------------------------------------------------===//
34 // Instruction Descriptions
36 //===----------------------------------------------------------------------===//
38 class DAUI_MMR6_DESC_BASE<string instr_asm, RegisterOperand GPROpnd>
39 : MMR6Arch<instr_asm>, MipsR6Inst {
40 dag OutOperandList = (outs GPROpnd:$rt);
41 dag InOperandList = (ins GPROpnd:$rs, simm16:$imm);
42 string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $imm");
43 list<dag> Pattern = [];
45 class DAUI_MMR6_DESC : DAUI_MMR6_DESC_BASE<"daui", GPR64Opnd>;
47 class DAHI_DATI_DESC_BASE<string instr_asm, RegisterOperand GPROpnd>
48 : MMR6Arch<instr_asm>, MipsR6Inst {
49 dag OutOperandList = (outs GPROpnd:$rs);
50 dag InOperandList = (ins GPROpnd:$rt, simm16:$imm);
51 string AsmString = !strconcat(instr_asm, "\t$rt, $imm");
52 string Constraints = "$rs = $rt";
54 class DAHI_MMR6_DESC : DAHI_DATI_DESC_BASE<"dahi", GPR64Opnd>;
55 class DATI_MMR6_DESC : DAHI_DATI_DESC_BASE<"dati", GPR64Opnd>;
57 class EXTBITS_DESC_BASE<string instr_asm, RegisterOperand RO, Operand PosOpnd,
58 SDPatternOperator Op = null_frag> : MMR6Arch<instr_asm>, MipsR6Inst {
59 dag OutOperandList = (outs RO:$rt);
60 dag InOperandList = (ins RO:$rs, PosOpnd:$pos, size_ext:$size);
61 string AsmString = !strconcat(instr_asm, "\t$rt, $rs, $pos, $size");
62 list<dag> Pattern = [(set RO:$rt, (Op RO:$rs, imm:$pos, imm:$size))];
63 InstrItinClass Itinerary = II_EXT;
65 string BaseOpcode = instr_asm;
67 class DEXT_MMR6_DESC : EXTBITS_DESC_BASE<"dext", GPR64Opnd, uimm6,
69 class DEXTM_MMR6_DESC : EXTBITS_DESC_BASE<"dextm", GPR64Opnd, uimm5,
71 class DEXTU_MMR6_DESC : EXTBITS_DESC_BASE<"dextu", GPR64Opnd, uimm5_plus32,
74 class DALIGN_DESC_BASE<string instr_asm, RegisterOperand GPROpnd,
75 Operand ImmOpnd> : MMR6Arch<instr_asm>, MipsR6Inst {
76 dag OutOperandList = (outs GPROpnd:$rd);
77 dag InOperandList = (ins GPROpnd:$rs, GPROpnd:$rt, ImmOpnd:$bp);
78 string AsmString = !strconcat(instr_asm, "\t$rd, $rs, $rt, $bp");
79 list<dag> Pattern = [];
82 class DALIGN_MMR6_DESC : DALIGN_DESC_BASE<"dalign", GPR64Opnd, uimm3>;
84 class DDIV_MM64R6_DESC : ArithLogicR<"ddiv", GPR32Opnd>;
85 class DMOD_MM64R6_DESC : ArithLogicR<"dmod", GPR32Opnd>;
86 class DDIVU_MM64R6_DESC : ArithLogicR<"ddivu", GPR32Opnd>;
87 class DMODU_MM64R6_DESC : ArithLogicR<"dmodu", GPR32Opnd>;
89 //===----------------------------------------------------------------------===//
91 // Instruction Definitions
93 //===----------------------------------------------------------------------===//
95 let DecoderNamespace = "MicroMipsR6" in {
96 def DAUI_MM64R6 : StdMMR6Rel, DAUI_MMR6_DESC, DAUI_MMR6_ENC, ISA_MICROMIPS64R6;
97 def DAHI_MM64R6 : StdMMR6Rel, DAHI_MMR6_DESC, DAHI_MMR6_ENC, ISA_MICROMIPS64R6;
98 def DATI_MM64R6 : StdMMR6Rel, DATI_MMR6_DESC, DATI_MMR6_ENC, ISA_MICROMIPS64R6;
99 def DEXT_MM64R6 : StdMMR6Rel, DEXT_MMR6_DESC, DEXT_MMR6_ENC,
101 def DEXTM_MM64R6 : StdMMR6Rel, DEXTM_MMR6_DESC, DEXTM_MMR6_ENC,
103 def DEXTU_MM64R6 : StdMMR6Rel, DEXTU_MMR6_DESC, DEXTU_MMR6_ENC,
105 def DALIGN_MM64R6 : StdMMR6Rel, DALIGN_MMR6_DESC, DALIGN_MMR6_ENC,
107 def DDIV_MM64R6 : R6MMR6Rel, DDIV_MM64R6_DESC, DDIV_MM64R6_ENC,
109 def DMOD_MM64R6 : R6MMR6Rel, DMOD_MM64R6_DESC, DMOD_MM64R6_ENC,
111 def DDIVU_MM64R6 : R6MMR6Rel, DDIVU_MM64R6_DESC, DDIVU_MM64R6_ENC,
113 def DMODU_MM64R6 : R6MMR6Rel, DMODU_MM64R6_DESC, DMODU_MM64R6_ENC,